Transcript
LT1993-10 700MHz Low Distortion, Low Noise Differential Amplifier/ ADC Driver (AV = 10V/V) DESCRIPTIO U
FEATURES ■ ■ ■
■ ■ ■ ■ ■ ■ ■
700MHz –3dB Bandwidth Fixed Gain of 10V/V (20dB) Low Distortion: 40dBm OIP3, –70dBc HD3 (70MHz 2VP-P) 50.5dBm OIP3, –91dBc (10MHz 2VP-P) Low Noise: 12.7dB NF, en = 1.9nV/√Hz Differential Inputs and Outputs Additional Filtered Outputs Adjustable Output Common Mode Voltage DC- or AC-Coupled Operation Minimal Support Circuitry Required Small 0.75mm Tall 16-Lead 3 × 3 QFN Package
The LT®1993-10 is a low distortion, low noise Differential Amplifier/ADC driver for use in applications from DC to 700MHz. The LT1993-10 has been designed for ease of use, with minimal support circuitry required. Exceptionally low input-referred noise and low distortion products (with either single-ended or differential inputs) make the LT1993-10 an excellent solution for driving high speed 12-bit and 14-bit ADCs. In addition to the normal unfiltered outputs (+OUT and –OUT), the LT1993-10 has a built-in 175MHz differential lowpass filter and an additional pair of filtered outputs (+OUTFILTERED, –OUTFILTERED) to reduce external filtering components when driving high speed ADCs. The output common mode voltage is easily set via the VOCM pin, eliminating either an output transformer or AC-coupling capacitors in many applications.
U APPLICATIO S ■
■ ■ ■ ■ ■ ■
Differential ADC Driver for: Imaging Communications Differential Driver/Receiver Single Ended to Differential Conversion Differential to Single Ended Conversion Level Shifting IF Sampling Receivers SAW Filter Interfacing/Buffering
The LT1993-10 is designed to meet the demanding requirements of communications transceiver applications. It can be used as a differential ADC driver, a general-purpose differential gain block, or in any other application requiring differential drive. The LT1993-10 can be used in data acquisition systems required to function at frequencies down to DC. The LT1993-10 operates on a 5V supply and consumes 100mA. It comes in a compact 16-lead 3 × 3 QFN package and operates over a –40°C to 85°C temperature range.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
U
TYPICAL APPLICATIO
4-Tone WCDMA Waveform, LT1993-10 Driving LTC2255 14-Bit ADC at 92.16Msps
4-Channel WCDMA Receive Channel 0 –10
32768 POINT FFT TONE CENTER FREQUENCIES AT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz
–20 1:1 Z-RATIO
–30 –INB
•
•
MA/COM ETC 1-1-13
–INA
–OUT
–OUTFILTERED LT1993-10 +OUTFILTERED +INB +OUT +INA VOCM ENABLE 2.2V
AIN– 82nH
52.3pF
LTC2255 ADC AIN+
20dB Gain
LTC2255 125Msps 14-BIT ADC SAMPLING AT 92.16Msps
AMPLITUDE (dBFS)
70MHz IF IN
–40 –50 –60 –70 –80 –90
–100 –110 –120
199310 TA01
0
5
10
15 20 25 30 35 FREQUENCY (MHz)
40
45
199310 • TA02
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LT1993-10 U
W W
W
ABSOLUTE
AXI U RATI GS
U W U PACKAGE/ORDER I FOR ATIO
(Note 1) –INB
–INA
+INB
+INA
TOP VIEW
16 15 14 13 12 VEEC
VCCC 1 VOCM 2
11 ENABLE
17
VCCA 3
10 VCCB
VEEA 4 5
6
7
8
+OUT
–OUTFILTERED
–OUT
9 +OUTFILTERED
Total Supply Voltage (VCCA/VCCB/VCCC to VEEA/VEEB/VEEC) ...................................................5.5V Input Current (+INA, –INA, +INB, –INB, VOCM, ENABLE)................................................±10mA Output Current (Continuous) (Note 6) +OUT, –OUT (DC) ..........................................±100mA (AC) ..........................................±100mA +OUTFILTERED, –OUTFILTERED (DC) .............±15mA (AC) .............±45mA Output Short Circuit Duration (Note 2) ............ Indefinite Operating Temperature Range (Note 3) ... –40°C to 85°C Specified Temperature Range (Note 4) .... –40°C to 85°C Storage Temperature Range................... –65°C to 125°C Junction Temperature ........................................... 125°C Lead Temperature Range (Soldering 10 sec) ........ 300°C
VEEB
UD PACKAGE 16-LEAD (3mm × 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W EXPOSED PAD IS VEE (PIN 17) MUST BE SOLDERED TO THE PCB
ORDER PART NUMBER
UD PART MARKING*
LT1993CUD-10 LT1993IUD-10
LBNT LBNT
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
DC ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
19.7
20.9
dB
0.25
0.35 0.5
V V
Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED) GDIFF
Gain
VSWINGMIN VSWINGMAX VSWINGDIFF
Output Voltage Swing
IOUT
Output Current Drive
VOS
Input Offset Voltage
Differential (+OUT, –OUT), VIN = ±160mV Differential
●
18.9
Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±600mV Differential
●
Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±600mV Differential
3.6 3.5
3.75
●
6.5 6
7
●
VP-P VP-P
●
±40
±45
mA
–6.5 –10
1
●
Differential (+OUT, –OUT), VIN = ±600mV Differential (Note 5)
TCVOS
Input Offset Voltage Drift
TMIN to TMAX
●
IVRMIN
Input Voltage Range, MIN
Single-Ended
●
IVRMAX
Input Voltage Range, MAX
Single-Ended
●
3.9
RINDIFF
Differential Input Resistance
●
77
CINDIFF
Differential Input Capacitance
V V
6.5 10
2.5
mV mV µV/°C
0.9
V V
100 1
122
Ω pF 199310fb
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LT1993-10 DC ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. SYMBOL
PARAMETER
CONDITIONS Input Common Mode 0.9V to 3.9V
MIN 45
TYP
MAX
UNITS
CMRR
Common Mode Rejection Ratio
70
dB
ROUTDIFF
Output Resistance
0.3
Ω
COUTDIFF
Output Capacitance
0.8
pF
●
Common Mode Voltage Control (VOCM Pin) GCM VOCMMIN
Common Mode Gain
Differential (+OUT, –OUT), VOCM = 1.2V to 3.6V Differential (+OUT, –OUT), VOCM = 1.4V to 3.4V
●
Output Common Mode Voltage Adjustment Range, MIN
Measured Single-Ended at +OUT and –OUT
Output Common Mode Voltage Adjustment Range, MAX
Measured Single-Ended at +OUT and –OUT
VOSCM
Output Common Mode Offset Voltage
Measured from VOCM to Average of +OUT and –OUT
IBIASCM
VOCM Input Bias Current
●
RINCM
VOCM Input Resistance
●
CINCM
VOCM Input Capacitance
VOCMMAX
0.9 0.9
1
● ●
3.6 3.4
●
–30
0.8
1.1 1.1
V/V V/V
1.2 1.4
V V V V
2
30
mV
5
15
µA
3
MΩ
1
pF
ENABLE Pin VIL
ENABLE Input Low Voltage
● ●
VIH
ENABLE Input High Voltage
IIL
ENABLE Input Low Current
ENABLE = 0.8V
●
IIH
ENABLE Input High Current
ENABLE = 2V
●
0.8
V
0.5
µA
1
3
µA
2
V
Power Supply ●
4
5
5.5
V
ENABLE = 0.8V
●
88
100
112
mA
Supply Current (Disabled)
ENABLE = 2V
●
250
500
µA
Power Supply Rejection Ratio
4V to 5.5V
●
VS
Operating Range
IS
Supply Current
ISDISABLED PSRR
55
90
dB
AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
500
MAX
UNITS
Input/Output Characteristics –3dBBW
–3dB Bandwidth
200mVP-P Differential (+OUT, –OUT)
700
MHz
0.1dBBW
Bandwidth for 0.1dB Flatness
200mVP-P Differential (+OUT, –OUT)
50
MHz
0.5dBBW
Bandwidth for 0.5dB Flatness
200mVP-P Differential (+OUT, –OUT)
100
MHz
SR
Slew Rate
3.2VP-P Differential (+OUT, –OUT)
1100
V/µs
ts1%
1% Settling Time
1% Settling for a 1VP-P Differential Step (+OUT, –OUT)
tON tOFF
4
ns
Turn-On Time
40
ns
Turn-Off Time
250
ns
300
MHz
Common Mode Voltage Control (VOCM Pin) –3dBBWCM
Common Mode Small-Signal –3dB Bandwidth
0.1VP-P at VOCM, Measured Single-Ended at +OUT and –OUT
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LT1993-10 AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. SYMBOL
PARAMETER
CONDITIONS
SRCM
Common Mode Slew Rate
1.2V to 3.6V Step at VOCM
MIN
TYP 500
MAX
UNITS V/µs
Noise/Harmonic Performance Input/output Characteristics 1kHz Signal Second/Third Harmonic Distortion
Third-Order IMD
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–100
dBc
2VP-P Differential (+OUT, –OUT)
–100
dBc
2VP-P Differential (+OUT, –OUT), RL = 100Ω
–100
dBc
3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–91
dBc
3.2VP-P Differential (+OUT, –OUT)
–91
dBc
3.2VP-P Differential (+OUT, –OUT), RL = 100Ω
–91
dBc
2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz
–102
dBc
2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 0.95kHz, f2 = 1.05kHz
–102
dBc
3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz
–93
dBc
Differential (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz
54
dBm
OIP31k
Output Third-Order Intercept
en1k
Input Referred Noise Voltage Density
1.7
nV/√Hz
1dB Compression Point
22.7
dBm
10MHz Signal Second/Third Harmonic Distortion
Third-Order IMD
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–91
dBc
2VP-P Differential (+OUT, –OUT)
–91
dBc
2VP-P Differential (+OUT, –OUT), RL = 100Ω
–83
dBc
3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–82
dBc
3.2VP-P Differential (+OUT, –OUT)
–82
dBc
3.2VP-P Differential (+OUT, –OUT), RL = 100Ω
–74
dBc
2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
–95
dBc
2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 9.5MHz, f2 = 10.5MHz
–94
dBc
3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
–85
dBc
OIP310M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
50.5
dBm
NF
Noise Figure
Measured Using DC800A Demo Board
11.8
dBm
Input Referred Noise Voltage Density
1.7
nV/√Hz
1dB Compression Point
22.6
dBm
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–77
dBc
2VP-P Differential (+OUT, –OUT)
–77
dBc
en10M 50MHz Signal
Second/Third Harmonic Distortion
2VP-P Differential (+OUT, –OUT), RL = 100Ω
–73
dBc
3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–68
dBc
3.2VP-P Differential (+OUT, –OUT)
–66
dBc 199310fb
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LT1993-10 AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. SYMBOL
PARAMETER Third-Order IMD
CONDITIONS
MIN
MAX
UNITS
3.2VP-P Differential (+OUT, –OUT), RL = 100Ω
–63
dBc
2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz
–82
dBc
2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 49.5MHz, f2 = 50.5MHz
–81
dBc
3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz
–72
dBc
44
dBm
OIP350M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz
NF
Noise Figure
Measured Using DC800A Demo Board
en50M
TYP
12.3
dB
Input Referred Noise Voltage Density
1.8
nV/√Hz
1dB Compression Point
19.7
dBm
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–70
dBc
2VP-P Differential (+OUT, –OUT)
–67
dBc
70MHz Signal Second/Third Harmonic Distortion
Third-Order IMD
2VP-P Differential (+OUT, –OUT), RL = 100Ω
–66
dBc
2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 69.5MHz, f2 = 70.5MHz
–74
dBc
2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 69.5MHz, f2 = 70.5MHz
–71
dBc
40
dBm
OIP370M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED), f1 = 69.5MHz, f2 = 70.5MHz
NF
Noise Figure
Measured Using DC800A Demo Board
12.7
dB
en70M
Input Referred Noise Voltage Density
1.9
nV/√Hz
1dB Compression Point
18.5
dBm
–60
dBc
100MHz Signal Second/Third Harmonic Distortion
Third-Order IMD
2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT)
–55
dBc
2VP-P Differential (+OUT, –OUT), RL = 100Ω
–52
dBc
2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 99.5MHz, f2 = 100.5MHz
–61
dBc
2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 99.5MHz, f2 = 100.5MHz
–60
dBc
OIP3100M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED), f1 = 99.5MHz, f2 = 100.5MHz
33.5
dBm
NF
Noise Figure
Measured Using DC800A Demo Board
13.2
dB
en100M
Input Referred Noise Voltage Density
2.0
nV/√Hz
1dB Compression Point
17.8
dBm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur. Note 3: The LT1993C-10 is guaranteed functional over the operating temperature range of –40°C to 85°C.
Note 4: The LT1993C-10 is guaranteed to meet specified performance from 0°C to 70°C. It is designed, characterized and expected to meet specified performance from –40°C and 85°C but is not tested or QA sampled at these temperatures. The LT1993I-10 is guaranteed to meet specified performance from –40°C to 85°C. Note 5: This parameter is pulse tested. Note 6: This parameter is guaranteed to meet specified performance through design and characterization. It has not been tested. 199310fb
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LT1993-10 U W
TYPICAL PERFOR A CE CHARACTERISTICS Frequency Response RLOAD = 400Ω
Frequency Response vs CLOAD RLOAD = 400Ω
26
32
UNFILTERED OUTPUTS
20
29
11 VIN = 20mVP-P 8 UNFILTERED: RLOAD = 400Ω FILTERED: RLOAD = 350Ω 5 (EXTERNAL) + 50Ω (INTERNAL, FILTERED OUTPUTS) 2 1 100 1000 10 FREQUENCY (MHz)
10pF 5pF
23
1.8pF
20
0pF
5
11 10
100 1000 FREQUENCY (MHz)
10000
–10
THIRD ORDER IMD (dBc)
UNFILTERED OUTPUTS
–30
–40 –50 FILTERED OUTPUTS
–60 –70 –80
UNFILTERED OUTPUTS
–40 –50
–70
–90
–90
–100
–100
20
80 60 40 100 FREQUENCY (MHz)
120
140
–110
0
20
80 60 40 100 FREQUENCY (MHz)
120
199310 G04
30
45
UNFILTERED OUTPUTS
40 35 30
20
80 60 40 100 FREQUENCY (MHz)
UNFILTERED OUTPUTS
40 35
FILTERED OUTPUTS
FILTERED OUTPUTS 25
0
45
30
FILTERED OUTPUTS 25 120
140
199310 G07
20
140
50 OUTPUT IP3 (dBm)
35
OUTPUT IP3 (dBm)
40
120
2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
55
50 UNFILTERED OUTPUTS
80 60 40 100 FREQUENCY (MHz)
60
2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
55
50 45
20
Output Third Order Intercept vs Frequency, Differential Input RLOAD = 100Ω
60 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
55
0
199310 G06
Output Third Order Intercept vs Frequency, Differential Input RLOAD = 400Ω
60
OUTPUT IP3 (dBm)
–110
199310 G05
Output Third Order Intercept vs Frequency, Differential Input No RLOAD
20
140
UNFILTERED OUTPUTS
–80
–90
0
FILTERED OUTPUTS
–60
–100 –110
2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
–20
–30
–70
10000
Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 100Ω
2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
–20
FILTERED OUTPUTS
100 1000 FREQUENCY (MHz)
199310 G03
–10 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING
–40
10
199310 G02
–30 THIRD ORDER IMD (dBc)
1
Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 400Ω
–50
VIN = 20mVP-P UNFILTERED: RLOAD = 100Ω FILTERED: RLOAD = 50Ω (EXTERNAL) + 50Ω (INTERNAL, FILTERED OUTPUTS)
2 1
–10
–80
11
14
Third Order Intermodulation Distortion vs Frequency Differential Input, No RLOAD
–60
FILTERED OUTPUTS 14
8
199310 G01
–20
17
17
10000
UNFILTERED OUTPUTS
20 GAIN (dB)
GAIN (dB)
14
23
26
GAIN (dB)
FILTERED OUTPUTS
17
26
VIN = 20mVP-P UNFILTERED OUTPUTS
THIRD ORDER IMD (dBc)
23
35
Frequency Response RLOAD = 100Ω
25 0
20
80 60 40 100 FREQUENCY (MHz)
120
140
199310 G08
20
0
20
80 60 40 100 FREQUENCY (MHz)
120
140
199310 G09
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LT1993-10 U W
TYPICAL PERFOR A CE CHARACTERISTICS Distortion (Filtered) vs Frequency Differential Input, No RLOAD –10 FILTERED OUTPUTS VOUT = 2VP-P
–20
–30
–30
–40
–40
DISTORTION (dBc)
HD3
–50 –60
HD2
–70 –80
–55 –60 HD3
–50 –60
HD2
–70 –80
–75
–85
–90
–90 –95
–110 10 100 FREQUENCY (MHz)
10 100 FREQUENCY (MHz)
''! /
20
NOISE FIGURE (dB)
10 5
15
10
0 5
–5 –10
0
10 100 FREQUENCY (MHz)
1
1000
10
100 FREQUENCY (MHz)
INPUT IMPEDANCE (MAGNITUDE Ω, PHASE°)
UNFILTERED OUTPUTS
–50 –60 –70 –80 –90 –100 –110 1
10
100 1000 FREQUENCY (MHz)
4
3
2
1
0
10000 199310 G16
10
100 FREQUENCY (MHz)
1000 ''! / #
Differential Input Impedance vs Frequency
Reverse Isolation vs Frequency –40
1000
5
''! / "
199310 G13
11
5 7 9 3 OUTPUT AMPLITUDE (dBm)
199310 G12
INPUT REFERRED NOISE VOLTAGE (nV/ √Hz)
MEASURED USING DC800A DEMO BOARD
RLOAD = 100Ω
15
1
Input Referred Noise Voltage vs Frequency
25
UNFILTERED OUTPUTS
20
–1
Noise Figure vs Frequency
RLOAD = 400Ω
25
1000 199310 G11
Output 1dB Compression vs Frequency 30
HD2 FILTERED OUTPUTS HD2 UNFILTERED OUTPUTS
–100 1
1000
HD3 FILTERED OUTPUTS
–80
–100 1
OUTPUT 1dB COMPRESSION (dBm)
–70
–90
–110
HD3 UNFILTERED OUTPUTS
–65
–100
Differential Output Impedance vs Frequency 100
150
UNFILTERED OUTPUTS
125 100
OUTPUT IMPEDANCE (Ω)
DISTORTION (dBc)
–20
–50 UNFILTERED OUTPUTS VOUT = 2VP-P DISTORTION (dBc)
–10
ISOLATION (dB)
Distortion vs Output Amplitude 70MHz Differential Input, No RLOAD
Distortion (Unfiltered) vs Frequency Differential Input, No RLOAD
IMPEDANCE MAGNITUDE
75 50 25 0
IMPEDANCE PHASE
–25
10
1
–50 –75 0.1
–100 1
10 100 FREQUENCY (MHz)
1000 ''! / %
1
10 100 FREQUENCY (MHz)
1000 ''! / &
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LT1993-10 U W
TYPICAL PERFOR A CE CHARACTERISTICS Input Reflection Coefficient vs Frequency 0
–5 –10 –15 –20 –25 –30 –35 –40 –45
MEASURED USING DC800A DEMO BOARD
–5
90
–10
80
–15
70
–20 –25 –30 –35
10
100 FREQUENCY (MHz)
100 FREQUENCY (MHz)
2.14
Overdrive Recovery Time
RLOAD = 1009 PER OUTPUT
2.6 2.4 2.2 2.0 1.8
1.4
10 15 20 25 30 35 40 45 50 TIME (ns)
0
5
–76 1.2
0
25 50 75 100 125 150 175 200 225 250 TIME (ns)
Turn-Off Time +OUT
+OUT 3
3
VOLTAGE (V)
2
–OUT
1 RLOAD = 100Ω PER OUTPUT
0 4
–OUT
1 0 4
ENABLE
2
2 –74
–OUT
4
2
–72
1.0
Turn-On Time
–66
HD3
1.5
''! / "
4
FILTERED OUTPUTS, NO RLOAD VOUT = 70MHz 2VP-P
–70
RLOAD = 100Ω PER OUTPUT
2.0
''! / !
Distortion vs Output Common Mode Voltage, LT1933-10 Driving LTC2249 14-Bit ADC
–68
2.5
0
10 15 20 25 30 35 40 45 50 TIME (ns)
''! /
–64
3.0
0.5
VOLTAGE (V)
5
+OUT
3.5
1.6
2.12 0
1000
4.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
2.24
2.16
10 100 FREQUENCY (MHz)
199310 G21
Large-Signal Transient Response 2.8
2.18
1
1000 199310 G20
RLOAD = 1009 PER OUTPUT
2.20
PSRR
0 10
3.0
2.22
30
–45
Small-Signal Transient Response 2.26
40
10
199310 G19
2.28
CMRR
50
20
1000
UNFILTERED OUTPUTS
60
–40
–50
–50
DISTORTION (dBc)
PSRR, CMRR vs Frequency 100
PSRR, CMRR (dB)
MEASURED USING DC800A DEMO BOARD
OUTPUT REFLECTION COEFFICIENT (S22)
INPUT REFLECTION COEFFICIENT (S11)
0
Output Reflection Coefficient vs Frequency
HD2
ENABLE 0
0 1.4 1.6 1.8 2.0 2.2 2.4 2.6 OUTPUT COMMON MODE VOLTAGE (V) 199310 G25
–2
0
125
250
375 TIME (ns)
500
625
''! / $
–2
RLOAD = 100Ω PER OUTPUT 0
125
250
375 TIME (ns)
500
625
''! / %
199310fb
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LT1993-10 U W
TYPICAL PERFOR A CE CHARACTERISTICS 50MHz 8192 Point FFT, LT1993-10 Driving LTC2249 14-Bit ADC
30MHz 8192 Point FFT, LT1993-10 Driving LT2249 14-Bit ADC 0
0 8192 POINT FFT fIN = 30MHz, –1dBFS FILTERED OUTPUTS
–10 –20
0
8192 POINT FFT fIN = 50MHz, –1dBFS FILTERED OUTPUTS
–10 –20
–20
–50 –60 –70 –80
–30 AMPLITUDE (dBFS)
AMPLITUDE (dBFS)
–40
–40 –50 –60 –70 –80
–40 –50 –60 –70 –80
–90
–90
–90
–100
–100
–100
–110
–110
–110
–120
–120
–120
0
5
10
15 20 25 30 FREQUENCY (MHz)
35
40
0
5
10
15 20 25 30 FREQUENCY (MHz)
70MHz 2-Tone 32768 Point FFT LT1993-10 Driving LTC2249 14-Bit ADC
0 –10
–60 –70 –80
–30
–40 –50 –60 –70
–70 –80 –90
–100
–110
–110
–110
–120
–120
–120
15 20 25 30 FREQUENCY (MHz)
35
40
40
–60
–100
10
35
–50
–90
5
15 20 25 30 FREQUENCY (MHz)
–40
–80 –90
0
10
32768 POINT FFT TONE CENTER FREQUENCIES AT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz
–20 AMPLITUDE (dBFS)
–50
5
4-Tone WCDMA Waveform LT1993-10 Driving LTC2255 14-Bit ADC at 92.16Msps
–30
–40
0
199310 G30
32768 POINT FFT TONE CENTER FREQUENCIES AT 67.5MHz, 72.5MHz
–20 AMPLITUDE (dBFS)
AMPLITUDE (dBFS)
0 –10
32768 POINT FFT TONE 1 AT 69.5MHz, –7dBFS TONE 2 AT 70.5MHz, –7dBFS FILTERED OUTPUTS
–30
40
2-Tone WCDMA Waveform LT1993-10 Driving LTC2255 14-Bit ADC at 92.16Msps
0 –20
35
199310 G29
199310 G28
–10
8192 POINT FFT fIN = 70MHz, –1dBFS FILTERED OUTPUTS
–10
–30
–30 AMPLITUDE (dBFS)
70MHz 8192 Point FFT, LT1993-10 Driving LTC2249 14-Bit ADC
–100
0
5
10
15 20 25 30 35 FREQUENCY (MHz)
199310 G31
40
45
199310 G32
0
5
10
15 20 25 30 35 FREQUENCY (MHz)
40
45
199310 G33
U
U
U
PI FU CTIO S VOCM (Pin 2): This pin sets the output common mode voltage. Without additional biasing, both inputs bias to this voltage as well. This input is high impedance. VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply (Normally Tied to 5V). All three pins must be tied to the same voltage. Bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible. Split supplies are possible as long as the voltage between VCC and VEE is 5V.
VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply (Normally Tied to Ground). All three pins must be tied to the same voltage. Split supplies are possible as long as the voltage between VCC and VEE is 5V. If these pins are not tied to ground, bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible. +OUT, –OUT (Pins 5, 8): Outputs (Unfiltered). These pins are high bandwidth, low-impedance outputs. The DC output voltage at these pins is set to the voltage applied at VOCM. 199310fb
9
LT1993-10 U
U
U
PI FU CTIO S +OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered Outputs. These pins add a series 25Ω resistor from the unfiltered outputs and three 12pF capacitors. Each output has 12pF to VEE, plus an additional 12pF between each pin (See the Block Diagram). This filter has a –3dB bandwidth of 175MHz.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin. +INA, +INB (Pins 16, 15): Positive Inputs. These pins are normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin.
ENABLE (Pin 11): This pin is a TTL logic input referenced to the VEEC pin. If low, the LT1993-10 is enabled and draws typically 100mA of supply current. If high, the LT1993-10 is disabled and draws typically 250µA.
Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split supplies are used, DO NOT tie the pad to ground.
W
BLOCK DIAGRA
500Ω –INA
100Ω
12pF
–
14 –INB
VEEA
VCCA
+OUT 5
A
100Ω
+OUTFILTERED
+
13
6
25Ω
VEEA VCCC
500Ω
VOCM
+
2
C
12pF
– VEEC
500Ω
25Ω +INA
100Ω
7
+
16 +INB
–OUTFILTERED
VCCB
–OUT 8
B
100Ω
–
15
12pF
VEEB
VEEB
500Ω
BIAS
3
10 VCCA
1 VCCB
11 VCCC
4 ENABLE
9 VEEA
199310 BD
12 VEEB
VEEC
199310fb
10
LT1993-10 U
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APPLICATIO S I FOR ATIO Circuit Description
Input Impedance and Matching Networks
The LT1993-10 is a low noise, low distortion differential amplifier/ADC driver with:
Because of the internal feedback network, calculation of the LT1993-10’s input impedance is not straightforward from examination of the block diagram. Furthermore, the input impedance when driven differentially is different than when driven single-ended. When driven differentially, the LT1993-10’s input impedance is 100Ω (differential); when driven single-ended, the input impedance is 85.9Ω.
• DC to 700MHz –3dB bandwidth • Fixed gain of 10V/V (20dB) independent of RLOAD • 100Ω differential input impedance • Low output impedance • Built-in, user adjustable output filtering • Requires minimal support circuitry Referring to the block diagram, the LT1993-10 uses a closed-loop topology which incorporates 3 internal amplifiers. Two of the amplifiers (A and B) are identical and drive the differential outputs. The third amplifier (C) is used to set the output common mode voltage. Gain and input impedance are set by the 100Ω/500Ω resistors in the internal feedback network. Output impedance is low, determined by the inherent output impedance of amplifiers A and B, and further reduced by internal feedback. The LT1993-10 also includes built-in single-pole output filtering. The user has the choice of using the unfiltered outputs, the filtered outputs (175MHz –3dB lowpass), or modifying the filtered outputs to alter frequency response by adding additional components. Many lowpass and bandpass filters are easily implemented with just one or two additional components. The LT1993-10 has been designed to minimize the need for external support components such as transformers or AC-coupling capacitors. As an ADC driver, the LT1993-10 requires no external components except for power-supply bypass capacitors. This allows DC-coupled operation for applications that have frequency ranges including DC. At the outputs, the common mode voltage is set via the VOCM pin, allowing the LT1993-10 to drive ADCs directly. No output AC-coupling capacitors or transformers are needed. At the inputs, signals can be differential or single-ended with virtually no difference in performance. Furthermore, DC levels at the inputs can be set independently of the output common mode voltage. These input characteristics often eliminate the need for an input transformer and/or AC-coupling capacitors.
For single-ended 50Ω applications, a 121Ω shunt matching resistor to ground will result in the proper input termination (Figure 1). For differential inputs there are several termination options. If the input source is 50Ω differential, then input matching can be accomplished by either a 100Ω shunt resistor across the inputs (Figure 3), or a 49.9Ω shunt resistor on each of the inputs to ground (Figure 2).
13 14
–INB
0.1mF
8
LT1993-10 15
IF IN ZIN = 50W SINGLE-ENDED
–OUT
–INA
16
121W
+INB +INA
+OUT
5
199310 F01
Figure 1. Input Termination for Single-Ended 50Ω Input Impedance
13 IF IN– ZIN = 509 DIFFERENTIAL
14
–INB –INA
49.99
8
LT1993-10 15
IF IN+
–OUT
16
+INB
+OUT
+INA
5
49.99
199310 F02
Figure 2. Input Termination for Differential 50Ω Input Impedance
13 IF IN– ZIN = 509 DIFFERENTIAL
14
–INA
1009
–OUT
8
LT1993-10 15
IF IN+
–INB
16
+INB +INA
+OUT
5
199310 F03
Figure 3. Alternate Input Termination for Differential 50Ω Input Impedance 199310fb
11
LT1993-10 U
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U
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APPLICATIO S I FOR ATIO Single-Ended to Differential Operation
The LT1993-10’s performance with single-ended inputs is comparable to its performance with differential inputs. This excellent single-ended performance is largely due to the internal topology of the LT1993-10. Referring to the block diagram, if the +INA and +INB pins are driven with a single-ended signal (while –INA and –INB are tied to AC ground), then the +OUT and –OUT pins are driven differentially without any voltage swing needed from amplifier C. Single-ended to differential conversion using more conventional topologies suffers from performance limitations due to the common mode amplifier. Driving ADCs The LT1993-10 has been specifically designed to interface directly with high speed Analog to Digital Converters (ADCs). In general, these ADCs have differential inputs, with an input impedance of 1k or higher. In addition, there is generally some form of lowpass or bandpass filtering just prior to the ADC to limit input noise at the ADC, thereby improving system signal to noise ratio. Both the unfiltered and filtered outputs of the LT1993-10 can easily drive the high impedance inputs of these differential ADCs. If the filtered outputs are used, then cutoff frequency and the type of filter can be tailored for the specific application if needed. Wideband Applications (Using the +OUT and –OUT Pins) In applications where the full bandwidth of the LT1993-10 is desired, the unfiltered output pins (+OUT and –OUT) should be used. They have a low output impedance; therefore, gain is unaffected by output load. Capacitance in excess of 5pF placed directly on the unfiltered outputs results in additional peaking and reduced performance. When driving an ADC directly, a small series resistance is recommended between the LT1993-10’s outputs and the ADC inputs (Figure 4). This resistance helps eliminate any resonances associated with bond wire inductances of either the ADC inputs or the LT1993-10’s outputs. A value between 10Ω and 25Ω gives excellent results.
–OUT
109 TO 259
8
LT1993-10 +OUT
ADC 109 TO 259 5
199310 F04
Figure 4. Adding Small Series R at LT1993-10 Output
Filtered Applications (Using the +OUTFILTERED and –OUTFILTERED Pins) Filtering at the output of the LT1993-10 is often desired to provide either anti-aliasing or improved signal to noise ratio. To simplify this filtering, the LT1993-10 includes an additional pair of differential outputs (+OUTFILTERED and –OUTFILTERED) which incorporate an internal lowpass filter network with a –3dB bandwidth of 175MHz (Figure 5). These pins each have an output impedance of 25Ω. Internal capacitances are 12pF to VEE on each filtered output, plus an additional 12pF capacitor connected differentially between the two filtered outputs. This resistor/capacitor combination creates filtered outputs that look like a series 25Ω resistor with a 36pF capacitor shunting each filtered output to AC ground, giving a –3dB bandwidth of 175MHz. LT1993-10
8 –OUT VEE 259
12pF
259 7 –OUTFILTERED FILTERED OUTPUT (350MHz)
12pF
259
6 +OUTFILTERED 12pF VEE
259 5 +OUT 199310 F05
Figure 5. LT1993-10 Internal Filter Topology –3dB BW ≈175MHz
The filter cutoff frequency is easily modified with just a few external components. To increase the cutoff frequency, simply add 2 equal value resistors, one between +OUT and +OUTFILTERED and the other between –OUT and –OUTFILTERED (Figure 6). These resistors are in parallel with the internal 25Ω resistor, lowering the overall resistance and increasing filter bandwidth. To double the filter bandwidth, for example, add two external 25Ω resistors to lower the series resistance to 12.5Ω. The 36pF of capacitance remains unchanged, so filter bandwidth doubles. 199310fb
12
LT1993-10 U
U
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U
APPLICATIO S I FOR ATIO LT1993-10
LT1993-10
8 –OUT VEE 259
VEE
259
12pF
259
7 –OUTFILTERED
FILTERED OUTPUT (350MHz)
12pF 6 +OUTFILTERED 12pF
Figure 6. LT1993-10 Internal Filter Topology Modified for 2x Filter Bandwidth (2 External Resistors)
To decrease filter bandwidth, add two external capacitors, one from +OUTFILTERED to ground, and the other from –OUTFILTERED to ground. A single differential capacitor connected between +OUTFILTERED and –OUTFILTERED can also be used, but since it is being driven differentially it will appear at each filtered output as a single-ended capacitance of twice the value. To halve the filter bandwidth, for example, two 36pF capacitors could be added (one from each filtered output to ground). Alternatively one 18pF capacitor could be added between the filtered outputs, again halving the filter bandwidth. Combinations of capacitors could be used as well; a three capacitor solution of 12pF from each filtered output to ground plus a 12pF capacitor between the filtered outputs would also halve the filter bandwidth (Figure 7). 8 –OUT
12pF 7 –OUTFILTERED
12pF
12pF
12pF 259
6 +OUTFILTERED
FILTERED OUTPUT (87.5MHz)
12pF
12pF VEE
FILTERED OUTPUT 120pF (71MHz BANDPASS, –3dB @ 55MHz/87MHz)
6 +OUTFILTERED
VEE
19932 F06
VEE
39nH
12pF
5 +OUT
LT1993-10
12pF 259
259
VEE
259
12pF
7 –OUTFILTERED
259
8 –OUT
5 +OUT 199310 F07
Figure 7. LT1993-10 Internal Filter Topology Modified for 1/2x Filter Bandwidth (3 External Capacitors)
Bandpass filtering is also easily implemented with just a few external components. An additional 120pF and 39nH, each added differentially between +OUTFILTERED and –OUTFILTERED creates a bandpass filter with a 71MHz center frequency, –3dB points of 55MHz and 87MHz, and 1.6dB of insertion loss (Figure 8).
5 +OUT 199310 F08
Figure 8. LT1993-10 Output Filter Topology Modified for Bandpass Filtering (1 External Inductor, 1 External Capacitor)
Output Common Mode Adjustment The LT1993-10’s output common mode voltage is set by the VOCM pin. It is a high-impedance input, capable of setting the output common mode voltage anywhere in a range from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically 300MHz, so for applications where the VOCM pin is tied to a DC bias voltage, a 0.1µF capacitor at this pin is recommended. For best distortion performance, the voltage at the VOCM pin should be between 1.8V and 2.6V. When interfacing with most ADCs, there is generally a VOCM output pin that is at about half of the supply voltage of the ADC. For 5V ADCs such as the LTC17XX family, this VOCM output pin should be connected directly (with the addition of a 0.1µF capacitor) to the input VOCM pin of the LT1993-10. For 3V ADCs such as the LTC22XX families, the LT199310 will function properly using the 1.65V from the ADC’s VCM reference pin, but improved Spurious Free Dynamic Range (SFDR) and distortion performance can be achieved by level-shifting the LTC22XX’s VCM reference voltage up to at least 1.8V. This can be accomplished as shown in Figure 9 by using a resistor divider between the LTC22XX’s VCM output pin and VCC and then bypassing the LT1993-10’s VOCM pin with a 0.1µF capacitor. For a common mode voltage above 1.9V, AC coupling capacitors are recommended between the LT1993-10 and the LTC22XX ADC because of the input voltage range constraints of the ADC.
199310fb
13
LT1993-10 U
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U
APPLICATIO S I FOR ATIO
input bias current is determined by the voltage difference between the input common mode voltage and the VOCM pin (which sets the output common mode voltage). At both the positive and negative inputs, any voltage difference is imposed across 100Ω, generating an input bias current. For example, if the inputs are tied to 2.5V with the VOCM pin at 2.2V, then a total input bias current of 3mA will flow into the LT1993-10’s +INA and +INB pins. Furthermore, an additional input bias current totaling 3mA will flow into the –INA and –INB inputs.
3V 11k 1.9V 0.1mF 13 14
–INB –INA
2 VOCM +OUTFILTERED
0.1mF
31 1.5V 6
IF IN
16
–OUTFILTERED +INB
109
1
109
LT1993-10 15
4.02k VCM AIN+ LTC22xx
7
2
AIN–
+INA
80.69
199310 F09
Figure 9. Level Shifting 3V ADC VCM Voltage for Improved SFDR
Application (Demo) Boards
Large Output Voltage Swings The LT1993-10 has been designed to provide the 3.2VP-P output swing needed by the LTC1748 family of 14-bit low-noise ADCs. This additional output swing improves system SNR by up to 4dB. Typical performance curves and AC specifications have been included for these applications. Input Bias Voltage and Bias Current The input pins of the LT1993-10 are internally biased to the voltage applied to the VOCM pin. No external biasing resistors are needed, even for AC-coupled operation. The
The DC800A Demo Board has been created for stand-alone evaluation of the LT1993-10 with either single-ended or differential input and output signals. As shown, it accepts a single-ended input and produces a single-ended output so that the LT1993-10 can be evaluated using standard laboratory test equipment. For more information on this Demo Board, please refer to the Demo Board section of this datasheet. There are also additional demo boards available that combine the LT1993-10 with a variety of different Linear Technology ADCs. Please contact the factory for more information on these demo boards.
U
PACKAGE DESCRIPTIO
UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) BOTTOM VIEW—EXPOSED PAD 3.00 ± 0.10 (4 SIDES) 0.70 ±0.05
15
PIN 1 TOP MARK (NOTE 6)
0.40 ± 0.10
PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC
16
1 1.45 ± 0.10 (4-SIDES)
3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES)
PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER
R = 0.115 TYP
0.75 ± 0.05
2
(UD16) QFN 0904
0.200 REF 0.00 – 0.05
0.25 ± 0.05 0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 199310fb
14
LT1993-10 U
TYPICAL APPLICATIO
199310fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1993-10 U
TYPICAL APPLICATIO
Demo Circuit DC800A Schematic (AC Test Circuit) R18 0W
R17 0W
GND 1 SW1
TP1 ENABLE
VCC
VCC
VCC 3
2 R16 0W
2
2
C17 1000pF
1
1
C18 0.01mF
1
1
J1 –IN
T1 5 1:1 Z-RATIO
1
•
•
2
0dB
4
MA/COM ETC1-1-13
3
R6 0W
16
+INA VCCC
2
R3 50W
1
VCC C10 0.01mF
VCC
2 1
R7 [1]
6
+OUTFILTERED
VOCM
VCCA
+OUT VEEA
2
3
4
2
C12 1000pF
C9 2 1000pF 1
1
1
R8 [1]
LT1993-10 +INB
C4 0.1mF
R10 8 24.9W
7
–OUTFILTERED
–INA
15 R5 0W
9
VCCB VEEB –OUT
0dB
C1 0.1mF
10
ENABLE
–INB
14
2
1 R1 [1]
13
C21 0.1mF
11
VEEC
2
1 J2 +IN
12
C2 0.1mF
R9 5 24.9W
L1 [1]
1
C11 [1]
2
R14 0W
R12 75W
2
J4 –OUT
T2 3 4:1 Z-RATIO 4
2
C8 [1]
1
R15 [1]
+18.8dB
+14dB
2 1
C3 0.1mF 1
2
VCC 2
1
R11 75W 1
2
C16 [1]
2
1
•
R4 50W
•
R2 0W
5 MINI+8dB CIRCUITS TCM 4-19
C22 0.1mF
J5 +OUT
R13 [1]
C13 0.01mF
R19 14k J3 VOCM
2
R20 11k
C7 0.01mF
1
C5 0.1mF 1
•
•
2
C19 0.1mF 1
4
TP2 VCC 1
2 1
1 R21 [1]
2
2 1
C15 1mF
C20 0.1mF 1
2
1
2
T4 4:1
3
4
J7 TEST OUT
2 1
3 MINICIRCUITS TCM 4-19 VCC
C14 4.7mF
C6 0.1mF
2 R22 [1]
•
T3 1:4
5
•
J6 TEST IN
5 MINICIRCUITS TCM 4-19
NOTES: UNLESS OTHERWISE SPECIFIED, [1] DO NOT STUFF.
TP3 GND 1 199310 TA03
RELATED PARTS PART NUMBER
DESCRIPTION
COMMENTS
LT1993-2
800MHz Differential Amplifier/ADC Driver
Av = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz
LT1993-4
900MHz Differential Amplifier/ADC Driver
Av = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz
LT5514
Ultralow Distortion IF Amplifier/ADC Driver
Digitally Controlled Gain Output IP3 47dBm at 100MHz
LT6600-2.5
Very Low Noise Differential Amplifier and 2.5MHz Lowpass Filter
86dB S/N with 3V Supply, SO-8 Package
LT6600-5
Very Low Noise Differential Amplifier and 5MHz Lowpass Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-10
Very Low Noise Differential Amplifier and 10MHz Lowpass Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-20
Very Low Noise Differential Amplifier and 20MHz Lowpass Filter
76dB S/N with 3V Supply, SO-8 Package 199310fb
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Linear Technology Corporation
LT 0406 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507
●
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