1/3-inch Soc Megapixel Cmos Digital Image Sensor Mt9m131i99stc (pb-free Icsp) Mt9m131c12stc (pb-free Clcc)

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Preliminary‡ MT9M131: SOC Megapixel Digital Image Sensor Features 1/3-Inch SOC Megapixel CMOS Digital Image Sensor MT9M131I99STC (Pb-Free iCSP) MT9M131C12STC (Pb-Free CLCC) Features Table 1: • DigitalClarity® CMOS imaging technology • System-on-a-Chip (SOC)—Completely integrated camera system • Ultra-low power, high fidelity, progressive scan CMOS image sensor • Superior low-light performance • On-chip image flow processor (IFP) performs sophisticated processing: – Color recovery and correction – Sharpening, gamma, lens shading correction – On-the-fly defect correction • Electronic pan, tilt, and zoom • Automatic features: – Auto exposure, auto white balance (AWB), auto black reference (ABR), auto flicker avoidance, auto color saturation, auto defect identification and correction – Fully automatic Xenon and LED-type flash support • Fast exposure adaptation • Multiple parameter contexts • Easy and fast mode switching • Camera control sequencer automates: – Snapshots – Snapshots with flash – Video clips • Simple two-wire serial programming interface • ITU-R BT.656 (YCbCr), 565RGB, 555RGB, or 444RGB formats (progressive scan) • Raw and processed Bayer formats • Output FIFO and integer clock divider: – Uniform pixel clocking Active pixels Pixel size Color filter array Shutter type Maximum data rate/ Maximum master clock Frame SXGA Rate (1,280 x 1,0 24) QSXGA (640 x 512) Max. resolution at 60 fps w/ 54 MHz clock ADC resolution Responsivity Dynamic range SNRMAX I/O digital Supply voltage Core digital Analog Power consumption 1/3-inch (5:4) 4.6mm (H) x 3.7mm (V), 5.9mm diagonal 1,280H x 1,024V 3.6µm x 3.6µm RGB Bayer pattern Electronic rolling shutter (ERS) 27 MPS/54 MHz 15 fps at 54 MHz 30 fps at 54 MHz 640 x 512 10-bit, dual on-chip 1.0 V/lux-sec (550nm) 71dB 44dB 1.8–3.1V 2.5–3.1V 2.5–3.1V 170mW SXGA at 15 fps (54 MHz CLKIN) 90mW QSXGA at 30 fps (54 MHz low-power mode) Operating temperature –30 °C to +70 °C Packaging 44-ball iCSP 48-pin CLCC Table 2: Security Biometrics Videoconferencing Toys PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_1.fm - Rev. B 3/07 EN Typical Value Optical format Active imager size Applications • • • • Key Performance Parameters Parameter Ordering Information Part Number MT9M131I99STC MT9M131C12STC ES MT9M131C12STCD ES MT9M131C12STCH ES 1 Description 44-ball iCSP 48-pin CLCC ES Demo kit Demo kit headboard Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2006 Micron Technology, Inc. All rights reserved. ‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications. Preliminary MT9M131: SOC Megapixel Digital Image Sensor General Description General Description The Micron® Imaging MT9M131 is an SXGA-format single-chip camera with a 1/3-inch CMOS active-pixel digital image sensor. This device combines the MT9M011 image sensor core with fourth-generation digital image flow processor technology from Micron Imaging. It captures high-quality color images at SXGA resolution. The MT9M131 features DigitalClarity™, Micron’s breakthrough, low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost and integration advantages of CMOS. The sensor is a complete camera-on-a-chip solution designed specifically to meet the low-power, high fidelity demands of products such as security, biometrics, and videoconferencing cameras. It incorporates sophisticated camera functions on-chip and is programmable through a simple two-wire serial interface. The MT9M131 performs sophisticated processing functions including color recovery, color correction, sharpening, programmable gamma correction, auto black reference clamping, auto exposure, automatic 50Hz/60Hz flicker avoidance, lens shading correction, auto white balance (AWB), and on-the-fly defect identification and correction. Additional features include day/night mode configurations; special camera effects such as sepia tone and solarization; and interpolation to arbitrary image size with continuous filtered zoom and pan. The device supports both Xenon and LED-type flash light sources in several snapshot modes. The MT9M131 can be programmed to output progressive-scan images up to 30 frames per second (fps) in preview power-saving mode, and 15 fps in full-resolution (SXGA) mode. In either mode, the image data can be output in any one of six 8-bit formats: • ITU-R BT.656 (formerly CCIR656, progressive scan only) YCbCr • 565RGB • 555RGB • 444RGB • Raw Bayer • Processed Bayer The FRAME_VALID (FV) and LINE_VALID (LV) signals are output on dedicated signals, along with a pixel clock that is synchronous with valid data. Table 3 lists typical values of MT9M131 performance parameters. Table 3: MT9M131 Detailed Performance Parameters PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN Parameter Typical Output Gain Read Noise 25 e-/LSB 7 e-RMS@ 16X 2 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor General Description Figure 1: MT9M131 Quantum Efficiency vs. Wavelength 50 45 Blue Green Quantum Efficiency (%) 40 Red 35 30 25 20 15 10 5 0 350 450 550 650 750 850 950 1050 Wavelength (nm) PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 3 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Functional Overview Functional Overview The MT9M131 is a fully-automatic, single-chip camera, requiring only a power supply, lens, and clock source for basic operation. Output video is streamed through a parallel 8-bit DOUT port, shown in Figure 2. Figure 2: SCLK SDATA CLK_IN STANDBY OE# Functional Block Diagram Sensor Core 1,316H x 1,048V including black 1/3-inch optical format Auto black compensation Programmable analog gain Programmable exposure Dual 10-bit ADCs Low-power preview mode H/W context switch to/from preview Bayer RGB output Pixel Data SRAM Line Buffers Control Bus (Two-Wire Serial I/F Transactions) Control Bus (Two-Wire Serial I/F Transactions) + Sensor control (gains, shutter, etc.) Image Flow Processor Camera Control VDDQ/DGNDQ VDD/DGND VAA/AGND VAAPIX Auto exposure Auto white balance Flicker detect/avoid Camera control: snapshots, flash, video, clip Control Bus (Two-Wire Serial I/F Trans.) Image Data Image Flow Processor Colorpipe Lens shading correction Color interpolation Filtered resize and zoom Defect correction Color correction Gamma correction Color conversion + formatting Output FIFO DOUT[7:0] PIXCLK FV LV STROBE The output pixel clock is used to latch data, while FV and LV signals indicate the active video. The MT9M131 internal registers are configured using a two-wire serial interface. The device can be put in low-power sleep mode by asserting STANDBY and shutting down the clock. Output pins can be tri-stated by de-asserting OE#. Both tri-stating output pins and entry in standby mode also can be achieved by two-wire serial interface register writes. The MT9M131 accepts input clocks up to 54 MHz, delivering up to 15 fps for SXGA resolution images, and up to 30 fps for QSXGA (full field-of-view, sensor pixel skipping) images. The device also supports a low- power preview configuration that delivers SXGA images at 7.5 fps and QSXGA images at 30 fps. The device can be programmed to slow the frame rate in low-light conditions to achieve longer exposures and better image quality. PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 4 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Typical Connection Internal Architecture Internally, the MT9M131 consists of a sensor core and an IFP. The IFP is divided in two sections: the colorpipe (CP), and the camera controller (CC). The sensor core captures raw Bayer-encoded images that are then input in the IFP. The CP section of the IFP processes the incoming stream to create interpolated, color-corrected output, and the CC section controls the sensor core to maintain the desired exposure and color balance, and to support snapshot modes. The MT9M131 supports a range of color formats derived from four primary color representations: YCbCr, RGB, raw Bayer (unprocessed, directly from the sensor), and processed Bayer (Bayer format data regenerated from processed RGB). The device also supports a variety of output signaling/timing options: • Standard FV/LV video interface with gated pixel clocks • Standard video interface with uniform clocking • Progressive ITU-R BT.656 marker-embedded video interface with either gated or uniform pixel clocking Typical Connection Figure 3 shows typical MT9M131 device connections. Typical Configuration (Connection) SADDR Two-Wire Serial Interface Master Clock Power-on Reset 2.8V Analog VDD VAAPIX VAA 2.8V Core Digital VDDQ 1.8V–3.1V I/O Digital VDD Figure 3: 0.1µF DOUT[7:0] SCLK FRAME_VALID SDATA LINE_VALID 1.5KΩ To CMOS Camera Port SCLK To Xenon or LED Flash Driver SDATA VDDQ 1.5KΩ RESET# STROBE OE# STANDBY DGNDQ Notes: PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN VAA/VAAPIX 1µF 1µF 0.1µF AGND 0.1µF DGND DGNDQ DGND PIXCLK CLKIN Digital GND 1µF AGND Analog GND 1. For two-wire serial interface, a 1.5KΩ resistor is recommended, but may be greater for slower two-wire speed. 2. VDD, VAA, VAAPIX must all be at the same potential, though if connected, care must be taken to avoid excessive noise injection in the VAA/VAAPIX power domains. 3. Logic levels of all input pins, that is, SADDR, CLKIN, SCLK, SDATA, OE#, STANDBY, and RESET# must be equal to VDDQ. 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Typical Connection For low-noise operation, the MT9M131 requires separate power supplies for analog and digital. Incoming digital and analog ground conductors can be tied together next to the die. Both power supply rails should be decoupled to ground using ceramic capacitors. The use of inductance filters is not recommended. The MT9M131 also supports different digital core (VDD/DGND) and I/O power (VDDQ/ DGNDQ) power domains that can be at different voltages. Pin/Ball Assignment The MT9M131 is available in two configurations, iCSP and CLCC, illustrated in Figure 4 and Figure 5 , respectively. Figure 4: 44-Ball iCSP Assignment 1 2 3 4 5 6 7 A DGND DOUT3 DOUT2 VDDQ CLKIN SCLK DGND B DOUT4 VDD DOUT1 DOUT0 PIXCLK VDD DGNDQ C DOUT5 DOUT6 DGNDQ DGNDQ VDDQ SDATA1 D DOUT7 VDDQ VDDQ TEST_EN E DOUT LSB0 DOUT LSB1 DGNDQ DGNDQ NC VAAPIX F SADDR VDD FRAME VALID STAND BY OE# VAA NC G DGND LINE VALID RESET# VDDQ STROBE NC AGND Top View (Ball Down) Notes: PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 1. The SDATA pin (ball C7) is bidirectional. 6 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Typical Connection DOUT[3] DOUT[2] DOUT[1] DOUT[0] VDD DGND PIXCLK VDDQ DGND CLKIN SCLK NC 48-Pin CLCC Assignment 6 5 4 3 2 1 48 47 46 45 44 43 40 DGND DOUT[5] 10 39 SDATA DOUT[6] 11 38 TEST_EN DOUT[7] 12 37 VDDQ DGND 13 36 DGND VDDQ 14 35 VAAPIX DOUT_LSB0 15 34 AGND DOUT_LSB1 16 33 AGND DGND 17 32 VAA VDD 18 31 VAA PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 20 LV 19 21 22 23 24 25 26 7 27 28 29 30 NC 9 VDDQ DOUT[4] DGND VDD STROBE 41 OE# 8 STANDBY VDD VDD NC DGND 42 RESET# 7 FV DGND SADDR Figure 5: Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Typical Connection Table 4: Pin/Ball Descriptions Signal iCSP Ball CLCC Pin Type Default Operation CLKIN OE# RESET# SADDR SCLK STANDBY SDATA TEST_EN DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DOUT_LSB0 A5 F5 G3 F1 A6 F4 C7 D7 B4 B3 A3 A2 B1 C1 C2 D1 E1 45 26 22 19 44 45 39 38 3 4 5 6 9 10 11 12 15 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Output DOUT_LSB1 E2 16 I/O Output FV LV PIXCLK STROBE AGND DGND F3 G2 B5 G5 G7 A1, A7, G1 21 20 48 27 33, 34 1, 16, 13, 17, 23, 28, 36, 40, 46 I/O I/O I/O I/O Output Output Output Output Supply Supply Master clock in sensor Active LOW: output enable for Data[7:0] Active LOW: asynchronous reset Two-wire serial interface DeviceID selection 1:0xBA, 0:0x90 Two-wire serial interface clock Active HIGH: disables imager Two-wire serial interface data I/O Tie to DGND for normal operation (Manufacturing use only) Data output 2 Data output 3 Data output 4 Data output 5 Data output 6 Data output 7 Data output 8 Data output 9 Sensor bypass mode output 0—typically left unconnected for normal SOC operation Sensor bypass mode output 1—typically left unconnected for normal SOC operation Active HIGH: FRAME_VALID; indicates active frame Active HIGH: LINE_VALID, DATA_VALID; indicates active pixel Pixel clock output Active HIGH: strobe (Xenon) or turn on (LED) flash Analog ground Core digital ground DGNDQ B7, C3, C5, E3, Ee5 F6 31, 32 E7 35 B2, B6, 2, 8, 18, F2 24, 41 A4, C6, 14, 29, D2, D6, 37, 47 G4 E6, F7, 30, 42, G6 43 Supply I/O digital ground Supply Supply Supply Analog power (2.5–3.1V) Pixel array analog power supply (2.5–3.1V) Core digital power (2.5–3.1V) Supply I/O digital power (1.8–3.1V) VAA VAAPIX VDD VDDQ NC Note: PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN – Description No connect All inputs and outputs are implemented with bidirectional buffers. Care must be taken that all inputs are driven and all outputs are driven if tri-stated. 8 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Sensor Core Overview Sensor Core Overview The sensor consists of a pixel array of 1316 x 1048 total, an analog readout chain, 10-bit ADC with programmable gain and black offset, and timing and control. Figure 6: Sensor Core Block Diagram Active Pixel Sensor (APS) Array Control Register Communication Bus to IFP Timing and Control Clock Sync Signals Analog Processing ADC 10-Bit Data to IFP Output Data Format The MT9M131 sensor core image data is read out in a progressive scan. Valid image data is surrounded by horizontal blanking and vertical blanking, shown in Figure 7. LV is HIGH during the shaded region of the figure. Figure 7: Spatial Illustration of Image Readout P0,0 P0,1 P0,2.....................................P0,n-1 P0,n P1,0 P1,1 P1,2.....................................P1,n-1 P1,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 VALID IMAGE HORIZONTAL BLANKING Pm-1,0 Pm-1,1.....................................Pm-1,n-1 Pm-1,n 00 00 00 .................. 00 00 00 Pm,0 Pm,1.....................................Pm,n-1 Pm,n 00 00 00 .................. 00 00 00 PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 VERTICAL BLANKING VERTICAL/HORIZONTAL BLANKING 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 9 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Electrical Specifications Electrical Specifications Table 5: Electrical Characteristics and Operating Conditions TA = Ambient = 25°C Parameter Condition I/O digital voltage (VDDQ) Core digital voltage (VDD) Analog voltage (VAA) Pixel supply voltage (VAAPIX) Leakage current Operating temperature STANDBY, no clocks Measured at junction Note: Table 6: Signal CLKIN Typ 1.8 2.5 2.5 2.5 2.8 2.8 2.8 –30 Max Unit 3.1 3.1 3.1 3.1 10 +70 V V V V µA °C VDD, VAA, and VAAPIX must all be at the same potential to avoid excessive current draw. Care must be taken to avoid excessive noise injection in the analog supplies if all three supplies are tied together. I/O Parameters Parameter Definition All outputs All inputs Min Load capacitance Output pin slew VOH VOL IOH Output high voltage Output low voltage Output high current IOL Output low current IOZ VIH Tri-state output leakage current Input high voltage VIL Input low voltage IIN PIN CAP Freq Input leakage current Ball input capacitance Master clock frequency PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN Condition Min 2.8V, 30pF load 2.8V, 5pF load 1.8V, 30pF load 1.8V, 5pF load Typ Max Unit 30 pF V/ns V/ns V/ns V/ns V V mA mA mA mA µA 0.72 1.25 0.34 0.51 VDDQ = 2.8V, VOH = 2.4V VDDQ = 1.8V, VOH = 1.4V VDDQ = 2.8V, VOL = 0.4V VDDQ = 1.8V, VOL = 0.4V VDDQ = 2.8V VDDQ = 1.8V VDDQ = 2.8V VDDQ = 1.8V VDDQ – 0.3 0 16 8 15.9 10.1 VDDQ 0.3 26.5 15 21.3 16.2 10 2.0 1.2 0.9 0.6 +5 –5 3.5 Absolute minimum SXGA @ 15 fps 10 2 48 54 V V V V µA pF MHz MHz Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Electrical Specifications Caution Table 7: Stresses above those listed in Table 7 may cause permanent damage to the device. Absolute Maximum Ratings Rating Symbol VSUPPLY ISUPPLY IGND VIN VOUT TSTG Notes: Figure 8: Parameter Min Power supply voltage (all supplies) Total power supply current Total ground current DC input voltage DC output voltage Storage temperature –0.3 Max Unit 4.0 V mA mA V V °C 150 150 –0.3 –0.3 –40 VDDQ + 0.3 VDDQ + 0.3 85 1. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the product specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Optical Center Diagram - direction + direction -37.66μm Die Center (0μm, 0μm) First Clear Pixel (26, 8) + direction +15.63μm - direction Last Clear Pixel (1,314, 1,040) Optical Center Note: PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN Figure not to scale. 11 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Package Dimensions Package Dimensions The MT9M131 comes in two packages: the 44-ball iCSP package, shown in Figure 9, and the 48-pin CLCC package, shown in Figure 10 on page 13. Figure 9: 44-Ball iCSP Package 0.950 ±0.075 1.17 ±0.10 B SEATING PLANE 0.10 A A 0.22 (FOR REFERENCE ONLY) 0.175 (FOR REFERENCE ONLY) 0.575 ±0.050 THESE DIMENSIONS ARE NON-ACCUMULATIVE 0.375 ±0.075 4.50 0.75 TYP 44X Ø0.35 6.47 CTR 4.112 ±0.075 BALL A1 BALL A1 ID BALL A1 CORNER BALL A7 DIMENSIONS APPLY TO SOLDER BALLS POST REFLOW. THE PRE-REFLOW DIAMETER IS Ø0.33 0.038 TYP (FOR REFERENCE ONLY) FIRST CLEAR PIXEL 4.134 ±0.075 4.15 ±0.05 2.25 4.50 3.686 CTR CL 8.300 ±0.075 0.016 (FOR REFERENCE ONLY) 0.75 TYP OPTICAL CENTER CL 4.15 ±0.05 6.47 CTR PACKAGE CENTER 4.608 CTR OPTICAL AREA MAXIMUM ROTATION OF OPTICAL AREA RELATIVE TO PACKAGE EDGES: 1º. MAXIMUM TILT OF OPTICAL AREA RELATIVE TO PACKAGE EDGE B 0.3º. 2.25 8.300 ±0.075 SOLDER BALL MATERIAL: 62% Sn, 36% Pb, 2%Ag OR 96.5% Sn, 3%Ag, 0.5 Cu SOLDER MASK DEFINED BALL PADS Ø 0.27 MAXIMUM TILT OF OPTICAL AREA RELATIVE TO TOP OF COVER GLASS: 0.3º. LID MATERIAL: BOROSILICATE GLASS 0.40 THICKNESS IMAGE SENSOR DIE SUBSTRATE MATERIAL: PLASTIC LAMINATE ENCAPSULANT: EPOXY Notes: PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 1. An IR-cut filter is required to obtain optimal image quality. 2. All dimensions are in millimeters. 12 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Package Dimensions Figure 10: 48-Pin CLCC Package 2.3 ±0.2 D 1.7 Seating plane Substrate material: alumina ceramic 0.7 thickness Wall material: alumina ceramic A Lid material: borosilicate glass 0.55 thickness 8.8 47X 1.0 ±0.2 0.8 TYP 4.4 48 48X 0.40 ±0.05 48X R 0.15 H CTR 1.75 Ø0.20 A B C 1 First clear pixel 5.215 4.84 4.4 Ø0.20 A B C 5.715 0.8 TYP 4X 10.9 ±0.1 CTR V CTR 11.43 8.8 Image sensor die: 0.675 thickness 0.2 5.215 5.715 11.43 Lead finish: Au plating, 0.50 microns minimum thickness over Ni plating, 1.27 microns minimum thickness Notes: C Optical area A B 0.05 0.10 A 1.400 ±0.125 0.90 for reference only 0.35 for reference only 10.9 ±0.1 CTR Optical center1 Optical area: Maximum rotation of optical area relative to package edges: 1º Maximum tilt of optical area relative to seating plane A : 50 microns Maximum tilt of optical area relative to top of cover glass D : 100 microns 1. Optical center = package center. 2. An IR-cut filter is required to obtain optimal image quality. 3. All dimensions are in millimeters. ® 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 [email protected] www.micron.com Customer Comment Line: 800-932-4992 Micron, the M logo, the Micron logo, and DigitalClarity are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. Preliminary: This data sheet contains initial characterization limits that are subject to change upon full characterization of production devices. PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 13 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. Preliminary MT9M131: SOC Megapixel Digital Image Sensor Revision History Revision History Rev. A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3/16/2007 • Initial release PDF:09005aef824c90f2/Source: 09005aef824c90f9 MT9M131_LDS_2.fm - Rev. A 3/07 EN 14 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved.