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FEATURES
FUNCTIONAL BLOCK DIAGRAM
High PSAT: 51 dBm Power gain at PSAT: 20 dB Small signal gain: 26 dB Supply Voltage VDD = 32 V at 1400 mA 50 Ω matched input and output 10-lead flange package
1 VGG2
HMC7327
2
10 VDD1 9
VGG1
VDD2 3
8
RFIN
APPLICATIONS Test instrumentation General communications Radar
RFOUT 4
7
5
6
VGG1
VDD2
VGG2
GENERAL DESCRIPTION The HMC7327 is a 120 W gallium nitride (GaN), MMIC power amplifier that operates between 2.7 GHz and 3.8 GHz, packaged in a 10-lead flange mount package.
VDD1
PACKAGE BASE GND
13527-001
Preliminary Technical Data
120 Watt, GaN Flange Mount MMIC Power Amplifier, 2.7 GHz to 3.8 GHz HMC7327
Figure 1.
The amplifier typically provides 26 dB of small signal gain and 51 dBm saturated output power. The amplifier draws 1400 mA quiescent current from a 32 V dc supply. For ease of use, the RF input/outputs are dc blocked and matched to 50 Ω.
Rev. PrA
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HMC7327
Preliminary Technical Data
TABLE OF CONTENTS Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................6
Applications ....................................................................................... 1
Interface Schematics .....................................................................6
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................7
Functional Block Diagram .............................................................. 1
Applications Information .............................................................. 11
Specifications..................................................................................... 3
Application Circuit ..................................................................... 11
Electrical Specifications ............................................................... 3
Evaluation Printed Circuit Board (PCB) ..................................... 12
Total Supply Current by VDD ....................................................... 4
Bill of Materials ........................................................................... 12
Absolute Maximum Ratings ............................................................ 5
Outline Dimensions ....................................................................... 13
ESD Caution .................................................................................. 5
Ordering Guide .......................................................................... 13
Rev. PrA | Page 2 of 13
Preliminary Technical Data
HMC7327
SPECIFICATIONS ELECTRICAL SPECIFICATIONS TA = 25°C, VDD = 32 V, IDD = 1400 mA, PW = 100 μs, duty cycle = 10, frequency range = 2.7 GHz to 3.2 GHz. Table 1. Parameter FREQUENCY RANGE GAIN Small Signal Gain Gain Flatness Gain Variation over Temperature RETURN LOSS Input Output POWER Output Power for 4 dB Compression Power Gain for P4dB Saturated Output Power Power Gain for PSAT Power Added Efficiency TOTAL SUPPLY CURRENT
Symbol
Min 2.7
Typ
Max 3.2
Unit GHz
24
26 ±0.5 0.03
dB dB dB/°C
25 22
dB dB
45
dBm
24 51 20 49 1400
dB dBm dB % mA
Test Conditions/Comments Measured continuous wave (CW)
Measured CW
P4dB
PSAT PAE IDD
PSAT is defined as the output power at PIN = 31 dBm at 25°C PSAT is defined as the output power at PIN = 31 dBm at 25°C PAE at PSAT is defined as the output power at PIN = 31 dBm at 25°C Adjust the gate bias voltage (VGGx) between −8 V and 0 V to achieve an IDD = 1400 mA, typical
TA = 25°C, VDD = 32 V, IDD = 1400 mA, PW = 100 μs, duty cycle= 10, frequency range = 3.2 GHz to 3.8 GHz. Table 2. Parameter FREQUENCY RANGE GAIN Small Signal Gain Gain Flatness Gain Variation over Temperature RETURN LOSS Input Output POWER Output Power for 4 dB Compression Power Gain for P4dB Saturated Output Power Power Gain for PSAT Power Added Efficiency TOTAL SUPPLY CURRENT
Symbol
Min 3.2
Typ
Max 3.8
Unit GHz
24
26 ±0.5 0.03
dB dB dB/°C
30 18
dB dB
47.5
dBm
24 50.5 19.5 49 1400
dB dBm dB % mA
Test Conditions/Comments Measured CW
Measured CW
P4dB
PSAT PAE IDD
PSAT is defined as the output power at PIN = 31 dBm at 25°C PSAT is defined as the output power at PIN = 31 dBm at 25°C PAE at PSAT is defined as the output power at PIN = 31 dBm at 25°C Adjust the gate bias voltage (VGGx) between −8 V and 0 V to achieve an IDD = 1400 mA, typical
Rev. PrA | Page 3 of 13
HMC7327
Preliminary Technical Data
TOTAL SUPPLY CURRENT BY VDD Table 3. Parameter SUPPLY CURRENT VDD = 24 V VDD = 28 V VDD = 32 V
Symbol IDD
Min
Typ
1400 1400 1400
Max
Unit
mA mA mA
Rev. PrA | Page 4 of 13
Test Conditions/Comments Adjust the gate bias voltage (VGGx) between −8 V and 0 V to achieve an IDD = 1400 mA, typical
Preliminary Technical Data
HMC7327
ABSOLUTE MAXIMUM RATINGS Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
Table 4. Parameter Drain Bias Voltage (VDDx) Gate Bias Voltage (VGGx) RF Input Power (RFIN) Channel Temperature Continuous PDISS (T = 85°C) (Derate TBD mw/°C above 85°C) Thermal Resistance1 (Channel to Die Bottom) Maximum Voltage Standing Wave Ratio (VSWR)2 Storage Temperature Range Operating Temperature Range 1 2
Rating 36 V −8 V to 0 V 34 dBm 225°C 143 W 0.98°C/W TBD
ESD CAUTION
−65°C to +150°C −40°C to +85°C
Junction to back of package. Continuous wave (CW) operation. Restricted by maximum power dissipation.
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HMC7327
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
10
2
9
VDD1
VGG2
VDD2
VGG1 3 RFIN
HMC7327
8 RFOUT
TOP VIEW (Not to Scale) 4
7
5
6
VDD2
VGG1
PACKAGE BASE GND
13527-002
VDD1
VGG2
Figure 2. Pin Configuration
Table 5. Pad Function Descriptions Pad No. 1, 5 2, 4 3 6, 10 7, 9 8
Mnemonic VGG2 VGG1 RFIN VDD1 VDD2 RFOUT
Description Gate Control Voltage for Second Stage. See Figure 3 for the VGG2 interface schematic. Gate Control Voltage for First Stage. See Figure 4 for the VGG1 interface schematic. RF Input. This pin is dc-coupled and matched to 50 Ω. See Figure 5 for the RFIN interface schematic. Drain Bias for First Stage. See Figure 6 for the VDD1 interface schematic. Drain Bias for Second Stage. See Figure 7 for the VDD2 interface schematic. RF Output. This pad is RF-coupled and matched to 50 Ω. See Figure 8 for the RFOUT interface schematic.
INTERFACE SCHEMATICS VDD1 13527-006
13527-003
VGG2
Figure 3. VGG2 Interface
Figure 6. VDD1 Interface VDD2 13527-007
13527-004
VGG1
Figure 7. VDD2 Interface
Figure 4. VGG1 Interface
RFOUT 13527-005
13527-008
RFIN
Figure 5. RFIN Interface
Figure 8. RFOUT Interface
Rev. PrA | Page 6 of 13
Preliminary Technical Data
HMC7327
TYPICAL PERFORMANCE CHARACTERISTICS 30
30
20
GAIN (dB)
RESPONSE (dB)
25
S22 S21 S11
10 0 –10 –20
20 +85°C +25°C –40°C 15
3.4
3.0
2.6
4.2
3.8
4.6
FREQUENCY (GHz)
10 2.6
13527-009
–40 2.2
Figure 9. Gain and Return Loss, Measured CW
2.8
3.0
3.2
3.4
3.6
3.8
4.0
FREQUENCY (GHz)
13527-012
–30
Figure 12. Gain vs. Frequency at Various Temperatures, Measured CW
30
0 –5
RETURN LOSS (dB)
GAIN (dB)
+85°C +25°C –40°C
–10
25
20 24V 28V 32V 15
–15 –20 –25 –30 –35
2.8
3.0
3.2
3.4
3.6
3.8
4.0
FREQUENCY (GHz)
–45 2.6
13527-010
10 2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
FREQUENCY (GHz)
13527-013
–40
Figure 13. Input Return Loss vs. Frequency at Various Temperatures, Measured CW
Figure 10. Gain vs. Frequency at Various VDD, Measured CW
52
0
50 +85°C +25°C –40°C
48
–10
POUT (dBm)
RETURN LOSS (dB)
–5
–15
46 44 P4dB PSAT
42
–20 40 –25
2.8
3.0
3.2
3.4
FREQUENCY (GHz)
3.6
3.8
4.0
36 2.6
13527-011
–30 2.6
Figure 11. Output Return Loss vs. Frequency at Various Temperatures, Measured CW
2.8
3.0
3.2
3.4
FREQUENCY (GHz)
3.6
3.8
4.0
13527-014
38
Figure 14. POUT vs. Frequency, PSAT is Output Power at PIN = 31 dBm at 25°C
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Preliminary Technical Data 52
50
50
48
48
46
46
44 +85°C +25°C –40°C
40
40
38
38
2.8
3.0
3.2
3.4
3.6
3.8
4.0
FREQUENCY (GHz)
36 2.6
50
50
48
48
PSAT (dBm)
46 +85°C +25°C –40°C
42
38
3.4
3.6
3.8
4.0
FREQUENCY (GHz)
Figure 16. PSAT vs. Frequency at Various Temperatures, PSAT Defined as Output Power at PIN = 31 dBm at +25°C, PIN = 32 dBm at +85°C, PIN = 29 dBm at −40°C
36 2.6
50
50
48
48
PSAT (dBm)
46 700mA 1400mA 2100mA
42
38
3.6
3.8
4.0
FREQUENCY (GHz)
Figure 17. P4dB vs. Frequency at Various Quiescent Currents
36 2.6
13527-017
3.4
3.0
3.2
3.4
3.6
3.8
4.0
700mA 1400mA 2100mA
42
38
3.2
2.8
44
40
3.0
24V 28V 32V 36V
46
40
2.8
4.0
Figure 19. PSAT vs. Frequency at Various Supply Voltages, PSAT Defined as Output Power at PIN = 31 dBm at 25°C 52
36 2.6
3.8
FREQUENCY (GHz)
52
44
3.6
42
38
3.2
3.4
44
40
3.0
3.2
46
40
13527-016
PSAT (dBm)
52
2.8
3.0
Figure 18. P4dB vs. Frequency at Various Supply Voltages
52
36 2.6
2.8
FREQUENCY (GHz)
Figure 15. P4dB vs. Frequency at Various Temperatures
44
24V 28V 32V 36V
13527-019
36 2.6
P4dB (dBm)
42
2.8
3.0
3.2
3.4
FREQUENCY (GHz)
3.6
3.8
4.0
13527-020
42
44
13527-018
P4dB (dBm)
52
13527-015
P4dB (dBm)
HMC7327
Figure 20. PSAT vs. Frequency at Various Quiescent Currents, PSAT Defined as Output Power at PIN = 31 dBm at 25°C
Rev. PrA | Page 8 of 13
HMC7327 60
25
50
15 P4dBm PSAT
5
FREQUENCY (GHz)
8000
30
6000
20
4000
10
2000
0
0 0
5
50
8000
30
6000
20
4000
10
2000
0
0 0
5
10
15
20
25
30
POUT (dBm), GAIN (dB), PAE (%)
10000
35
INPUT POWER (dBm)
8000
30
6000
20
4000
10
2000
0 0
5
ISOLATION (dB)
–20
40 +85°C +25°C –40°C
10
–60
3.3
3.4
FREQUENCY (GHz)
3.5
3.6
25
30
35
3.7
3.8
Figure 23. PAE vs. Frequency at Various Temperatures, PAE at PSAT Defined as Output Power at PIN = 31 dBm at 25°C, PIN = 32 dBm at 85°C, and PIN = 29 dBm at −40°C
+85°C +25°C –40°C
–40 –50
3.2
20
–30
20
–70 2.7
13527-033
PAE (%)
50
3.1
15
Figure 25. Power Compression at 3.8 GHz
–10
3.0
10
INPUT POWER (dBm)
60
2.9
10000
40
0
2.8
35
POUT GAIN PAE IDD
70
0 2.7
30
12000
Figure 22. Power Compression at 3.2 GHz
30
25
0
13527-022
POUT (dBm), GAIN (dB), PAE (%)
60
40
20
Figure 24. Power Compression at 2.7 GHz
12000
IDD (mA)
POUT GAIN PAE IDD
50
15
INPUT POWER (dBm)
Figure 21. Power Gain vs. Frequency, Power Gain at PSAT Defined as Output Power at PIN = 31 dBm at 25°C 60
10
IDD (mA)
4.0
40
13527-024
3.8
3.6
3.4
3.2
3.0
2.8
13527-021
0 2.6
10000
2.8
2.9
3.0
3.1
3.2
3.3
3.4
FREQUENCY (GHz)
3.5
3.6
3.7
3.8
13527-025
10
POUT GAIN PAE IDD
13527-023
20
12000
IDD (mA)
30
POUT (dBm), GAIN (dB), PAE (%)
POWER GAIN (dB)
Preliminary Technical Data
Figure 26. Reverse Isolation vs. Frequency at Various Temperatures, Measured CW
Rev. PrA | Page 9 of 13
Preliminary Technical Data
60
60
55
55
GAIN (dB), P4dB (dBm), PSAT (dBm)
50 45 40
GAIN P4dB PSAT
35 30 25 20 15
45 40
30 25 20
30
32
34
36
10 700
Figure 27. Gain and Power vs. Supply Voltage at 3.2 GHz, PSAT Defined as Output Power at PIN = 31 dBm at 25°C
45
40
40
SECOND HARMONIC (dBc)
50
25 +85°C +25°C –40°C
20 15
3.3
3.4
3.5
3.6
3.7
3.8
15
FREQUENCY (GHz)
0 2.7
13527-027
3.2
Figure 28. Second Harmonics vs. Frequency at Various Temperatures, POUT = 35 dBm
24V 28V 32V
20
5
3.1
2100
25
5
3.0
1900
30
10
2.9
1700
1500
35
10
2.8
1300
Figure 30. Gain and Power vs. Supply Current at 3.2 GHz, PSAT Defined as Output Power at PIN = 31 dBm at 25°C
45
30
1100
IDD (mA)
50
35
900
13527-029
28
13527-026
26
VDD (V)
0 2.7
GAIN P4dB PSAT
35
15
10 24
SECOND HARMONIC (dBc)
50
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
FREQUENCY (GHz)
13527-030
GAIN (dB), P4dB (dBm), PSAT (dBm)
HMC7327
Figure 31. Second Harmonics vs. Frequency at Various Supply Voltages, POUT = 35 dBm 180
50
170
45
160
POWER DISSIPATION (W)
35 30 25 25dBm 30dBm 35dBm 40dBm 44dBm
20 15
140 130 120 110 100 90 80 60
5
50 2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
FREQUENCY (GHz)
Figure 29. Second Harmonics vs. Frequency at Various POUT Levels
40 0
5
10
15
20
25
INPUT POWER (dBm)
Figure 32. Power Dissipation at 85°C
Rev. PrA | Page 10 of 13
30
35
13527-031
0 2.7
2.7GHz 3.0GHz 3.3GHz 3.6GHz 3.8GHz
150
70
10
13527-028
SECOND HARMONIC (dBc)
40
Preliminary Technical Data
HMC7327
APPLICATIONS INFORMATION APPLICATION CIRCUIT VGG1, VGG2
C7 10µF
HMC7327
10
2
9
3
8
4
7
5
6
C2 1000pF
RFIN
C3 1µF
1
C4 1000pF
C6 1000pF RFOUT
C5 1000pF 13527-032
C1 1µF
VDD1, VDD2
Figure 33. Typical Application Circuit
Rev. PrA | Page 11 of 13
HMC7327
Preliminary Technical Data
13527-034
EVALUATION PRINTED CIRCUIT BOARD (PCB)
Figure 34. Evaluation PCB
BILL OF MATERIALS Use RF circuit design techniques for the circuit board used in the application. Provide 50 Ω impedance for the signal lines and connect the package ground leads and exposed paddle directly to the ground plane, similar to that shown in Figure 34. Use a sufficient number of via holes to connect the top and bottom ground planes. The evaluation circuit board shown is available from Analog Devices, Inc., upon request.
Table 6. Bill of Materials for Evaluation PCB EVAL01HMC7327F10A Item J2, J3 J1 JP4, JP5 C1, C3 C2, C4, C5, C6 C7 U1 PCB
Rev. PrA | Page 12 of 13
Description SRI K connector. DC pins. Preform jumpers. 1 μF capacitors, 0603 package. 1000 pF capacitors, 0603 package. 10 μF capacitor, 1210 package. HMC7327F10A. 600-01312-00 evaluation PCB. Circuit board material: Rogers 4350 or Arlon 25FR.
Preliminary Technical Data
HMC7327
OUTLINE DIMENSIONS 0.450
0.042 0.053 0.075
0.116 PIN 1 INDICATOR 0.138 1
10
0.288
0.010 0.388 0.350 SQ
0.682
0.576 5
0.050
6
Ø 0.070
TOP VIEW
0.100
0.025 SIDE VIEW
0.053
PKG-000000
08-06-2015-A
0.342
Figure 35. 10-Lead Module with Flange Heat Sink [CFMP] (MF-10-1) Dimensions shown in inches
ORDERING GUIDE Model 1, 2 HMC7327F10A
Temperature −40°C to +85°C
Description 3 10-Lead Module with Flange Heat Sink [CFMP]
Package Option MF-10-1
Package Marking 4 H7327 XXXX
EVAL01-HMC7327F10A
Evaluation fixture only
When ordering the evaluation fixture only, reference the model number, EVAL01-HMC7327F10A. The HMC7327F10A and the EVAL01-HMC7327F10A are not in production; for samples, contact an Analog Devices, Inc., sales representative. 3 HMC7327F10A lead finish is NiAu and the package is Copper 15 Tungston 85. 4 HMC7327F10A 4-digit lot number is represented by XXXX. 1 2
©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR13527-0-9/15(PrA)
Rev. PrA | Page 13 of 13
