Transcript
36R41TG82 4GB PC3-10600 9-9-9-24 DDR3 Registered DIMM 仕様概要 Specifications ・Density: 4GB
・Interface: SSTL_15
・Organization
・Burst lengths (BL): 8 and 4 with Burst Chop (BC)
－512M words×72 bits, 2 ranks
・/CAS Latency (CL): 6, 7, 8, 9
・Mounting 18 pieces of 2G bits DDR3 SDRAM
・/CAS write latency (CWL): 5, 6, 7
sealed in FBGA
・Precharge: auto precharge option
・Package: 240-pin socket type
for each burst access
dual in line memory module (DIMM)
・Refresh: auto-refresh, self-refresh
－PCB height: 30.0mm
・Refresh cycles
－Lead pitch: 1.0mm
－Average refresh period
－Lead-free (RoHS compliant), Halogen-free
7.8μs at 0℃≦TC≦+85℃
・Power supply: VDD=1.5V±0.075V
3.9μs at +85℃＜TC≦+95℃
・Data rate: 1333Mbps (max.)
・Operating case temperature range
・Eight internal banks for concurrent operation
－TC=0℃ to +95℃
特徴 Features ・Double-data-rate architecture;
・On-Die-Termination (ODT) for better signal quality
two data transfers per clock cycle
－Synchronous ODT
・The high-speed data transfer is realized
－Dynamic ODT
by the 8 bits prefetch pipelined architecture
－Asynchronous ODT
・Bi-directional differential data strobe
・Multi Purpose Register (MPR)
(DQS and /DQS) is transmitted/received
for temperature read out
with data for capturing data at the receiver
・ZQ calibration for DQ drive and ODT
・DQS is edge-aligned with data for READs;
・/RESET pin for Power-up sequence
center aligned with data for WRITEs
and reset function
・Differential clock inputs (CK and /CK)
・SRT range:
・DLL aligns DQ and DQS transitions
－Normal/extended
with CK transitions
－Auto/manual self-refresh
・Commands entered on each positive CK edge; data and data mask referenced
・Programmable Output driver impedance control ・1 piece of registering clock driver and 1 piece of
to both edges of DQS
serial EEPROM for Presence Detect (PD)
・Data mask (DM) for write data
・Class B temperature sensor functionality with
・Posted /CAS by programmable additive latency for better command and data bus efficiency
EEPROM ・JEDEC Standard SPD programming
Note: Do not push the components or drop the modules in order to avoid mechanical defects, which may result in electrical defects. Not containing chromium (Ⅵ), lead, mercury, cadmium, PBB, PBDE, and chlorinated paraffin. But except an exclusion use. About the details obey the latest RoHS. Key SDRAM Timing Parameters tCK tAA tRCD 1.5ns 13.5ns 13.5ns DATA SHEET 36r41tg82_3-0
tRP 13.5ns
tRAS 36.0ns
tRC 49.5ns
Frequency 667MHz
DDR3 1333 1
36R41TG82 外形図 Physical Outline (JEDEC Raw Card Version B, 2-Rank×8)
TOP SIDE
2.30
9.50
17.30
30.00
3.00±0.10
2.10±0.15
2-Φ2.50
3.00±0.10
2.10±0.15
SEE DETAIL 12.00 128.95 133.35
BOTTOM SIDE DETAIL
SIDE VIEW 4.00MAX 1.00
TOP SIDE
BOTTOM SIDE
4.00MIN
1.50±0.10 2.50
0.20±0.10
2.50
3.80
0.80±0.05
0.50MIN
R0.75
5.00 1.27±0.10
DATA SHEET 36r41tg82_3-0
2
36R41TG82 外形図 Physical Outline (High Performance Heat Spreader Option) ※ヒートスプレッダーはオプションです
TOP SIDE
≦31.00
≦135.35
CENTURY MICRO INC.
CLIP:SUS301(0.6t)
THICK HEAT SPREADER:AL1050(0.8t)
≦7.55
BOTTOM SIDE
SIDE VIEW
19.50
WIDE ATTACHED HIGH PERFORMANCE THERMAL INTERFACE MATERIAL(0.25t)
122.00
HEAT SPREADER INSIDE
製造・販売元 センチュリーマイクロ株式会社
〒141-0031 東京都品川区西五反田 8-9-5 ポーラ第 3 五反田ビル 2F
CENTURY MICRO INC. 2F.POLA GOTANDA BLDG.3, 8-9-5, NISHIGOTANDA, SHI NAGAWA-KU, TOKYO 141-0031, JAPAN TEL:03-5437-2611 FAX:03-5437-2618 http://www.century-micro.co.jp support@centur y-micro.co.jp DATA SHEET 36r41tg82_3-0
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