Transcript
O PA
452
OPA
4 52
OPA
452
OPA452 OPA453
SBOS127C – JULY 2000 – REVISED NOVEMBER 2003
80V, 50mA OPERATIONAL AMPLIFIERS FEATURES
DESCRIPTION
● WIDE POWER-SUPPLY RANGE: ±10V to ±40V ● HIGH OUTPUT LOAD DRIVE: 50mA Continuous ● WIDE OUTPUT VOLTAGE SWING: 1V to Rail ● FULLY PROTECTED: Thermal Shutdown Output Current-Limited ● WIDE OPERATING TEMPERATURE RANGE: –40°C TO +125°C ● PACKAGE OPTIONS: TO220-7 DDPACK-7 Surface-Mount
The OPA452 and OPA453 are low-cost operational amplifiers with high-voltage (80V) and high-current capabilities (50mA). The OPA452 is unity-gain stable and has a gain bandwidth product of 1.8MHz, whereas the OPA453 is optimized for gains greater than 5 and has a 7.5MHz bandwidth. The OPA452 and OPA453 are internally protected against over-temperature conditions and current overloads. Power supplies in the range of ±10V to ±40V can be used. Unlike most other power op amps, the OPA452 and OPA453 have ensured specifications over the entire power-supply range. These laser-trimmed, monolithic integrated circuits provide excellent low-level accuracy along with wide output swing. Special design considerations assure that the product is easy to use and free from phase inversion problems often found in other amplifiers.
APPLICATIONS ● ● ● ● ●
The OPA452 and OPA453 are available in TO220-7 and DDPAK-7 options. They are specified for a junction temperature range of –40°C to +125°C.
PIEZOELECTRIC CELLS TEST EQUIPMENT AUDIO AMPLIFIERS TRANSDUCER DRIVERS SERVO DRIVERS 7-Lead Straight-Formed TO-220 (TA)
7-Lead Stagger-Formed TO-220 (TA-1)
1 2 3 4 5 6 7
7-Lead DDPAK (FA) Surface-Mount
1 2 3 4 5 6 7
1 2 3 4 5 6 7
VIN+ NC V+ Flag VIN– V– VO VIN+ NC V+ Flag VIN– V– VO
VIN+ NC V+ Flag VIN– V– VO NOTE: Tabs are electrically connected to V– supply.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2000-2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– ................................................................... 80V Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V Current(2) ...................................................... 5mA Output Short-Circuit ................................................................. Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –65°C to +150°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering 10s, TO-220) ................................... 300°C (soldering 3s, DDPAK) ..................................... 240°C NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 5mA or less.
ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
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SBOS127C
ELECTRICAL CHARACTERISTICS: OPA452; VS = ±10V to ±40V Boldface limits apply over the specified junction temperature range, TJ = –40°C to +125°C. At TJ = +25°C, RL = 3.8kΩ connected to ground, and VOUT = 0V, unless otherwise noted. OPA452TA, FA PARAMETER OFFSET VOLTAGE Input Offset Voltage over Temperature Drift vs Power Supply over Temperature
CONDITION VOS
VS = ±40V, VCM = 0V, IO = 0V
dVOS/dT PSRR
VS = ±10V to ±40V, VCM = 0V
MIN
TYP
MAX
UNITS
±1
±3 ±6
5
30 45
mV mV µV/°C µV/V µV/V
±100 ±100
pA pA
±5
INPUT BIAS CURRENT(1) Input Bias Current Input Offset Current NOISE Input Voltage Noise Density Current Noise Density INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio over Temperature
IB IOS
VS = ±40V, VCM = 0V VS = ±40V, VCM = 0V
±7 ±1
en in
f = 1kHz f = 1kHz
21 9
VCM CMRR
INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain over Temperature
OUTPUT Voltage Output over Temperature Voltage Output over Temperature Output Current Short-Circuit Current Capacitive Load Drive
AOL
GBW SR
THD+N
VOUT
TEMPERATURE RANGE Specified Range (junction) Operating Range (junction) Storage Range (ambient) Thermal Resistance TO200-7 DDPAK-7
IO = 10mA, –VS + 2V < VO < +VS – 2V IO = 10mA, –VS + 2V < VO < +VS – 2V IO = 50mA, –VS + 4V < VO < +VS – 4V IO = 50mA, –VS + 5V < VO < +VS – 5.5V
105 96
VS = ±40V VS = ±40V VS = ±40V, G = +1, 10V Step, CL = 100pF VS = ±40V, G = +1, 10V Step, CL = 100pF VIN • Gain = VS VS = ±40V, VO = 30Vp-p, G = 5 f = 1kHz, RL = 2kΩ IO = 50mA IO = 50mA IO = 10mA IO = 10mA
94
(V+) – 0.5
V dB dB
1013 || 2 1013 || 6
Ω || pF Ω || pF
110 107 110 105
dB dB dB dB
1.8 +7.2 /–10 2 5 1 0.0008
MHz V/µs µs µs µs %
(V–) + 4.0 (V–) + 5 (V–) + 2 (V–) + 2 ±50
(V+) – 4 (V+) – 5.5 (V+) – 2 (V+) – 2
±125 See Typical Characteristic
ISC CLOAD
SHUTDOWN FLAG Thermal Shutdown Status Output Normal Operation Thermally Shutdown Junction Temperature Shutdown Reset from Shutdown POWER SUPPLY Supply Voltage Range Quiescent Current (per amplifier) over Temperature
(V–) + 5 86 76
VS = ±40V, –35V < VCM < 39.5V
over Temperature FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise
VS = ±40V, –35V < VCM < 39.5V VS = ±40V, –35V < VCM < 39.5V
nV/ √Hz fA/ √Hz
VS = ±40V VS = ±40V
100
0.1 140
1.0 165
±10 IO = 0
TJ TJ TA θJC
±5.5
–40 –55 –65
µA µA °C °C
+160 +145 VS IQ
V V V V mA mA
±40 ±6.5 ±7.5
V mA mA
+125 +125 +150
°C °C °C
3 3
°C/W °C/W
NOTE: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C, unless otherwise noted.
OPA452, 453 SBOS127C
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ELECTRICAL CHARACTERISTICS: OPA453; VS = ±10V to ±40V Boldface limits apply over the specified junction temperature range, TJ = –40°C to +125°C. At TJ = +25°C, RL = 3.8kΩ connected to ground, and VOUT = 0V, unless otherwise noted. OPA453TA, FA PARAMETER OFFSET VOLTAGE Input Offset Voltage over Temperature Drift vs Power Supply over Temperature
CONDITION VOS
VS = ±40V, VCM = 0V, IO = 0V
dVOS/dT PSRR
VS = ±10V to ±40V, VCM = 0V
MIN
TYP
MAX
UNITS
±1
±3 ±6
5
30 45
mV mV µV/°C µV/V µV/V
±100 ±100
pA pA
±5
INPUT BIAS CURRENT(1) Input Bias Current Input Offset Current NOISE Input Voltage Noise Density Current Noise Density INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio over Temperature
IB IOS
VS = ±40V, VCM = 0V VS = ±40V, VCM = 0V
±7 ±1
en in
f = 1kHz f = 1kHz
21 9
VCM CMRR
INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain over Temperature
OUTPUT Voltage Output over Temperature Voltage Output over Temperature Output Current Short-Circuit Current Capacitive Load Drive
AOL
GBW SR
THD+N
VOUT
TEMPERATURE RANGE Specified Range (junction) Operating Range (junction) Storage Range (ambient) Thermal Resistance TO200-7 DDPAK-7
IO = 10mA, –VS + 2V < VO < +VS – 2V IO = 10mA, –VS + 2V < VO < +VS – 2V IO = 50mA, –VS + 4V < VO < +VS – 4V IO = 50mA, –VS + 5V < VO < +VS – 5.5V
105 96
VS = ±40V VS = ±40V VS = ±40V, G = +5, 10V Step, CL = 100pF VS = ±40V, G = +5, 10V Step, CL = 100pF VIN • Gain = VS VS = ±40V, VO = 30Vp-p, G = 5 f = 1kHz, RL = 2kΩ IO = 50mA IO = 50mA IO = 10mA IO = 10mA
94
(V+) – 0.5
V dB dB
1013 || 2 1013 || 6
Ω || pF Ω || pF
110 107 110 105
dB dB dB dB
7.5 +23 / –38 1 1.5 1 0.0008
MHz V/µs µs µs µs %
(V–) + 4.0 (V–) + 5 (V–) + 2 (V–) + 2 ±50
(V+) – 4 (V+) – 5.5 (V+) – 2 (V+) – 2
±125 See Typical Characteristic
ISC CLOAD
SHUTDOWN FLAG Thermal Shutdown Status Output Normal Operation Thermally Shutdown Junction Temperature Shutdown Reset from Shutdown POWER SUPPLY Supply Voltage Range Quiescent Current (per amplifier) over Temperature
(V–) + 5 86 76
VS = ±40V, –35V < VCM < 39.5V
over Temperature FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise
VS = ±40V, –35V < VCM < 39.5V VS = ±40V, –35V < VCM < 39.5V
nV/ √Hz fA/ √Hz
VS = ±40V VS = ±40V
100
0.1 140
µA µA
1.0 165
°C °C
+160 +145 VS IQ
±10 IO = 0
TJ TJ TA
±5.5
–40 –55 –65
θJC
V V V V mA mA
±40 ±6.5 ±7.5
V mA mA
+125 +125 +150
°C °C °C °C/W °C/W
3 3
NOTE: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C, unless otherwise noted.
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OPA452, 453 www.ti.com
SBOS127C
TYPICAL CHARACTERISTICS At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted. All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient temperatures for a specific configuration.
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
OPEN-LOOP GAIN AND PHASE vs FREQUENCY 140
0
140
–20
120
100
–40
100
80
–60
80
0 OPA453
60
–80
40
–100
20 0
–40 –60 Phase
60
–80
40
–100
–120
20
–120
–140
0
–140
–20
–160
–20
–160
–40
–180 10M
–40
1
10
100
1k
10k
100k
1M
1
10
100
Frequency (Hz)
10k
100k
1M
–180 10M
POWER-SUPPLY REJECTION RATIO vs FREQUENCY
120
140
100
120
80
100
PSRR (dB)
CMRR (dB)
1k
Frequency (Hz)
COMMON-MODE REJECTION RATIO vs FREQUENCY
60
+PSRR 80 –PSRR
40
60
20
40
0
20 1
10
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
100
1
in
AV = +5 VO = 30Vp-p RL = 600Ω, 2kΩ
en 0.1 THD+N (%)
Voltage Noise (nV/√Hz) Current Noise (fA/√Hz)
–20
Gain
10
10M
OPA452 600Ω 2kΩ
0.01 OPA453 600Ω
0.001 2kΩ 0.0001
1 10
100
1k
10k
100k
1M
10
Frequency (Hz)
1k
10k
100k
Frequency (Hz)
OPA452, 453 SBOS127C
100
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Phase (°)
Phase
Phase (°)
Gain (dB)
Gain
Gain (dB)
OPA452 120
TYPICAL CHARACTERISTICS (Cont.) At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted. All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient temperatures for a specific configuration.
MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (V+)
40 35 OPA452
30
OPA453 25 20 15 10
(V+) – 4
+25°C
(V–) – 8
–55°C
(V–) + 4 +25°C
Without Slew-Induced Distortion
5
+85°C
(V+) – 6
(V–) + 2
0
+85°C
(V–) 1k
10k
100k
1M
0
20
40
60
80
100
Frequency (Hz)
Output Current (mA)
OPEN-LOOP GAIN, POWER-SUPPLY REJECTION RATIO, AND COMMON-MODE REJECTION RATIO vs TEMPERATURE
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs TEMPERATURE
120
120
10000
AOL 110
1000
PSRR
Current (pA)
AOL, PSRR, and CMRR (dB)
–55°C
(V+) – 2 Output Voltage Swing (V)
Maximum Output Voltage (Vp-p)
45
100 CMRR 90
100 +IB
–IB 10
80
1 IOS
70 –55
–35
–15
5
25
45
65
85
105
0.1 –55
125
–35
–15
5
25
45
65
85
Temperature (°C)
Temperature (°C)
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE
GAIN BANDWIDTH PRODUCT vs TEMPERATURE
160
10
140
8
105
125
105
125
120
5.7 IQ
100
5.5
80
5.3
60 –55
–35
–15
5
25
45
65
85
105
125
6
4 OPA452 2
0 –55
–35
–15
5
25
45
65
85
Temperature (°C)
Temperature (°C)
6
Gain Bandwidth (MHz)
+ISC –ISC
Quiescent Current (mA)
Short-Circuit Current (mA)
OPA453
OPA452, 453 www.ti.com
SBOS127C
TYPICAL CHARACTERISTICS (Cont.) At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted. All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient temperatures for a specific configuration.
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs COMMON-MODE VOLTAGE
SLEW RATE vs TEMPERATURE 20
45 –Slew (OPA453)
15 +IB Current (pA)
Slew Rate (V/µs)
35
+Slew (OPA453)
25
–IB
10
5 IOS
15
+Slew (OPA452)
5 –55
–35
–15
0
–Slew (OPA452)
5
25
45
65
85
105
–5 –40
125
–30
–20
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE
10
20
30
40
15
+ISC 110
6
Quiescent Current (mA)
120
Percentage of Amplifiers (%)
–ISC Short-Circuit Current (mA)
0
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
130
IQ 5 –55
10
20
30
10
5
0
40
–3
–2
Temperature (°C)
–1
0
1
2
3
Offset Voltage (mV)
SETTLING TIME vs CLOSED-LOOP GAIN
OFFSET VOLTAGE DRIFT DISTRIBUTION 100
20
Settling Time (µs)
15
Amplifiers (%)
–10
Common-Mode Voltage (V)
Temperature (°C)
10
10 0.01%
0.01% OPA452
5
0.1% 0.1%
OPA453
1
0
1
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
OPA452, 453 SBOS127C
10
100
Gain (V/V)
Offset Voltage Drift (µV/°C)
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TYPICAL CHARACTERISTICS (Cont.) At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted. All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient temperatures for a specific configuration.
LARGE-SIGNAL STEP RESPONSE (G = 1, CL = 100pF)
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 60 OPA452 OPA453
50
OPA452
10V/div
Overshoot (%)
G = –1 40 G = –4 30 G = –2
20
G = +1 10 G = –6 0 0.01
G = –8 0.1
1
10
2.5µs/div
32
Load Capacitance
LARGE-SIGNAL STEP RESPONSE (G = 5, CL = 100pF)
SMALL-SIGNAL STEP RESPONSE (G = 1, CL = 100pF)
20V/div
OPA452
10V/div
OPA453
2.5µs/div
1µs/div
SMALL-SIGNAL STEP RESPONSE (G = 5, CL = 100pF)
SMALL-SIGNAL STEP RESPONSE (G = –1, CL = 1000pF)
20V/div
OPA452
20V/div
OPA453
500ns/div
8
2.5µs/div
OPA452, 453 www.ti.com
SBOS127C
APPLICATIONS INFORMATION Figure 1 shows the OPA452 connected as a basic noninverting amplifier. The OPA452 can be used in virtually any op amp configuration. The OPA453 is designed for use in configurations with gains of 5 or greater. Power-supply terminals should be bypassed with 0.1µF capacitors, or greater, near the power-supply pins. Be sure that the capacitors are appropriately rated for the power-supply voltage used. The OPA452 and OPA453 can supply output currents up to 50mA with excellent performance.
G = 1+
+
R2 R1
0.1µF R2
R1
VO
OPA452 VIN
The OPA452 and OPA453 are designed with internal current-limiting circuitry that limits the output current to approximately 125mA. The current limit varies slightly with increasing junction temperature and supply voltage, as shown in the Typical Characteristics. Current limit, in combination with the thermal protection circuitry, provides protection from most types of overload conditions including short-circuit to ground.
THERMAL PROTECTION The OPA452 and OPA453 have thermal shutdown circuitry that protects the amplifier from damage caused by overload conditions. The thermal protection circuitry disables the output when the junction temperature reaches approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is automatically re-enabled.
V+ 10µF
CURRENT LIMIT
ZL
Flag
The thermal shutdown function is not intended to replace proper heat sinking. Activation of the thermal shutdown circuitry is an indication of excessive power dissipation or an inadequate heat sink. Continuously running the amplifier into thermal shutdown can degrade reliability. The Thermal Shutdown Indicator (Flag) pin can be monitored to determine if shutdown is occurring. During normal operation, the current output from the flag pin is typically 50nA. During shutdown, the current output from the flag pin increases to 140µA (typical). This current output allows for easy interfacing to external logic. Figure 2 shows two examples implementing this function.
(optional)
0.1µF 10µF +
V–
FIGURE 1. Basic Circuit Connections.
VOUT
OPA452 Flag 100µA to 165µA HCT logic has relatively wellcontrolled logic level. A properly chosen resistor value can assure proper logic high level throughout the full range of flag output current.
+5V +5V
HCT 19.1kΩ
VOUT
OPA452
Interface to virtually any CMOS logic gate by choosing a resistor value that provides an assured logic high voltage with the minimum (100µA) flag current.
Logic Ground
CMOS
39kΩ
Logic Ground
Interfacing with HCT Logic
Interfacing with CMOS Logic
FIGURE 2. Thermal Shutdown Indicator.
OPA452, 453 SBOS127C
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POWER SUPPLIES
Where,
The OPA452 and OPA453 may be operated from power supplies of ±10V to ±40V, or a total of 80V with excellent performance. Most behavior remains unchanged throughout the full operating voltage range. Parameters that vary significantly with operating voltage are shown in the Typical Characteristics.
VO = output voltage
For applications that do not require symmetrical output voltage swing, power-supply voltages do not need to be equal. The OPA452 and OPA453 can operate with as little as 20V between the supplies or with up to 80V between the supplies. For example, the positive supply could be set to 70V with the negative supply at –10V or vice-versa.
TA = ambient temperature (°C)
The tabs of the DDPAK-7 and TO220 packages are electrically connected to the negative supply (V–), however, these connections should not be used to carry current. For best thermal performance, the tab should be soldered directly to the circuit board copper area (see Heat Sinking section).
POWER DISSIPATION Internal power dissipation of these op amps can be quite large. All of the specifications for the OPA452 and OPA453 may change with junction temperature. If the device is not subjected to internal self-heating, the junction temperature will be the same as the ambient. However, in practical applications, the device will self-heat and the junction temperature will be significantly higher than ambient. The following calculation can be performed to establish junction temperature as a function of ambient temperature and the conditions of the application. Consider the OPA452 in a circuit configuration where the load is 600Ω and the output voltage is 20V. The supplies are at ±40V and the ambient temperature (TA) is 40°C. The θJA for the package plus heat sink is 30°C/W. First, the quiescent heating of the op amp is as follows: PD(internal) = IQ • VS = 6mA • 80V = 480mW The output current (IO) can be calculated: IO = VO/RL = 20V/600Ω = 33.33mA The power being dissipated (PD) in the output transistor of the amplifier can be calculated:
VS = supply voltage IO = output current RL = load resistance TJ = junction temperature (°C)
θJA = junction-to-air thermal resistance (°C/W) To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal protection is activated. Use worst-case load and signal conditions. For good reliability, the thermal protection should trigger more than +35°C above the maximum expected ambient condition of your application. This ensures a maximum junction temperature of +125°C at the maximum expected ambient condition. Operation from a single power supply (or unbalanced power supplies) can produce even larger power dissipation because a larger voltage can be impressed across the conducting output transistor. Consult Application Bulletin SBOA022 at www.ti.com for further information on how to calculate or measure power dissipation. Power dissipation can be minimized by using the lowest possible supply voltage. For example, with a 50mA load, the output will swing to within 5.0V of the power-supply rails. Power supplies set to no more than 5.0V above the maximum output voltage swing required by the application will minimize the power dissipation.
SAFE OPERATING AREA The Safe Operating Area (SOA curves, Figure 3) shows the permissible range of voltage and current. The safe output current decreases as the voltage across the output transistor (VS – VO) increases. For further insight on SOA, consult Application Report SBOA022. Output short circuits are a very demanding case for SOA. A short-circuit to ground forces the full power-supply voltage (V+ or V–) across the conducting transistor and produces a
SAFE OPERATING AREA
PD(output stage) = IO • (VS – VO) = 33.3mA • (40 – 20) = 667mW
100
PD(total) = PD(internal) + PD(output stage) = 480mW + 667mW = 1147mW
50
The resulting junction temperature can be calculated: TJ = TA + PD θJA
+85°C, θ = 40
10 IO (mA)
TJ = 40°C + 1147mW • 30°C/W = 74.4°C
+85°C, θ =θ20
θ is total thermal resistance including junction-to-case.
+25°C, θ = 40
1 This graph is for +125°C max operating temperature.
+25°C,θθ = 3
0.1 10
80
100
| VS | – | VO | (V)
FIGURE 3. DDPAK-7 and TO220-7 Safe Operating Area.
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SBOS127C
typical output current of 125mA. With ±40V power supplies, this creates an internal dissipation of 10W. This far exceeds practical heat sinking and is not recommended. If operation in this region is unavoidable, use the part with a heat sink.
HEAT SINKING Power dissipated in the OPA452 or OPA453 will cause the junction temperature to rise. For reliable operation, the junction temperature should be limited to +125°C. Many applications will require a heat sink to assure that the maximum operating junction temperature is not exceeded. The heat sink required depends on the power dissipated and on ambient conditions.
CAPACITIVE LOADS The dynamic characteristics of the OPA452 and OPA453 have been optimized for commonly encountered gains, loads, and operating conditions. The combination of low closedloop gain and capacitive load will decrease the phase margin and may lead to gain peaking or oscillations. Figure 5 shows a circuit that preserves phase margin with capacitive load. Figure 6 shows the small-signal step response for the circuit in Figure 5. Consult Application Bulletin SBOA015, at www.ti.com, for more information.
For heat sinking purposes, the tab of the DDPAK is typically soldered directly to a circuit board copper area. Increasing the copper area improves heat dissipation. Figure 4 shows typical thermal resistance from junction-to-ambient as a function of copper area.
+40V
OPA452
Depending on conditions, additional heat sinking may be required. Aavid Thermal Products Inc. manufactures surface-mountable heat sinks designed specifically for use with these packages. Further information is available on Aavid’s web site, www.aavid.com.
RG 5kΩ
RF 5kΩ
10nF
VI CF 270pF
CS 1.8nF –40V
THERMAL RESISTANCE vs CIRCUIT BOARD COPPER AREA
Thermal Resistance, θJA (°C/W)
50
FIGURE 5. Driving Large Capacitive Loads.
OPA452FA, OPA453FA Surface-Mount Package 1oz. copper
40
30
SMALL-SIGNAL STEP RESPONSE (G = –1, CL = 10nF)
20
OPA452 10
0
1
2
3
4
20mV/div
0 5
Copper Area (inches2)
Circuit Board Copper Area
2.5µs/div
FIGURE 6. Small-Signal Step Response for Figure 5.
OPA452FA, OPA453FA Surface-Mount Package
FIGURE 4. DDPAK Thermal Resistance versus Circuit Board Copper Area.
OPA452, 453 SBOS127C
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11
INCREASING OUTPUT CURRENT
INPUT PROTECTION
In those applications where the 50mA of output current is not sufficient to drive the desired load, output current can be increased by connecting two or more OPA452s or OPA453s in parallel, as shown in Figure 7. Amplifier A1 is the master amplifier and may be configured in virtually any op amp circuit. Amplifier A2, the slave, is configured as a unity gain buffer. Alternatively, external output transistors can be used to boost output current. The circuit in Figure 8 is capable of supplying output currents up to 1A. Alternatively, the OPA547, OPA548, and OPA549 series power op amps should be considered for high output current drive, along with programmable current limit and output disable capability.
The OPA452 and OPA453 feature internal clamp diodes to protect the inputs when voltages beyond the supply rails are encountered. However, input current should be limited to 5mA. In some cases, an external series resistor may be required. Many input signals are inherently current-limited, therefore, a limiting resistor may not be required. Please consider that a large series resistor, in conjunction with the input capacitance, can affect stability.
R1
R2
“MASTER”
RS(1) 10Ω
OPA452 VIN
OPA452 RL
NOTE: (1) RS resistors minimize the circulating current that can flow between the two devices due to VOS errors.
FIGURE 7. Parallel Amplifiers Increase Output Current Capability.
R1
R2 +40V
TIP29C CF R3(1) 100Ω
R4 0.2Ω VO
OPA452 VIN
The OPA453 is intended for applications with signal gains of 5 or greater, but it is possible to take advantage of its high slew rate in lower gains using an external compensation technique in an inverting configuration. This technique maintains low noise characteristics of the OPA453 architecture at low frequencies. Depending on the application, a small increase in high-frequency noise may result. This technique shapes the loop gain for good stability while giving an easily controlled 2nd-order low-pass frequency response. Considering only the noise gain (noninverting signal gain) for the circuit of Figure 9, the low-frequency noise gain (NG1) will be set by the resistor ratios, whereas the high-frequency noise gain (NG2) will be set by the capacitor ratios. The capacitor values set both the transition frequencies and the high-frequency noise gain. If this noise gain, determined by NG2 = 1 + CS/CF, is set to a value greater than the recommended minimum stable gain for the op amp and the noise gain pole, set by 1/RFCF, is placed correctly, a very well controlled, 2nd-order low-pass frequency response will result.
RS(1) 10Ω
“SLAVE”
USING THE OPA453 IN LOW GAINS
R4 0.2Ω LOAD TIP30C
To choose the values for both CS and CF, two parameters and only three equations need to be solved. First, the target for the high-frequency noise gain (NG2) should be greater than the minimum stable gain for the OPA453. In the circuit in Figure 9, a target NG2 of 10 is used. Second, the signal gain of –1 in Figure 10 sets the low-frequency noise gain to NG1 = 1 + RF/RG (= 2 in this example). Using these two gains, knowing the Gain Bandwidth Product (GBP) for the OPA453 (7.5MHz), and targeting a maximally flat 2nd-order, low-pass Butterworth frequency response (Q = 0.707), the key frequency in the compensation can be found. For the values in Figure 9, the f–3dB will be approximately 180kHz. This is less than that predicted by simply dividing the GBP by NG1. The compensation network controls the bandwidth to a lower value while providing good slew rate at the output and an exceptional distortion performance due to increased loop gain at frequencies below NG1 • Z0. The capacitor values in Figure 10 are calculated for NG1 = 2 and NG2 = 10 with no adjustment for parasitics. Actual circuit values can be optimized by checking the smallsignal step response with actual load conditions. See Figure 9 for the small-signal step response of this OPA453, G = –1 circuit with a 1000pF load. It is well-behaved with no tendency to oscillate. If CS and CF were removed, the circuit would be unstable.
–40V NOTE: (1) R3 provides current limit and allows the amplifier to drive the load when the output is between 0.7V and –0.7V.
FIGURE 8. External Output Transistors Boost Output Current Up to 1 Amp.
12
OPA452, 453 www.ti.com
SBOS127C
SMALL-SIGNAL STEP RESPONSE (G = –1, CL = 1000pF)
+40V
OPA453 OPA453
20mV/div
RG 5kΩ
VOUT RF 5kΩ
VIN CS 1.8nF
CF 200pF –40V
NG1 = 1 + RF/RG = 2 NG2 = 1 + CS/CF = 10
FIGURE 9. Compensation of the OPA453 for G = –1.
2.5µs/div
FIGURE 10. Small-Signal Step Response for Figure 9.
OPA452, 453 SBOS127C
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13
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION Orderable Device
Status (1)
Package Type Package Pins Package Drawing Qty
OPA452FA
OBSOLETE
DDPAK/ TO-263
KTW
7
OPA452FA/500
ACTIVE
DDPAK/ TO-263
KTW
7
OPA452FA/500G3
ACTIVE
DDPAK/ TO-263
KTW
OPA452FAKTWT
ACTIVE
DDPAK/ TO-263
OPA452FAKTWTG3
ACTIVE
OPA452TA
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
TBD
Call TI
Call TI
500
Green (RoHS & no Sb/Br)
CU SN
Level-3-245C-168 HR
-40 to 125
OPA452F
7
500
Green (RoHS & no Sb/Br)
CU SN
Level-3-245C-168 HR
-40 to 125
OPA452F
KTW
7
50
Green (RoHS & no Sb/Br)
CU SN
Level-3-245C-168 HR
-40 to 125
OPA452F
DDPAK/ TO-263
KTW
7
50
Green (RoHS & no Sb/Br)
CU SN
Level-3-245C-168 HR
-40 to 125
OPA452F
ACTIVE
TO-220
KC
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA452T
OPA452TA-1
ACTIVE
TO-220
KVT
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA452T
OPA452TA-1G3
ACTIVE
TO-220
KVT
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA452T
OPA452TAG3
ACTIVE
TO-220
KC
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA452T
OPA453FA
OBSOLETE
DDPAK/ TO-263
KTW
7
TBD
Call TI
Call TI
OPA453FAKTWT
ACTIVE
DDPAK/ TO-263
KTW
7
50
Green (RoHS & no Sb/Br)
CU SN
Level-3-245C-168 HR
-40 to 125
OPA453F
OPA453TA
ACTIVE
TO-220
KC
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA453T
OPA453TA-1
ACTIVE
TO-220
KVT
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA453T
OPA453TA-1G3
ACTIVE
TO-220
KVT
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA453T
OPA453TAG3
ACTIVE
TO-220
KC
7
50
Green (RoHS & no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
OPA453T
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com
9-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins Type Drawing
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm)
B0 (mm)
K0 (mm)
P1 (mm)
W Pin1 (mm) Quadrant
OPA452FA/500
DDPAK/ TO-263
KTW
7
500
330.0
24.4
10.6
15.6
4.9
16.0
24.0
Q2
OPA452FAKTWT
DDPAK/ TO-263
KTW
7
50
330.0
24.4
10.6
15.6
4.9
16.0
24.0
Q2
OPA453FAKTWT
DDPAK/ TO-263
KTW
7
50
330.0
24.4
10.6
15.6
4.9
16.0
24.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com
9-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA452FA/500
DDPAK/TO-263
KTW
7
500
367.0
367.0
45.0
OPA452FAKTWT
DDPAK/TO-263
KTW
7
50
367.0
367.0
45.0
OPA453FAKTWT
DDPAK/TO-263
KTW
7
50
367.0
367.0
45.0
Pack Materials-Page 2
MECHANICAL DATA MPSF015 – AUGUST 2001
KTW (R-PSFM-G7)
PLASTIC FLANGE-MOUNT
0.410 (10,41) 0.385 (9,78)
0.304 (7,72)
–A–
0.006 –B–
0.303 (7,70) 0.297 (7,54)
0.0625 (1,587) H
0.055 (1,40)
0.0585 (1,485)
0.300 (7,62) 0.064 (1,63)
0.045 (1,14)
0.252 (6,40)
0.056 (1,42)
0.187 (4,75)
0.370 (9,40)
0.179 (4,55)
0.330 (8,38) H
0.296 (7,52)
A
0.605 (15,37) 0.595 (15,11)
0.012 (0,305) C
0.000 (0,00) 0.019 (0,48)
0.104 (2,64) 0.096 (2,44)
H
0.017 (0,43) 0.050 (1,27) C C
F
0.034 (0,86) 0.022 (0,57)
0.010 (0,25) M
B
0.026 (0,66) 0.014 (0,36)
0°~3°
AM C M
0.183 (4,65) 0.170 (4,32)
4201284/A 08/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Lead width and height dimensions apply to the plated lead. D. Leads are not allowed above the Datum B. E. Stand–off height is measured from lead tip with reference to Datum B. F. Lead width dimension does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum dimension by more than 0.003”. G. Cross–hatch indicates exposed metal surface. H. Falls within JEDEC MO–169 with the exception of the dimensions indicated.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA MSOT010 – OCTOBER 1994
KC (R-PSFM-T7)
PLASTIC FLANGE-MOUNT PACKAGE 0.156 (3,96) 0.146 (3,71)
0.420 (10,67) 0.380 (9,65)
DIA
0.113 (2,87) 0.103 (2,62)
0.185 (4,70) 0.175 (4,46) 0.055 (1,40) 0.045 (1,14)
0.147 (3,73) 0.137 (3,48)
0.335 (8,51) 0.325 (8,25) 1.020 (25,91) 1.000 (25,40) 1
7
0.125 (3,18) (see Note C)
0.030 (0,76) 0.026 (0,66) 0.010 (0,25) M
0.050 (1,27) 0.300 (7,62)
0.122 (3,10) 0.102 (2,59) 0.025 (0,64) 0.012 (0,30) 4040251 / B 01/95
NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Lead dimensions are not controlled within this area. All lead dimensions apply before solder dip. The center lead is in electrical contact with the mounting tab.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
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