Transcript
AOD607 Complementary Enhancement Mode Field Effect Transistor General Description
Features
The AOD607 uses advanced trench technology MOSFETs to provide excellent RDS(ON) and low gate charge. The complementary MOSFETs may be used in H-bridge, Inverters and other applications.
n-channel p-channel -30V VDS (V) = 30V -12A (VGS = -10V) ID = 12A (VGS=10V) RDS(ON) RDS(ON) < 25 mΩ (VGS=10V) < 37 mΩ (VGS = -10V) < 34 mΩ (VGS=4.5V) < 62 mΩ (VGS = -4.5V) 100% UIS Tested!
-RoHS Compliant -Halogen Free*
TO-252-4L D-PAK D1/D2
Top View
Bottom View
D1/D2
Top View Drain Connected to Tab G1
S2 S1
Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Max n-channel Symbol VDS 30 Drain-Source Voltage VGS Gate-Source Voltage ±20
Pulsed Drain Current Avalanche Current
TC=100°C
C
Repetitive avalanche energy L=0.1mH Power Dissipation
B
Power Dissipation A
C
TC=25°C TC=100°C TA=25°C TA=70°C
Max p-channel -30
Units V
±20
V
-12
ID IDM
9.4
-9.4
40
-40
IAR
18
-18
A
EAR
40
40
mJ
25
25
12.5
12.5
2.1
2.1
1.3
1.3
-55 to 175
-55 to 175
PD PDSM
TJ, TSTG Junction and Storage Temperature Range Thermal Characteristics: n-channel and p-channel Parameter A t ≤ 10s Maximum Junction-to-Ambient A Steady-State Maximum Junction-to-Ambient Steady-State Maximum Junction-to-Case B A t ≤ 10s Maximum Junction-to-Ambient Steady-State Maximum Junction-to-Ambient A Steady-State Maximum Junction-to-Case B
Alpha & Omega Semiconductor, Ltd.
p-channel
12
TC=25°C C
S2
n-channel
G1
Continuous Drain G Current
G2 S1
G2
Symbol RθJA RθJC RθJA RθJC
A
W W °C
Device n-ch n-ch n-ch
Typ 19 47 4.5
Max 23 60 6
°C/W °C/W °C/W
p-ch p-ch p-ch
19 47 4.5
23 60 6
°C/W °C/W °C/W
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AOD607
N-Channel Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol
Parameter
STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=250µA
1.5
ID(ON)
On state drain current
VGS=4.5V, VDS=5V
40
TJ=55°C
VGS=10V, ID=12A TJ=125°C VGS=4.5V, ID=5A gFS
Forward Transconductance
VDS=5V, ID=12A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
Units V
1
Zero Gate Voltage Drain Current
Static Drain-Source On-Resistance
Max
30
VDS=24V, VGS=0V
IDSS
RDS(ON)
Typ
5
µA
100
nA
1.7
2.5
V
20
25
28
34
27.5
34
A
25 0.75
mΩ mΩ S
1
V
IS
Maximum Body-Diode Continuous Current
18
A
ISM
Pulsed Body-Diode CurrentC
40
A
1250
pF
DYNAMIC PARAMETERS Ciss Input Capacitance Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
1040 VGS=0V, VDS=15V, f=1MHz
Qgs
Gate Source Charge
pF
110 VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge
180
VGS=10V, VDS=15V, ID=12A
pF
0.7
1.5
Ω
19.8
25
nC
9.8
12.5
nC
2.5
nC
Qgd
Gate Drain Charge
3.5
nC
tD(on)
Turn-On DelayTime
4.5
ns
tr
Turn-On Rise Time
3.9
ns
17.4
ns
3.2
ns
VGS=10V, VDS=15V, RL=1.25Ω, RGEN=3Ω
tD(off)
Turn-Off DelayTime
tf trr
Turn-Off Fall Time Body Diode Reverse Recovery Time
IF=12A, dI/dt=100A/µs
19
Qrr
Body Diode Reverse Recovery Charge IF=12A, dI/dt=100A/µs
8
25
ns nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by bond-wires. *This device is guaranteed green after data code 8X11 (Sep 1ST 2008). Rev3: Oct 2008 THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AOD607
N-CHANNEL TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30
20 4V 10V
25 20
3.5V
12 ID(A)
ID (A)
VDS=5V
16
4.5V
15
125°C 8
10
25°C
VGS=3V
4
5 0
0 0
1
2
3
4
5
1.5
VDS (Volts) Fig 1: On-Region Characteristics
2.5
3
3.5
4
VGS(Volts) Figure 2: Transfer Characteristics
35
1.6 Normalized On-Resistance
VGS=4.5V 30 RDS(ON) (mΩ )
2
25 20
VGS=10V
15 10 0
5
10
15
VGS=10V
ID=12A
1.4
VGS=4.5V 1.2
ID=5A
1
0.8
20
0
ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage
25
50
75
100
125
150
175
Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature
50
1.0E+01 1.0E+00 1.0E-01
ID=12A IS (A)
RDS(ON) (mΩ )
40
30
125°C 1.0E-02
25°C
125°C
1.0E-03
20
1.0E-04
25°C 1.0E-05
10
0.0
2
4
6
8
10
VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
0.2
0.4
0.6
0.8
1.0
VSD (Volts) Figure 6: Body-Diode Characteristics
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AOD607
N-CHANNEL TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 1500
10
VDS=15V ID=12A
1250 Ciss
Capacitance (pF)
VGS (Volts)
8 6 4
1000 750 500
2
250
0
Crss
0 0
4
8
12
16
20
0
Qg (nC) Figure 7: Gate-Charge Characteristics
100.0
5
10
15 20 25 VDS (Volts) Figure 8: Capacitance Characteristics
30
50
ID (Amps)
10.0
1ms
10µs
10ms 0.1s
100µs
1s 1.0
10s
TJ(Max)=150°C TA=25°C
DC
30 20 10
0.1 0.1
1
TJ(Max)=150°C TA=25°C
40
Power (W)
RDS(ON) limited
10
0 0.001
100
VDS (Volts)
10
0.01
0.1
1
10
100
1000
Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased Safe Operating Area (Note F)
Zθ JA Normalized Transient Thermal Resistance
Coss
In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
Single Pulse 0.001 0.00001
0.0001
PD
D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=60°C/W
0.01
0.001
0.01
0.1
Ton
1
T
10
100
1000
Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance
Alpha & Omega Semiconductor, Ltd.
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AOD607
P-Channel Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol
Parameter
STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage
Conditions
Min
ID=-250µA, VGS=0V
-30
VDS=-24V, VGS=0V
IDSS
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-1.5
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-40
Static Drain-Source On-Resistance
TJ=125°C VGS=-4.5V, ID=-5A
gFS
Forward Transconductance
VDS=-5V, ID=-12A
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
ISM
Pulsed Body-Diode Current
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
Qg(4.5V) Total Gate Charge (4.5V) Gate Source Charge
-1 -5
VGS=-10V, VDS=-15V, ID=-12A
µA
±100
nA
-2
-2.4
V
30
37
42
50
50
62
A
17 -0.76
mΩ mΩ S
-1
V
-18
A
-40
A
1100
pF
190
pF
122 VGS=0V, VDS=0V, f=1MHz
Units V
920 VGS=0V, VDS=-15V, f=1MHz
SWITCHING PARAMETERS Qg(10V) Total Gate Charge (10V) Qgs
-0.003
C
DYNAMIC PARAMETERS Ciss Input Capacitance Coss
Max
TJ=55°C
VGS=-10V, ID=-12A RDS(ON)
Typ
pF
3.6
5
Ω
18.7
23
nC
9.7
11.7
nC
2.54
nC
Qgd
Gate Drain Charge
5.4
tD(on)
Turn-On DelayTime
9
13
ns
tr
Turn-On Rise Time
25
35
ns
20
30
ns
12
18
ns
21.4
26 16
ns nC
VGS=-10V, VDS=-15V, RL=1.25Ω, RGEN=3Ω
tD(off)
Turn-Off DelayTime
tf trr
Turn-Off Fall Time Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=-12A, dI/dt=100A/µs
IF=-12A, dI/dt=100A/µs
13
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation PDSM is based on steady-state R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature fo 175°C may be u sed if the PCB or heatsink allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by the package current capability. *This device is guaranteed green after data code 8X11 (Sep 1ST 2008). Rev3: Oct. 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD607
P-CHANNEL TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30
30
-4.5V
-6V
-10V 25 20
20
-4V
-ID(A)
-ID (A)
VDS=-5V
25
-5V
15
-3.5V
10
15 10
125°C
5
5
VGS=-3V
25°C
0
0 0
1
2
3
4
5
0
0.5
80
2
2.5
3
3.5
4
4.5
5
1.60 Normalized On-Resistance
70
VGS=-4.5V 60 RDS(ON) (mΩ )
1.5
-VGS(Volts) Figure 2: Transfer Characteristics
-VDS (Volts) Fig 1: On-Region Characteristics
50 40 30
VGS=-10V
20
VGS=-4.5V 1.40
ID=-5A
VGS=-10V
1.20
ID=-12A 1.00
0.80
10 0
5
10
15
20
0
25
25
100
50
75
100
125
150
175
Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature
-ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage
1.0E+01
90
1.0E+00
ID=-12A
80
1.0E-01
70
125°C
60
125°C 50
-IS (A)
RDS(ON) (mΩ )
1
1.0E-02 1.0E-03
40 1.0E-04
30
25°C
20
25°C 1.0E-05
10 1.0E-06
0
0.0
3
4
5
6 7 8 9 10 -VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
0.2
0.4
0.6
0.8
1.0
-VSD (Volts) Figure 6: Body-Diode Characteristics
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AOD607
P-CHANNEL TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 1500
10
VDS=-15V ID=-12A
1250 Ciss Capacitance (pF)
-VGS (Volts)
8
6
4
2
1000 750 500
Coss
0
0 0
4
8
12
16
20
0
5
-Qg (nC) Figure 7: Gate-Charge Characteristics
1s
1
20
10
DC
0.1 10
0 0.001
100
-VDS (Volts)
D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=60°C/W
0.01
0.1
1
10
100
1000
Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased Safe Operating Area (Note F)
10
30
100µs
10ms 0.1s
0.1
25
30
1ms
10s
20
TJ(Max)=150°C TA=25°C
10µs
RDS(ON) limited
1.0
15
40
TJ(Max)=150°C, T A=25°C
10.0
10
-VDS (Volts) Figure 8: Capacitance Characteristics
Power (W)
-ID (Amps)
100.0
Zθ JA Normalized Transient Thermal Resistance
Crss
250
In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
PD Ton
Single Pulse 0.01 0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOD607 N-Channel
Gate Charge Test Circuit & Waveform Vgs Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig Charge
Resistive Switching Test Circuit & Waveforms RL Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
Vgs
Vgs
+ Vdd
I AR
VDC
-
Rg
Id
DUT Vgs
Vgs
Diode Recovery Test Circuit & Waveforms Q rr = - Idt
Vds +
DUT Vgs
Vds -
Isd
L
Vgs Ig
Alpha & Omega Semiconductor, Ltd.
Isd
+ Vdd
t rr
dI/dt I RM Vdd
VDC
-
IF
Vds
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AOD607 P-Channel
Gate Charge Test Circuit & Waveform Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgs
Vds
Qgd
+
DUT
Vgs Ig
Charge
Resistive Switching Test Circuit & Waveforms RL Vds
toff
ton td(on)
Vgs
-
DUT
Vgs
td(off)
tr
tf
90%
Vdd
VDC
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 2
L
EAR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS Vdd Id
I AR
DUT Vgs
Vgs
Diode Recovery Test Circuit & Waveforms Q rr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
-Isd
L
Vgs Ig
Alpha & Omega Semiconductor, Ltd.
+ Vdd
t rr
dI/dt
-I RM Vdd
VDC
-
-I F
-Vds
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