Acer_aspire_4230_4530_quanta_z05

Transcript

5 4 3 2 1 Z05 SYSTEM BLOCK DIAGRAM CPU CORE / VDDNB (ISL6265A) PAGE 26 D D NB_CORE +1.1V (RT8202) DDRII-SODIMM1 PAGE 28 667/800 MHz AMD Griffin PAGE 6 DDRII-SODIMM2 +1.1V_NB (RT8202) DDRII CPU THERMAL SENSOR DDRII 667/800 MHz CPU Fan PAGE 23 PAGE 4 S1G2 Processor 638P (uPGA)/35W PAGE 2,3,4,5 PAGE 6 PAGE 27 Lion Sabie HT3 LINK DDR II SMDDR_VTERM 1.8VSUS(TPS51116REGR) PAGE 29 PCI-E SYSTEM POWER (ISL6237) LVDS PAGE 25 PAGE 24 PCIE4 CRT CRT NORTH BRIDGE & SOUTH BRIDGE PAGE 14 MCP77M SATA - HDD PCIE2 X1 Mini PCI-E Card Express Card (Wireless LAN) (NEW CARD) PAGE 17 PAGE 17 X1 LAN BRODCOM BCM8764M RJ45 PAGE 15 C (10/100/GagaLAN) PAGE 15 X1 X1 USB 8 USB 5 USB 0,1,7 USB 6 USB 3 USB 10 USB 2 X3 X1 X1 X1 X1 USB2.0 SATA0 27mm X 27mm, 836pin BGA PAGE 18 USB2.0 Ports ODD(SATA) PCIE3 X1 PAGE 14 SYSTEM CHARGER (ISL6251A) C LVDS SATA1 PAGE 16,24 Bluetooth PC-cam PAGE 16 Fingerprint PAGE 14 Card Reader Realtek RTS5158E PAGE 23 (7 in 1) PAGE 18 14.318MHz PAGE 19 B PAGE 7,8,9,10, 11,12,13 Azalia B Azalia AudioController RealTek ALC268 LPC PAGE 20 PCB STACK UP Keyboard KBC (WPCE775C) PAGE 23 LAYER 1 : TOP Audio Amplifier PAGE 20 PAGE 22 LAYER 2 : GND MDC 1.5 RJ11 PAGE 20 PAGE 15 Int MIC PAGE 20 LAYER 3 : IN1 LAYER 4 : IN2 Touch Pad SPI ROM Speaker LAYER 5 : VCC PAGE 18 LAYER 6 : BOT PAGE 20 PAGE 22 SPIDF/Phone Jack PAGE 21 Line in PAGE 21 MIC Jack PAGE 21 A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A Block Diagram Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Friday, March 07, 2008 Sheet 1 1 of 34 5 4 3 HT_RXD#[15..0] <7> HT_RXD#[15..0] <7> HT_TXD[15..0] HT_RXD[15..0] <7> HT_RXD[15..0] <7> HT_TXD#[15..0] 2 1 HT_TXD[15..0] HT_TXD#[15..0] D D PROCESSOR HYPERTRANSPORT INTERFACE VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE VLDT_RUN U14A HT LINK VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 <7> HT_CPU_UPCLK0 <7> HT_CPU_UPCLK#0 <7> HT_CPU_UPCLK1 <7> HT_CPU_UPCLK#1 J3 J2 J5 K5 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 Y1 W1 Y4 Y3 HT_CPU_DWNCLK0 HT_CPU_DWNCLK#0 HT_CPU_DWNCLK1 HT_CPU_DWNCLK#1 <7> HT_CPU_UPCTL0 <7> HT_CPU_UPCTL#0 <7> HT_CPU_UPCTL1 <7> HT_CPU_UPCTL#1 N1 P1 P3 P4 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 R2 R3 T5 R5 HT_CPU_DWNCTL0 <7> HT_CPU_DWNCTL#0 <7> HT_CPU_DWNCTL1 <7> HT_CPU_DWNCTL#1 <7> HT_RXD0 HT_RXD#0 HT_RXD1 HT_RXD#1 HT_RXD2 HT_RXD#2 HT_RXD3 HT_RXD#3 HT_RXD4 HT_RXD#4 HT_RXD5 HT_RXD#5 HT_RXD6 HT_RXD#6 HT_RXD7 HT_RXD#7 HT_RXD8 HT_RXD#8 HT_RXD9 HT_RXD#9 HT_RXD10 HT_RXD#10 HT_RXD11 HT_RXD#11 HT_RXD12 HT_RXD#12 HT_RXD13 HT_RXD#13 HT_RXD14 HT_RXD#14 HT_RXD15 HT_RXD#15 C B VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 AE2 AE3 AE4 AE5 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 C399 D1 D2 D3 D4 Note:on MCP77,(HT=+1.1V) and CPU(HT=+1.2V) and therefore cannot be connected to the same HT power rail. 4.7U_6 HT_TXD0 HT_TXD#0 HT_TXD1 HT_TXD#1 HT_TXD2 HT_TXD#2 HT_TXD3 HT_TXD#3 HT_TXD4 HT_TXD#4 HT_TXD5 HT_TXD#5 HT_TXD6 HT_TXD#6 HT_TXD7 HT_TXD#7 HT_TXD8 HT_TXD#8 HT_TXD9 HT_TXD#9 HT_TXD10 HT_TXD#10 HT_TXD11 HT_TXD#11 HT_TXD12 HT_TXD#12 HT_TXD13 HT_TXD#13 HT_TXD14 HT_TXD#14 HT_TXD15 HT_TXD#15 C +1.2V_HT VLDT_RUN L58 FBJ3216HS800_1206 L59 FBJ3216HS800_1206 80 ohm(4A) C401 4.7U_6 C428 4.7U_6 C427 .22U_4 C396 .22U_4 C394 180P_4 C424 180P_4 LAYOUT: Place bypass cap on topside of board NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS B <7> <7> <7> <7> Athlon 64 S1g2 SOCKET_638_PIN A NO STUB for HT3 R127 *51/F_4 R122 *51/F_4 Athlon 64 S1g2 Processor Socket SOCKET_638_PIN A Quanta Computer Inc. VLDT_RUN PROJECT : Z05 Size Document Number Rev 1A AMD Griffin HT I/F Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 2 of 34 A B C D VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE Processor DDR2 Memory Interface R265 1 2 R266 +1.8VSUS <6> M_B_DQ[0..63] D10 C10 B10 AD10 39.2/F_4 2 1 39.2/F_4 M_ZP M_ZN AF10 AE10 MEM_MA_RESET# H16 T43 <6> M_A_ODT0 <6> M_A_ODT1 M_A1_ODT0 M_A1_ODT1 T12 T26 <6> M_A_CS#0 <6> M_A_CS#1 M_A1_CS#0 M_A1_CS#1 T20 T16 T19 V22 U21 V19 T20 U19 U20 V20 J22 J20 <6> M_A_CKE0 <6> M_A_CKE1 N19 N20 E16 F16 Y16 AA16 P19 P20 T40 T33 <6> M_A_CLKOUT1 <6> M_A_CLKOUT1# <6> M_A_CLKOUT7 <6> M_A_CLKOUT7# T30 T38 <6> M_A_A[0..15] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 3 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 <6> M_A_BS#0 <6> M_A_BS#1 <6> M_A_BS#2 R20 R23 J21 <6> M_A_RAS# <6> M_A_CAS# <6> M_A_WE# R19 T22 T24 VTT1 VTT2 VTT3 VTT4 +1.8VSUS MEM:CMD/CTRL/CLK VTT5 VTT6 VTT7 VTT8 VTT9 MEMZP MEMZN VTT_SENSE RSVD_M1 MEMVREF MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 RSVD_M2 MB0_ODT0 MB0_ODT1 MB1_ODT0 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 MA_CKE0 MA_CKE1 MB_CKE0 MB_CKE1 MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L W10 AC10 AB10 AA10 A10 R103 2K/F_4 Y10 CPU_VTT_SUS_FB T15 W17 CPU_M_VREF B18 MEM_MB_RESET# T54 W26 W23 Y26 T13 M_B_ODT0 <6> M_B_ODT1 <6> M_B1_ODT0 V26 W25 U22 C100 C81 R102 .1U_4 1000P_4 2K/F_4 M_B_CS#0 <6> M_B_CS#1 <6> M_B1_CS#0 T18 J25 H26 M_B_CKE0 <6> M_B_CKE1 <6> P22 R22 A17 A18 AF18 AF17 R26 R25 To reverse SODIMM socket 4 U14C +SMDDR_VTERM U14B T32 T36 M_B_CLKOUT1 <6> M_B_CLKOUT1# <6> M_B_CLKOUT7 <6> M_B_CLKOUT7# <6> T31 T24 M_B_A[0..15] <6> M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24 R24 U26 J26 M_B_BS#0 <6> M_B_BS#1 <6> M_B_BS#2 <6> U25 U24 U23 M_B_RAS# <6> M_B_CAS# <6> M_B_WE# <6> Athlon 64 S1g2 SOCKET_638_PIN Athlon 64 S1g2 Processor Socket SOCKET_638_PIN <6> M_B_DM[0..7] <6> M_A_CLKOUT1 <6> M_B_CLKOUT1 2 C269 1.5pF_4 <6> M_A_CLKOUT1# C271 1.5pF_4 <6> M_B_CLKOUT1# PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH <6> M_A_CLKOUT7 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH <6> M_B_CLKOUT7 C61 1.5pF_4 C64 1.5pF_4 <6> M_A_CLKOUT7# <6> M_B_CLKOUT7# +SMDDR_VTERM C446 4.7U_6 C447 4.7U_6 C87 C65 4.7U_6 4.7U_6 C441 C444 C67 C69 C66 C68 C440 C443 C439 C442 C71 C70 .22U_4 .22U_4 .22U_4 .22U_4 1000P_4 1000P_4 1000P_4 1000P_4 180P_4 180P_4 180P_4 180P_4 <6> M_B_DQS[0..7] <6> M_B_DQS#[0..7] MEM:DATA M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 A12 B16 A22 E25 AB26 AE22 AC16 AD12 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 M_B_DQS0 M_B_DQS#0 M_B_DQS1 M_B_DQS#1 M_B_DQS2 M_B_DQS#2 M_B_DQS3 M_B_DQS#3 M_B_DQS4 M_B_DQS#4 M_B_DQS5 M_B_DQS#5 M_B_DQS6 M_B_DQS#6 M_B_DQS7 M_B_DQS#7 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 E12 C15 E19 F24 AC24 Y19 AB16 Y13 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13 M_A_DQS0 M_A_DQS#0 M_A_DQS1 M_A_DQS#1 M_A_DQS2 M_A_DQS#2 M_A_DQS3 M_A_DQS#3 M_A_DQS4 M_A_DQS#4 M_A_DQS5 M_A_DQS#5 M_A_DQS6 M_A_DQS#6 M_A_DQS7 M_A_DQS#7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 Athlon 64 S1g2 SOCKET_638_PIN Athlon 64 S1g2 Processor Socket SOCKET_638_PIN M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQ[0..63] <6> 4 To normal SODIMM socket +SMDDR_VTERM PLACE THEM CLOSE TO CPU WITHIN 1" E 3 M_A_DM[0..7] <6> 2 M_A_DQS[0..7] <6> M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_DQS#[0..7] <6> 1 1 Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A AMD Griffin DDRII MEMORY I/F Date: A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Monday, February 25, 2008 Sheet E 3 of 34 5 4 3 2 1 ATHLON Control and Debug LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG. +1.8VSUS L24 BLM18PG330SN1D_6 R261 390_4 CPU_SID R262 390_4 CPU_SIC R263 *390_4 R264 *1K/F_4 CPU_SID <12> CPU_SIC <12> R55 +1.8VSUS 2 C208 C209 .22U_4 3300P_4 C448 <7> CPU_CLKP <7> CPU_CLKN CPU_CLKN C449 CPU_VDDA_RUN Keep trace from resisor to CPU within 0.6" 3900P_4 keep trace from caps to CPU within 1.2" CPU_CLKIN_SC_P CPU_CLKIN_SC_N R329 CPU_HT_RESET# 169/F_6 CPU_HT_PWRGD CPU_HT_LDTSTOP# CPU_LDT_REQ#_CPU 3900P_4 CPU_SIC CPU_SID CPU_ALERT place them to CPU within 1.5" VLDT_RUN +1.8VSUS R162 C531 .1U_4 <26> CPU_VDD1_FB_H <26> CPU_VDD1_FB_L Y6 AB6 R402 *510/F_4 Close CPU Sockt 2/20/08' Implement on C-test R157 R403 *510/F_4 CPU_HT_LDTSTOP# 0_4 T44 T51 CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI G10 AA9 AC9 AD9 AF9 CPU_TEST23_TSTUPD AD7 CPU_TEST18_PLLTEST1 CPU_TEST19_PLLTEST0 H10 G9 CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L R158 300_4 <7> HTCPU_STOP# T79 T63 T55 +1.8VSUS R6 P6 <26> CPU_VDD0_FB_H <26> CPU_VDD0_FB_L CPU_HT_PWRGD 0_4 T83 T85 T82 T74 T81 T84 R168 AB8 AF7 AE7 AE8 AC8 AF8 0_4 CPU_TEST9_ANALOGIN C2 AA6 A3 A5 B3 B5 C1 R161 300_4 R160 CPU_HT_RESET# 0_4 E9 E8 CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN +1.8VSUS <7> HTCPU_RST# B7 A7 F10 C6 F6 E6 +1.8VSUS R163 300_4 A9 A8 AF4 AF5 AE6 44.2/F_4 CPU_HTREF0 44.2/F_4 CPU_HTREF1 R73 R72 F8 F9 VDDA1 VDDA2 KEY1 KEY2 CLKIN_H CLKIN_L RESET_L PWROK LDTSTOP_L LDTREQ_L SVC SVD THERMTRIP_L PROCHOT_L MEMHOT_L SIC SID ALERT_L M11 W18 0_4 A6 A4 AF6 AC7 AA8 CPU_THERMTRIP# CPU_PROCHOT# CPU_MEMHOT# VDDIO_FB_H VDDIO_FB_L VDDNB_FB_H VDDNB_FB_L DBRDY TMS TCK TRST_L TDI TEST23 DBREQ_L TDO TEST28_H TEST28_L TEST18 TEST19 TEST17 TEST16 TEST15 TEST14 TEST25_H TEST25_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 TEST9 TEST6 TEST7 TEST10 TEST8 TEST29_H TEST29_L RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 R70 330_4 W7 W8 3 CPU_THERMDC CPU_THERMDA W9 Y9 VDDIO_FB_H T14 H6 G6 CPU_MEMHOT# CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0 <7> R255 *300_4 E10 CPU_DBREQ# D7 E7 F7 C7 <22> MCP77_PROCHOT# R67 *330_4 <26> <26> AE9 CPU_TDO CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N EC_PROCHOT# *0_4 +1.8V <29> CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L J7 H8 Q24 MMBT3904 1 R251 3 Q23 *MMBT3904 1 CPUMEMHOT# <22> route as differential as short as possible testpoint under package T45 T42 C T61 T62 T56 T52 VID Override Circuit +1.8VSUS C3 K8 C4 C9 C8 CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N R155 1K_4 T53 T60 CPU_SVC_R RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 MCP77_THERMIP# <7> R252 300_4 +1.8VSUS VDD1_FB_H VDD1_FB_L <25,30> +1.8V HT_REF0 HT_REF1 VDD0_FB_H VDD0_FB_L THERM_SYS_PWR +1.8VSUS CPU_SVC_R CPU_SVD_R CPU_PROCHOT# THERMDC THERMDA D Q8 MMBT3904 3 1 R49 CPU_CLKP <7> HTCPU_PWRGD CPU_THERMTRIP# U14D 2 C270 4.7U_6 PWROK_EC <12,22> R250 300_4 CPU_ALERT 2 C285 100U-6.3V_3528 *4.7K_4 R58 *4.7K_4 CPU_VDDA_RUN D C R50 330_4 If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 390( ∮5%) pulldown to VSS. CPU_VDDA_RUN +2.5V +1.8V H18 H19 AA7 D5 C5 R159 R167 1K_4 Serial VID Clock 0_4 CPU_SVD_R R150 0_4 HTCPU_PWRGD R171 0_4 CPU SVC <26> Serial VID Data CPU SVD <26> CPU_PWRGD_SVID <26> Athlon 64 S1g2 SOCKET_638_PIN Athlon 64 S1g2 Processor Socket SOCKET_638_PIN +1.8VSUS R166 *220_4 R156 *220_4 R165 300_4 VFIX MODE CPU_LDT_REQ#_CPU R164 HTCPU_REQ# 0_4 HTCPU_REQ# <7> SVC 0 0 1 1 B +1.8VSUS HDT CONNECTOR B HDTGND R148 R254 R107 *300_4 R267 R268 R392 Voltage Output(CPU Power) 1.4V 1.2V 1.0V 0.8V 2/20/08' Mount 300 ohm on C-test +1.8VSUS CPU_TEST27_SINGLECHAIN SVD 0 1 0 1 CN6 *ASP-68200-07-25P-LDV MBDATA_CPU <22> G781 -ALT SMDATA SMCLK GND R397 *300_4 CPU_TEST20_SCANCLK2 R398 *300_4 CPU_TEST21_SCANEN R399 300_4 CPU_TEST22_SCANSHIFTEN R400 *300_4 CPU_TEST24_SCANCLK1 R401 300_4 Q3 6 7 8 5 2 +1.8VSUS 2/20/08' Mount 300 ohm on C-test CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO T59 T46 T78 T19 T80 T86 T77 +1.8VSUS +3V R174 R172 10K_4 1K/F_4 1 3 5 7 9 11 13 15 17 19 21 23 THERM_ALERT# <12> 2N7002E KBSMDAT KBSMCLK R23 4.7K_4 1 CPU_HT_RESET# Q4 2N7002E 3 1 H_HTCPU_RST# T64 3 Q14 MMBT3904 MBCLK_CPU <22> +3V Quanta Computer Inc. CPU_THERMDA 10 mil trace / 10 mil space R36 10K_4 PROJECT : Z05 To FAN Size CPUFAN#_ON 4 Document Number Rev 1A AMD Griffin CTRL & DEBUG <23> Date: 5 2 4 6 8 10 12 14 16 18 20 22 24 25 GND1 GND2 RSVD1 GND4 RSVD0 GND6 DBREQ_L GND8 DBRDY GND10 TCK GND12 TMS GND14 TDI GND16 TRST_L GND18 TDO GND20 VCC_PROC_IO_21 GND22 VCC_PROC_IO_23RESET_L GND26 KEY A 2 3 2 1 VCC DXN DXP -OVT *300_4 CPU_TEST19_PLLTEST0 To SB GPIO Address 98H U4 C37 2200P_4 +3V 2 R25 10K_4 1 3 2 4 CPU_THERMDC *300_4 R396 300_4 3V_THM C35 .1U_4 R395 CPU_TEST18_PLLTEST1 *220_4 3 15 MIL *0_4 CPU_TEST15_BP1 *220_4 Q5 2N7002E 1 A R404 *300_4 *220_4 R24 4.7K_4 +3V +3V 47/F_6 *300_4 R394 +3V 2/20/08' Reserve 0 ohm for CPU thermal issue on C-test R39 R393 CPU_TEST14_BP0 *220_4 CPU H/W MONITOR CPU_TEST12_SCANSHIFTENB 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 4 of 34 A B C D E PROCESSOR POWER AND GROUND 4 4 U14F CPU_CORE0 AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 CPU_CORE1 U14E G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 3 CPU_VDDNB_RUN +1.8VSUS K16 M16 P16 T16 V16 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 +1.8VSUS 2 Athlon 64 S1g2 SOCKET_638_PIN Athlon 64 S1g2 Processor Socket SOCKET_638_PIN A1 A26 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 CPU_CORE0 C179 22U-6.3V_8 CPU_CORE1 C162 22U-6.3V_8 C190 .22U_4 C181 .01U_4 C189 180P_4 2/22/08' Del C121, C107, C147 and C163 C136 22U-6.3V_8 C86 22U-6.3V_8 C96 .22U_4 C138 .01U_4 C102 180P_4 3 CPU_VDDNB_RUN C112 22U-6.3V_8 C159 22U-6.3V_8 C142 22U-6.3V_8 DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE 2 +1.8VSUS C82 4.7U_6 C140 4.7U_6 C80 4.7U_6 C98 4.7U_6 C199 .22U_4 C200 .22U_4 C206 .22U_4 C151 .22U_4 C178 .22U_4 C194 .22U_4 C164 .01U_4 C145 .01U_4 C113 180P_4 Athlon 64 S1g2 SOCKET_638_PIN Athlon 64 S1g2 Processor Socket SOCKET_638_PIN AMD S1g2 Griffin uPGA638 1 1 Top View Quanta Computer Inc. AF1 PROJECT : Z05 Size Document Number Rev 1A AMD Griffin PWR & GND Date: A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Monday, February 25, 2008 Sheet E 5 of 34 A B C D E +1.8VSUS 81 82 87 88 95 96 103 104 111 112 117 118 +1.8VSUS 30 32 164 166 <3> M_A_CKE0 <3> M_A_CKE1 79 80 <3> M_A_RAS# <3> M_A_CAS# <3> M_A_WE# <3> M_A_CS#0 <3> M_A_CS#1 108 113 109 110 115 <3> M_A_ODT0 <3> M_A_ODT1 114 119 198 200 C57 MEM_SMBDAT MEM_SMBCLK .1U_4 199 +3V C294 .1U_4 MVREF_DIM 1 2 +1.8VSUS 195 197 C291 2.2U_6 C292 .1U_4 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 RAS CAS WE S0 S1 ODT0 ODT1 SA0 SA1 SDA SCL VDDspd VREF VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 (H=5.2) M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 <3> M_B_DQS#[0..7] CKE0 CKE1 <3> M_B_RAS# <3> M_B_CAS# <3> M_B_WE# <3> M_B_CS#0 <3> M_B_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 <3> M_B_ODT0 <3> M_B_ODT1 114 119 ODT0 ODT1 C54 MEM_SMBDAT MEM_SMBCLK .1U_4 +3V +1.8VSUS R180 R179 *0_4 1K/F_4 MVREF_DIM C293 R178 1U_4 1K/F_4 198 200 195 197 199 MVREF_DIM C296 .1U_4 +SMDDR_VREF DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 79 80 10K_4 0_4 C298 2.2U_6 C295 .1U_4 1 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 50 69 83 120 163 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 <3> M_B_CKE0 <3> M_B_CKE1 R65 R63 NC1 NC2 NC3 NC4 NC/TEST DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 30 32 164 166 +3V 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 11 29 49 68 129 146 167 186 REVERSE BA0 BA1 BA2 <3> M_B_CLKOUT1 <3> M_B_CLKOUT1# <3> M_B_CLKOUT7 <3> M_B_CLKOUT7# T57 +1.8VSUS VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 13 31 51 70 131 148 169 188 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 50 69 83 120 163 CKE0 CKE1 59 60 65 66 71 72 77 78 121 122 127 128 132 1 2 NC1 NC2 NC3 NC4 NC/TEST CK0 CK0 CK1 CK1 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 J1 CK0 CK0 CK1 CK1 SA0 SA1 SDA SCL VDDspd VREF VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 (H=9.2) VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 M_B_DQ4 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ5 M_B_DQ0 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ15 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ11 M_B_DQ16 M_B_DQ21 M_B_DQ19 M_B_DQ23 M_B_DQ20 M_B_DQ17 M_B_DQ18 M_B_DQ22 M_B_DQ29 M_B_DQ28 M_B_DQ26 M_B_DQ27 M_B_DQ24 M_B_DQ25 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ36 M_B_DQ39 M_B_DQ35 M_B_DQ33 M_B_DQ37 M_B_DQ34 M_B_DQ38 M_B_DQ40 M_B_DQ41 M_B_DQ46 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ47 M_B_DQ42 M_B_DQ53 M_B_DQ49 M_B_DQ54 M_B_DQ50 M_B_DQ48 M_B_DQ52 M_B_DQ55 M_B_DQ51 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ59 M_B_DQ57 M_B_DQ56 M_B_DQ63 M_B_DQ58 T58 T49 T3 +SMDDR_VTERM 4 M_A_CKE0 M_A_A12 RP25 DDRII_SODIMM_R H5.2 DDRII_SODIMM_R H9.2 +SMDDR_VTERM 2 47X2_4 4 1 3 +1.8VSUS M_A_ODT0 M_A_A13 M_B_CS#0 M_B_A2 RP7 RP5 M_A_BS#1 M_A_A0 M_A_BS#2 RP13 M_A_CAS# M_A_ODT1 M_A_RAS# RP6 M_A_CS#0 M_A_CS#1 M_B_A13 M_B_ODT0 R120 R117 RP3 M_B_BS#1 M_B_A0 M_B_BS#2 RP11 M_B_CAS# M_B_WE# M_B_RAS# RP8 M_B_ODT1 M_B_CS#1 RP4 2 47X2_4 4 2 47X2_4 4 1 3 1 3 1 3 2 47X2_4 4 47_4 1 3 2 47X2_4 4 47_4 R142 R128 2 47X2_4 4 47_4 1 3 R137 4 47X2_4 2 47_4 3 1 R125 4 47X2_4 2 3 1 *10U-6.3V_8 C101 *10U-6.3V_8 C139 C99 C167 C258 C134 C251 C245 C114 C229 C132 C103 C118 C237 C255 C239 C241 C240 C135 C116 C256 C117 C252 C250 C106 C105 C108 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 *.1U_4 *.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 *.1U_4 .1U_4 .1U_4 .1U_4 *.1U_4 .1U_4 .1U_4 .1U_4 *.1U_4 .1U_4 C410 47_4 47_4 2 47X2_4 4 1 3 C83 *10U-6.3V_8 C425 *10U-6.3V_8 C235 22U-6.3V_8 C120 22U-6.3V_8 C126 .1U_4 C158 .1U_4 C220 .1U_4 C421 .1U_4 C198 .1U_4 C218 .1U_4 C88 .1U_4 C127 .1U_4 C226 .1U_4 C175 .1U_4 C89 .1U_4 C186 .1U_4 C413 .1U_4 C419 .1U_4 C238 .1U_4 C160 .1U_4 C191 .1U_4 C415 .1U_4 C204 .1U_4 C153 .1U_4 3 M_A_WE# M_A_BS#0 M_A_A10 M_A_A4 M_A_A6 M_A_A7 M_A_A11 M_A_A14 M_A_A9 M_A_A2 M_A_A1 M_A_A3 M_A_A8 M_A_A5 M_A_CKE1 M_A_A15 RP9 RP18 RP22 RP26 RP21 RP12 RP17 RP28 1 3 1 3 1 3 3 1 1 3 1 3 1 3 3 1 2 47X2_4 4 2 47X2_4 4 2 47X2_4 4 447X2_4 2 2 47X2_4 4 2 47X2_4 4 2 47X2_4 4 4 47X2_4 2 1 3 1 3 1 3 1 3 1 3 1 3 1 3 3 1 2 4 2 4 2 4 2 4 2 4 2 4 2 4 4 2 +1.8VSUS M_B_A4 M_B_A6 M_B_A7 M_B_A11 M_B_A15 M_B_A14 M_B_A1 M_B_A3 M_B_A8 M_B_A5 M_B_A12 M_B_A9 M_B_A10 M_B_BS#0 M_B_CKE0 M_B_CKE1 RP15 RP20 RP24 RP14 RP19 RP23 RP10 RP27 +SMDDR_VTERM 47X2_4 C187 .1U_4 C173 .1U_4 C155 .1U_4 C125 .1U_4 C254 .1U_4 C143 .1U_4 C232 .1U_4 C221 .1U_4 C183 .1U_4 C195 .1U_4 C161 .1U_4 C211 .1U_4 C219 *.1U_4 C79 *.1U_4 C234 *.1U_4 47X2_4 47X2_4 47X2_4 47X2_4 47X2_4 47X2_4 47X2_4 2 +3V 2 4 <3> M_A_CLKOUT1 <3> M_A_CLKOUT1# <3> M_A_CLKOUT7 <3> M_A_CLKOUT7# DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 <3> M_B_DQS[0..7] 10 26 52 67 130 147 170 185 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 RP2 *4.7KX2_4 Q11 *2N7002E <12> MSMB_DATA 3 1 R62 +3V D20 *DA204U 1 3 <3> M_A_DQS#[0..7] 11 29 49 68 129 146 167 186 <3> M_B_DM[0..7] M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_B_DQ[0..63] <3> DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 2 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 3 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 107 106 85 <3> M_B_BS#0 <3> M_B_BS#1 <3> M_B_BS#2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 SO-DIMM <3> M_A_DQS[0..7] DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 M_A_DQS0 13 M_A_DQS1 31 M_A_DQS2 51 M_A_DQS3 70 M_A_DQS4 131 M_A_DQS5 148 M_A_DQS6 169 M_A_DQS7 188 BA0 BA1 BA2 2 <3> M_A_DM[0..7] 10 26 52 67 130 147 170 185 J2 M_A_DQ1 M_A_DQ5 M_A_DQ2 M_A_DQ3 M_A_DQ0 M_A_DQ4 M_A_DQ7 M_A_DQ6 M_A_DQ8 M_A_DQ13 M_A_DQ10 M_A_DQ14 M_A_DQ12 M_A_DQ9 M_A_DQ15 M_A_DQ11 M_A_DQ20 M_A_DQ21 M_A_DQ23 M_A_DQ18 M_A_DQ19 M_A_DQ17 M_A_DQ22 M_A_DQ16 M_A_DQ29 M_A_DQ28 M_A_DQ31 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ30 M_A_DQ27 M_A_DQ38 M_A_DQ36 M_A_DQ35 M_A_DQ37 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ39 M_A_DQ45 M_A_DQ44 M_A_DQ42 M_A_DQ46 M_A_DQ41 M_A_DQ40 M_A_DQ43 M_A_DQ47 M_A_DQ52 M_A_DQ49 M_A_DQ50 M_A_DQ55 M_A_DQ53 M_A_DQ48 M_A_DQ54 M_A_DQ51 M_A_DQ56 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ61 M_A_DQ63 M_A_DQ62 1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 REVERSE SO-DIMM 107 106 85 <3> M_A_BS#0 <3> M_A_BS#1 <3> M_A_BS#2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_A_DQ[0..63] <3> 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 4 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 59 60 65 66 71 72 77 78 121 122 127 128 132 81 82 87 88 95 96 103 104 111 112 117 118 <3> M_B_A[0..15] <3> M_A_A[0..15] 1 MEM_SMBDAT 3 2 0_4 2 +3V Q10 *2N7002E +3V D21 *DA204U 1 <12> MSMB_CLK 3 1 R66 1 MEM_SMBCLK 3 2 0_4 1 Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A DDR-II SODIMM*2 Date: A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Monday, February 25, 2008 Sheet E 6 of 34 5 4 3 2 <2> HT_TXD[15..0] 1 HT_RXD[15..0] <2> HT_RXD#[15..0] <2> <2> HT_TXD#[15..0] U15A AJMCP770T02 FCBGA836-NVIDIA-MCP67 D D SEC 1 OF 8 HT_TXD0 HT_TXD#0 HT_TXD1 HT_TXD#1 HT_TXD2 HT_TXD#2 HT_TXD3 HT_TXD#3 HT_TXD4 HT_TXD#4 HT_TXD5 HT_TXD#5 HT_TXD6 HT_TXD#6 HT_TXD7 HT_TXD#7 HT_TXD8 HT_TXD#8 HT_TXD9 HT_TXD#9 HT_TXD10 HT_TXD#10 HT_TXD11 HT_TXD#11 HT_TXD12 HT_TXD#12 HT_TXD13 HT_TXD#13 HT_TXD14 HT_TXD#14 HT_TXD15 HT_TXD#15 AF16 AG16 AH16 AJ16 AJ15 AK15 AK16 AL16 AG17 AF17 AL17 AK17 AL18 AK18 AJ19 AK19 AD14 AE14 AF14 AG14 AH14 AJ14 AL13 AK13 AC15 AD15 AD16 AE16 AE17 AD17 AB17 AC17 HT_MCP_RXD0_P HT_MCP_RXD0_N HT_MCP_RXD1_P HT_MCP_RXD1_N HT_MCP_RXD2_P HT_MCP_RXD2_N HT_MCP_RXD3_P HT_MCP_RXD3_N HT_MCP_RXD4_P HT_MCP_RXD4_N HT_MCP_RXD5_P HT_MCP_RXD5_N HT_MCP_RXD6_P HT_MCP_RXD6_N HT_MCP_RXD7_P HT_MCP_RXD7_N HT_MCP_RXD8_P HT_MCP_RXD8_N HT_MCP_RXD9_P HT_MCP_RXD9_N HT_MCP_RXD10_P HT_MCP_RXD10_N HT_MCP_RXD11_P HT_MCP_RXD11_N HT_MCP_RXD12_P HT_MCP_RXD12_N HT_MCP_RXD13_P HT_MCP_RXD13_N HT_MCP_RXD14_P HT_MCP_RXD14_N HT_MCP_RXD15_P HT_MCP_RXD15_N <2> HT_CPU_DWNCLK0 <2> HT_CPU_DWNCLK#0 <2> HT_CPU_DWNCLK1 <2> HT_CPU_DWNCLK#1 AJ17 AH17 AL14 AK14 <2> HT_CPU_DWNCTL0 <2> HT_CPU_DWNCTL#0 <2> HT_CPU_DWNCTL1 <2> HT_CPU_DWNCTL#1 AH19 AG19 AC18 AD18 C MCP77_THERMIP# AC13 MCP77_PROCHOT# AB13 <4> MCP77_THERMIP# <4> MCP77_PROCHOT# 70mA +3V 128mA +1.1V_NB B 17mA +1.1V_NB +1.1V_NB L15 C192 C174 L55 C149 C414 L57 C146 C422 +3.3V_PLL_HT TI160808U300_6 2.2U_4 R13 4.7U_6 TI160808U300_6 +1.1V_HT_PLL 2.2U_4 AB15 10U-6.3V_8 TI160808U300_6 +1.1V_PLL_CPU AB16 2.2U_4 4.7U_6 AK27 AJ27 AK26 AL26 AK25 AL25 AL24 AK24 AK22 AL22 AK21 AL21 AH21 AJ21 AL20 AM20 AG27 AH27 AF25 AG25 AH25 AJ25 AE23 AF23 AD21 AE21 AF21 AG21 AC20 AD20 AE19 AF19 HT_MCP_RX_CLK0_P HT_MCP_RX_CLK0_N HT_MCP_RX_CLK1_P HT_MCP_RX_CLK1_N HT_MCP_TX_CLK0_P HT_MCP_TX_CLK0_N HT_MCP_TX_CLK1_P HT_MCP_TX_CLK1_N AK23 AJ23 AG23 AH23 HT_CPU_UPCLK0 <2> HT_CPU_UPCLK#0 <2> HT_CPU_UPCLK1 <2> HT_CPU_UPCLK#1 <2> HT_MCP_RXCTL0_P HT_MCP_RXCTL0_N HT_MCP_RXCTL1_P HT_MCP_RXCTL1_N HT_MCP_TXCTL0_P HT_MCP_TXCTL0_N HT_MCP_TXCTL1_P HT_MCP_TXCTL1_N AK20 AJ20 AD19 AC19 HT_CPU_UPCTL0 <2> HT_CPU_UPCTL#0 <2> HT_CPU_UPCTL1 <2> HT_CPU_UPCTL#1 <2> HT_MCP_REQ# HT_MCP_STOP# HT_MCP_RST# HT_MCP_PWRGD AD23 AB20 AC21 AD22 CLKOUT_200MHZ_P CLKOUT_200MHZ_N AL28 AM28 CLKOUT_25MHZ AK28 +3.3V_DLL_HT HT_MCP_COMP_VDD R310 150/F_4 HTMCP_COMP_GND AL12 HT_MCP_COMP_GND R143 2.37K/F_4 MCP77_CTERM_GNDAJ28 AG28 HTCPU_REQ# R287 C 300_4 HTCPU_REQ# <4> HTCPU_STOP# <4> HTCPU_RST# <4> HTCPU_PWRGD <4> B CPU_CLKP <4> CPU_CLKN <4> +1.1V_PLL_CPU HTMCP_COMP_VDDAM12 CPU_SBVREF +1.8VSUS MCP77_PROCHOT# +1.1V_PLL_HT 150/F_4 0_4 .1U_4 HT THERMTRIP#/GPIO_58 PROCHOT#/GPIO_20 +1.1V_HT_PLL R316 R147 C244 HT_RXD0 HT_RXD#0 HT_RXD1 HT_RXD#1 HT_RXD2 HT_RXD#2 HT_RXD3 HT_RXD#3 HT_RXD4 HT_RXD#4 HT_RXD5 HT_RXD#5 HT_RXD6 HT_RXD#6 HT_RXD7 HT_RXD#7 HT_RXD8 HT_RXD#8 HT_RXD9 HT_RXD#9 HT_RXD10 HT_RXD#10 HT_RXD11 HT_RXD#11 HT_RXD12 HT_RXD#12 HT_RXD13 HT_RXD#13 HT_RXD14 HT_RXD#14 HT_RXD15 HT_RXD#15 HT_MCP_TXD0_P HT_MCP_TXD0_N HT_MCP_TXD1_P HT_MCP_TXD1_N HT_MCP_TXD2_P HT_MCP_TXD2_N HT_MCP_TXD3_P HT_MCP_TXD3_N HT_MCP_TXD4_P HT_MCP_TXD4_N HT_MCP_TXD5_P HT_MCP_TXD5_N HT_MCP_TXD6_P HT_MCP_TXD6_N HT_MCP_TXD7_P HT_MCP_TXD7_N HT_MCP_TXD8_P HT_MCP_TXD8_N HT_MCP_TXD9_P HT_MCP_TXD9_N HT_MCP_TXD10_P HT_MCP_TXD10_N HT_MCP_TXD11_P HT_MCP_TXD11_N HT_MCP_TXD12_P HT_MCP_TXD12_N HT_MCP_TXD13_P HT_MCP_TXD13_N HT_MCP_TXD14_P HT_MCP_TXD14_N HT_MCP_TXD15_P HT_MCP_TXD15_N CLKOUT_25MHz T108 L56 TI160808U300_6 CPU_SBVREF CLK200_TERM_GND +1.1V_HT_D1 +1.1V_HT_D2 +1.1V_HT_D3 Y15 Y17 Y16 +1.1V_HT_A1 +1.1V_HT_A2 +1.1V_HT_A3 +1.1V_HT_A4 V15 V16 W15 W16 +1.1V_HT_D +1.1V_NB C170 C166 C417 C418 1U_4 1U_4 4.7U_6 22U-6.3V_8 800mA L49 PBY201209T_8 +1.1V_HT_A +1.1V_NB C148 C156 C388 C389 C387 1U_4 1U_4 4.7U_6 4.7U_6 22U-6.3V_8 2370mA A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 HyperTransport Bus Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, March 10, 2008 Sheet 1 7 of 34 5 4 3 2 1 U15B FCBGA836-NVIDIA-MCP67 D <15,17,22> PCIE_WAKE# PE0_PRSNTX1 PE0_PRSNTX4 PE0_PRSNTX8 PE0_PRSNTX16 T106 T107 T104 T105 C <15> PCIE-LAN_RXP <15> PCIE-LAN_RXN <15> LAN_CLKREQ# [LAN] <17> PCIE-NEW_RXP <17> PCIE-NEW_RXN <17> NEW_CLKREQ# <17> CPPE# [NEW CARD] [MINI CARD-1] LAN_CLKREQ1# D26 BAS316 <17> PCIE-MINI1_RXP <17> PCIE-MINI1_RXN <17> MINI1_CLKREQ# NEW_CLKREQ# CPPE#_R MINI1_CLKREQ# B L19 10mA C260 C185 +3.3V_PLL_HT H17 U31 U30 U29 U28 PE_WAKE#/GPIO_21 PE0_PRSNT_1# PE0_PRSNT_4# PE0_PRSNT_8# PE0_PRSNT_16# L29 L30 W27 W28 PE1_RX_P PE1_RX_N PEB_CLKREQ# PEB_PRSNT# M26 M27 U26 U27 PE2_RX_P PE2_RX_N PEC_CLKREQ# PEC_PRSNT# N23 N22 U25 U24 PE3_RX_P PE3_RX_N PED_CLKREQ# PED_PRSNT# N30 N31 R22 U23 PE4_RX_P PE4_RX_N PEE_CLKREQ#/GPIO_16 PEE_PRSNT# P31 P30 T22 V31 PE5_RX_P PE5_RX_N PEF_CLKREQ#/GPIO_17 PEF_PRSNT# P26 P27 U22 V30 PE6_RX_P PE6_RX_N PEG_CLKREQ#/GPIO_18 PEG_PRSNT# SEC 2 OF 8 PCIE C212 C259 4.7U_6 2.2U_4 +1.1V_PLLPE_SS U19 +1.1V_PLL_PE_SS1 MLG1608B10NJ_6 +1.1V_PLLPE 2.2U_4 4.7U_6 +3.3V_PLL_HT R20 R19 +1.1V_PLL_PE1 NC2/+1.2V_PLL_PE2 P20 NC1/+3.3V_PLL_PE_SS2 C141 PE_CLK_COMP .1U_4 V24 PE0_TX0_P PE0_TX0_N PE0_TX1_P PE0_TX1_N PE0_TX2_P PE0_TX2_N PE0_TX3_P PE0_TX3_N PE0_TX4_P PE0_TX4_N PE0_TX5_P PE0_TX5_N PE0_TX6_P PE0_TX6_N PE0_TX7_P PE0_TX7_N PE0_TX8_P PE0_TX8_N PE0_TX9_P PE0_TX9_N PE0_TX10_P PE0_TX10_N PE0_TX11_P PE0_TX11_N PE0_TX12_P PE0_TX12_N PE0_TX13_P PE0_TX13_N PE0_TX14_P PE0_TX14_N PE0_TX15_P PE0_TX15_N D24 C24 A24 B24 B25 C25 B26 C26 C27 D27 A28 B28 A29 B29 A30 B30 B31 B32 C31 C32 D31 D32 E31 E30 F31 F30 G29 G30 H29 H30 H32 H31 PEA_REFCLK_P PEA_REFCLK_N R29 R30 PE1_TX_P PE1_TX_N PEB_REFCLK_P PEB_REFCLK_N M28 M29 T32 T31 D C [CARD Reader] C248 C249 R151 R152 .1U_4 .1U_4 22_4 22_4 PE2_TX_P PE2_TX_N PEC_REFCLK_P PEC_REFCLK_N M24 M25 T29 T30 PCIE-LAN_TXP_C PCIE-LAN_TXN_C CLK_PCIE-LAN_C_R CLK_PCIE-LAN_C#_R PE3_TX_P PE3_TX_N PED_REFCLK_P PED_REFCLK_N M22 M23 T27 T28 PCIE-NEW_TXP_C PCIE-NEW_TXN_C CLK_PCIE_NEW_R CLK_PCIE_NEW#_R C246 C247 R145 R144 .1U_4 .1U_4 22_4 22_4 PE4_TX_P PE4_TX_N PEE_REFCLK_P PEE_REFCLK_N M30 M31 T25 T26 PCIE-MINI1_TXP_C PCIE-MINI1_TXN_C CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R C272 C273 R139 R140 .1U_4 .1U_4 22_4 22_4 PE5_TX_P PE5_TX_N PEF_REFCLK_P PEF_REFCLK_N P29 P28 T23 T24 PE6_TX6_P PE6_TX6_N PEG_REFCLK_P PEG_REFCLK_N P24 P25 P23 R23 PE_CLK_COMP R133 *2.37K/F_4 +1.1V_PED_A1 W26 +1.1V_PED_B1 +1.1V_PED_B2 +1.1V_PED_B3 +1.1V_PED_B4 W24 V23 V22 W25 +1.1V_PEA_A1 +1.1V_PEA_A2 Y29 Y27 +1.1V_PEA_B1 +1.1V_PEA_B2 +1.1V_PEA_B3 +1.1V_PEA_B4 +1.1V_PEA_B5 +1.1V_PEA_B6 Y25 Y24 W23 Y23 W22 Y22 PE_RST0# PE_RST1# W30 W29 <500mil +1.1V_PED L61 C233 .1U_4 C225 1U_4 C213 1U_4 PCIE-MINI1_TXP <17> PCIE-MINI1_TXN <17> CLK_PCIE_MINI1 <17> CLK_PCIE_MINI1# <17> [NEW CARD] [MINI CARD-1] CLK_PCIE-LAN C276 *10P_4 CLK_PCIE-LAN# C277 *10P_4 CLK_PCIE_MINI1 CLK_PCIE_MINI1# C274 C275 *10P_4 *10P_4 CLK_PCIE_NEW CLK_PCIE_NEW# C267 C266 *10P_4 *10P_4 0_6 +1.1V_NB 200mA+500mA C454 22U-6.3V_8 563mA+1500mA L60 C205 .1U_4 C243 .1U_4 C210 .1U_4 C253 1U_4 C455 4.7U_6 C453 22U-6.3V_8 C452 22U-6.3V_8 PBY201209T_8 +1.1V_NB C451 22U-6.3V_8 PCIE_RST# <15> Add 0R resistor, The resistor should only be stuffed for MCP67D PCIE_RST1# For EMI [LAN] PCIE-NEW_TXP <17> PCIE-NEW_TXN <17> CLK_PCIE_NEW <17> CLK_PCIE_NEW# <17> +1.1V_PEA R328 *0_4 Remove R116 for Nvidia suggest. A PCIE-LAN_TXP <15> PCIE-LAN_TXN <15> CLK_PCIE-LAN <15> CLK_PCIE-LAN# <15> B +1.1V_PLLPE_SS L18 80mA PE0_RX0_P PE0_RX0_N PE0_RX1_P PE0_RX1_N PE0_RX2_P PE0_RX2_N PE0_RX3_P PE0_RX3_N PE0_RX4_P PE0_RX4_N PE0_RX5_P PE0_RX5_N PE0_RX6_P PE0_RX6_N PE0_RX7_P PE0_RX7_N PE0_RX8_P PE0_RX8_N PE0_RX9_P PE0_RX9_N PE0_RX10_P PE0_RX10_N PE0_RX11_P PE0_RX11_N PE0_RX12_P PE0_RX12_N PE0_RX13_P PE0_RX13_N PE0_RX14_P PE0_RX14_N PE0_RX15_P PE0_RX15_N MLG1608B10NJ_6 +1.1V_NB +1.1V_NB F23 G23 F24 F25 D25 D26 C28 D28 C29 C30 D29 D30 F26 F27 F28 F29 H23 H24 H25 H26 H27 H28 K24 K25 K27 K26 K28 K29 J31 J30 K31 K30 <17,19> A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 PCI-Express Bus Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, March 10, 2008 Sheet 1 8 of 34 5 4 3 2 1 U15D PCI/LPC PULL-UP FCBGA836-NVIDIA-MCP67 D MCP77 SEC 4 OF 8 REQ0# REQ1# REQ2# REQ3# REQ4# C <22> SERIRQ R303 R111 R121 R112 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_INTW# PCI_INTX# PCI_INTY# PCI_INTZ# TRDY# K14 PCI_TRDY# LDRQ#1 LDRQ#0 SERIRQ 10K_4 5.6K_4 10K_4 4.7K_4 D10 B10 C10 L12 K11 J11 D11 C11 J12 H12 G12 F12 E12 D12 C12 B12 G14 E14 D14 J15 C14 D15 K15 C15 L16 G16 J16 E16 H16 D16 F16 A16 L17 J17 B16 K17 PDD7 B +3V PCI_REQ0# PCI_REQ1#/FANRPM2 PCI_REQ2#/GPIO_40/RS232_DSR# PCI_REQ3#/GPIO_38/RS232_CTS# PCI_REQ4#/GPIO_52/RS232_SIN# INTA# INTB# INTC# INTD# <22> CLKRUN# T100 T101 E10 G10 J10 M11 E8 PDDREQ IDE_INTR PIORDY F10 H10 K10 L10 F8 GNT0# T34 L13 J14 H14 B14 J13 C13 B13 DEVSEL# FRAME# IRDY# PCI_PME#/GPIO_30 6 7 8 9 10 STOP# SERR# IRDY# FRAME# 6 7 8 9 10 RP31 8.2KX8_10P8R 5 4 3 2 1 +3V C16 PCI_PME# J9 PCIRST_R# PCI_RESET1# K9 IDERST_R# PCI_RESET2# K8 PCIRST2# R116 LPC_DRQ1#/GPIO19/FANRPM1 LPC_DRQ0#/GPIO_50 LPC_SERIRQ PCI_CLK_129_R PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLKIN A1AL:match D = Length *33_4 IDE_DATA_P0/WUSB_DATA0 IDE_DATA_P1/WUSB_DATA1 IDE_DATA_P2/WUSB_DATA2 IDE_DATA_P3/WUSB_DATA3 IDE_DATA_P4/WUSB_DATA4 IDE_DATA_P5/WUSB_DATA5 IDE_DATA_P6/WUSB_DATA6 IDE_DATA_P7/WUSB_DATA7 IDE_DATA_P8 IDE_DATA_P9 IDE_DATA_P10 IDE_DATA_P11 IDE_DATA_P12 IDE_DATA_P13 IDE_DATA_P14 IDE_DATA_P15 LPC T22 T21 T99 T97 T98 R118 IDE IDE_DREQ_P/WUSB_PCLK IDE_INTR_P/WUSB_PHY_ACTIVE IDE_RDY_P/WUSB_DATA_EN IDE_IOR_P#/WUSB_SERIAL_DATA CABLE_DET_P/GPIO_63 R115 22_4 LFRAME#_R LPC_PD# C7 L9 LPC_RST1# LPC_RST2# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_CLK0 A4 B4 C4 A3 B5 LAD0_R LAD1_R LAD2_R LAD3_R LPC_CLK_EC_R R309 R311 R99 R307 R306 22_4 22_4 22_4 22_4 22_4 LPC_CLK1 C5 PCI_CLK_DEBUG__R R108 22_4 AG12 AE12 AH12 IDE_CS1_P#/WUSB_PHY_RESET# IDE_CS3_P# IDE_DACK_P# AJ12 AK12 AJ11 IDE_IOW_P#/WUSB_CCA_STATUS AJ10 IDE_COMP_3P3V IDE_COMP_GND AM4 AK4 +3V PCI_PME# R318 *8.2K_4 CLKRUN# R105 8.2K_4 CLOCK BYPASS 33_4 C411 PCI_CLK_DEBUG__R PLTRST# <17,22> PCI_CLKIN T27 R302 IDE_COMP_3V IDE_COMP_3V_GND R104 15K_4 LFRAME# <12,17,22> T96 R110 C +3V 22_4 to within 3000 of PCI feedback and onboard devices = A + B + C D7 B3 IDE_ADDR_P0/WUSB_STOPC IDE_ADDR_P1/WUSB_RX_EN IDE_ADDR_P2/WUSB_TX_EN REQ2# REQ1# REQ0# REQ4# +3V PCIRST# <15> LPC_RESET0# LPC_RESET1# LPC_FRAME# LPC_PWRDWN#/GPIO_54/EXT_NMI# INTC# TRDY# PERR# REQ3# T28 LPC_CLK_EC PCI_CLKRUN#/GPIO_42 D PERR# SERR# STOP# PCI_RESET0# C9 B9 B8 A8 C8 D8 INTD# INTA# DEVSEL# INTB# +3V K12 K13 F14 K16 PCI_DEVSEL# PCI_FRAME# PCI_IRDY# PCI_PAR PCI_PERR#/GPIO_43/RS232_DCD# PCI_SERR# PCI_STOP# PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLKIN C6 B6 D6 AK11 AH10 AK10 AL10 CABLE_DET_P AF12 PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3# PCI D5 AF10 AL9 AK8 AK7 AK6 AJ6 AL5 AL4 AJ5 AK5 AL6 AJ7 AJ8 AL8 AK9 AG10 PCI_GNT0# PCI_GNT1#/FANCTL2 PCI_GNT2#/GPIO_41/RS232_DTR# PCI_GNT3#/GPIO_39/RS232_RTS# PCI_GNT4#/GPIO_53/RS232_SOUT# RP16 8.2KX8_10P8R 5 4 3 2 1 121/F_4 *5P_4 C95 *5P_4 C144 *5P_4 LAD0 <17,22> LAD1 <17,22> LAD2 <17,22> LAD3 <17,22> LPC_CLK_EC <22> PCI_CLK_DEBUG1 <17> B +3V R98 121/F_4 A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 PCI/LPC/IDE Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 9 of 34 5 4 3 2 1 U15C FCBGA836-NVIDIA-MCP67 D SEC 3 OF 8 R322 10K_4 R320 R319 10K_4 10K_4 R132 C193 RGMII_RXD0/MII_RXD0 RGMII_RXD1/MII_RXD1 RGMII_RXD2/MII_RXD2 RGMII_RXD3/MII_RXD3 RGMII_RXC/MII_RXCLK RGMII_RXCTL/MII_RXDV C19 J18 D19 MII_RXER/GPIO_36 MII_COL/MSMB_DATA MII_CRS/MSMB_CLK LAN_INT B18 +1.1V_DUAL +1.1V_DUAL B20 C20 E19 F19 G19 J20 +1.1V_PLL_MAC_DUAL B17 C17 MII_COMP_3P3V MII_COMP_GND E23 H22 L13 TI160808U300_6 C 63mA +1.1V_PLL_DISP +1.1V_NB C152 4.7U_6 RGMII/MII_INTR/GPIO35 N13 RGB_DAC_RSET K21 RGB_DAC_VREF D21 124/F_4 .01U_4 N15 E17 F17 C150 2.2U_4 LAN L14 +1.1V_DUAL_RMGT N18 +1.1V_DUAL RGMII_TXD0/MII_TXD0 RGMII_TXD1/MII_TXD1 RGMII_TXD2/MII_TXD2 RGMII_TXD3/MII_TXD3 RGMII_TXCLK/MII_TXCLK RGMII_TXCTL/MII_TXEN J19 K19 L19 L18 H19 K18 RGMII/MII_MDC RGMII/MII_MDIO K20 L20 RGMII/MII_PWRDWN#/GPIO_37 R130 10K_4 R129 10K_4 G17 MII_RESET# MII_VREF C18 H20 RGMII_VREF R131 RGB_DAC_RED RGB_DAC_GREEN RGB_DAC_BLUE TV_DAC_RSET TV_DAC_VREF RGB_DAC_HSYNC RGB_DAC_VSYNC G21 H21 DDC_CLK0 DDC_DATA0 +3.3V_RGB_DAC R270 R269 MCP67_GPIO6 MCP67_GPIO7 *8.2K_4 *8.2K_4 <14> L_BKLT_CTRL <16> INT_LVDS_BLON <14> INT_LVDS_DIGON HDMI_TXCP_C HDMI_TXCN_C T112 T115 B 8mA+52mA 12mA 300mA +1.1V_NB L21 +1.8V +3V HPLUG_DET3 HPLUG_DET2 R141 R330 10K_4 10K_4 L25 C282 C230 C281 L62 C450 C215 C207 0_6 4.7U_6 +1.8V_IFP *1U_4 .1U_4 TI160808U300_6 +3.3V_PLL_IFPP *4.7U_6 .1U_4 .1U_4 TI160808U300_6 C261 .1U_4 AL29 AM29 HDMI_TXC_P/ML0_LANE3_P HDMI_TXC_N/ML0_LANE3_N C177 .1U_4 R331 *1K/F_4 HDMI_TXD0_P/ML0_LANE2_P HDMI_TXD0_N/ML0_LANE2_N HDMI_TXD1_P/ML0_LANE1_P HDMI_TXD1_N/ML0_LANE1_N HDMI_TXD2_P/ML0_LANE0_P HDMI_TXD2_N/ML0_LANE0_N AUX_CH0_P AUX_CH0_N AE26 AL32 HPLUG_DET3 HPLUG_DET2 AC24 AC25 +1.8V_IFPA +1.8V_IFPB AC23 AC22 +3.3V_IFPAB_HVDD +3.3V_HDMI_PLL_HVDD U20 +1.1V_PLL_DP +1.1V_DP_VDD AH29 +1.1V_DP_VDD HDMI_RSET AK31 HDMI_VPROBE AK32 HDMI_RSET HDMI_VPROBE +1.1V_PLLPE_SS C264 4.7U_6 LCD_BKL_CTL LCD_BKL_ON LCD_PANEL_PWR HDCP_ROM_SCLK AD25 HDCP_ROM_SDATA AC26 T47 T48 GPIO_6/FERR/SYS_SERR/IGPU_GPIO_6* GPIO_7/NFERR/SYS_PERR/IGPU_GPIO_7* AD24 AE25 AE27 HDMI_TXD0P_C AK29 HDMI_TXD0N_C AJ29 HDMI_TXD1P_C AM30 HDMI_TXD1N_C AL30 HDMI_TXD2P_C AK30 HDMI_TXD2N_C AJ30 T50 T116 T113 T109 T111 T114 110mA U11 T11 FLAT PANEL 10K_4 +3.3V_TV_DAC F21 TV_DAC_RED TV_DAC_GREEN TV_DAC_BLUE C23 C22 D23 L17 R386 *0_4 0_4 +3V 2007/11/28-Edison add, follow NV recommend. TXLCLKOUT+ <14> TXLCLKOUT- <14> IFPA_TXD0_P IFPA_TXD0_N IFPA_TXD1_P IFPA_TXD1_N IFPA_TXD2_P IFPA_TXD2_N IFPA_TXD3_P IFPA_TXD3_N AC30 AC29 AC27 AC28 AD30 AD29 AD31 AD32 TXLOUT0+ <14> TXLOUT0- <14> TXLOUT1+ <14> TXLOUT1- <14> TXLOUT2+ <14> TXLOUT2- <14> IFPB_TXC_P IFPB_TXC_N AJ31 AJ32 IFPB_TXD4_P IFPB_TXD4_N IFPB_TXD5_P IFPB_TXD5_N IFPB_TXD6_P IFPB_TXD6_N IFPB_TXD7_P IFPB_TXD7_N AE28 AE29 AF30 AF31 AG30 AG29 AH31 AH30 DDC_CLK3 DDC_DATA3 L22 K22 IFPAB_RSET IFPAB_VPROBE AB31 AB30 +3V C236 *4.7U_8 C231 4.7U_6 R385 133mA TI160808U300_6 AE30 AE31 L21 J22 150/F_4 150/F_4 150/F_4 C CRTDCLK <14> CRTDDAT <14> +3VDAC IFPA_TXC_P IFPA_TXC_N DDC_CLK2 DDC_DATA2 R134 R136 R135 HSYNC <14> VSYNC <14> G8 H8 E21 INT_CRT_R INT_CRT_G INT_CRT_B INT_CRT_R <14> INT_CRT_G <14> INT_CRT_B <14> C214 .1U_4 +3V +1.1V_DUAL BUF_25MHZ RGB_DAC_RSET RGB_DAC_VREF DACS MDIO +3V_DUAL D17 B21 C21 B22 +1.1V_PLL_DISP TV_XTALIN TV_XTALOUT D +3V_DUAL +3.3V_DUAL_RMGT INT_TXLOUT3+ INT_TXLOUT3- [LVDS] T110 T103 B LCD_EDIDCLK <14> LCD_EDIDDATA <14> UMA_HDMI_DDCCLK UMA_HDMI_DDCDATA R325 R323 10K_4 10K_4 +3V IFPAB_RST IFPAB_VPROBE C429 *.1U_4 C445 *.01U_4 R327 *1K/F_4 A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 LAN and Graphics Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 10 of 34 5 4 3 2 1 U15E FCBGA836-NVIDIA-MCP67 [SATA HDD] C316 C317 <18> SATA_TXP0 <18> SATA_TXN0 SATA_TXP0_C SATA_TXN0_C .01U_4 .01U_4 <18> SATA_RXN0 <18> SATA_RXP0 AE4 AE5 SATA_A0_TX_P SATA_A0_TX_N AG5 AG6 SATA_A0_RX_N SATA_A0_RX_P D SEC 5 OF 8 SATA [SATA ODD] C348 C347 <18> SATA_TXP1 <18> SATA_TXN1 SATA_TXP1_C SATA_TXN1_C .01U_4 .01U_4 AD1 AD2 AE2 AE3 <18> SATA_RXN1 <18> SATA_RXP1 USB SATA_A1_TX_P SATA_A1_TX_N SATA_A1_RX_N SATA_A1_RX_P AG4 AG3 SATA_B0_TX_P SATA_B0_TX_N AH3 AH2 SATA_B0_RX_N SATA_B0_RX_P +1.8VSUS SATA_TXP3 SATA_TXN3 T73 T17 C C202 .1U_4 C203 .1U_4 C201 .1U_4 C92 .1U_4 C91 .1U_4 C90 .1U_4 C93 .1U_4 C224 .1U_4 SATA_RXN3 SATA_RXP3 T75 T72 +1.8V-GND coupling capacitor for SATA Placement put near SATA trace that cross through +1.8V and GND AG7 AG8 AF2 AF3 AL1 AL2 AK3 AL3 SATA_B1_TX_P SATA_B1_TX_N SATA_B1_RX_N SATA_B1_RX_P SATA_C0_TX_P SATA_C0_TX_N SATA_C0_RX_N SATA_C0_RX_P AJ1 AJ2 SATA_C1_TX_P SATA_C1_TX_N AK1 AK2 SATA_C1_RX_N SATA_C1_RX_P USB0_P USB0_N U3 U2 USBP0+ <16> USBP0- <16> INT LEFT USB-1 USB1_P USB1_N U4 U5 USBP1+ <16> USBP1- <16> INT LEFT USB-2 USB2_P USB2_N U6 U7 USB3_P USB3_N V3 V2 USB4_P USB4_N W4 W3 USB5_P USB5_N W5 W6 USB6_P USB6_N W7 W8 USB7_P USB7_N Y2 Y3 USB8_P USB8_N AA3 AA2 USB9_P USB9_N AA5 AA4 USB10_P USB10_N AA7 AA6 D USBP5+ <19> USBP5- <19> Card Reader USBP3+ <14> USBP3- <14> CCD USBP4+ USBP4USBP2+ <17> USBP2- <17> USBP6+ <16> USBP6- <16> USBP7+ <24> USBP7- <24> USBP8+ <17> USBP8- <17> NEW CARD USB PULL-DOWN BLUETOOTH USBP0+ RN16 1 USBP03 2 15KX2_4 4 EXT USB(PJ2) USBP1+ RN2 USBP1- 1 3 2 15KX2_4 4 MINI CARD-1 USBP5+ RN1 USBP5- 3 1 4 15KX2_4 2 USBP3+ RN15 1 USBP33 2 15KX2_4 4 USBP4+ RN14 1 USBP43 2 15KX2_4 4 USBP2- RN3 USBP2+ 1 3 2 15KX2_4 4 USBP6+ RN5 USBP6- 1 3 2 15KX2_4 4 USBP7+ RN4 USBP7- 1 3 2 15KX2_4 4 USBP9+ USBP9USBP10+ <23> USBP10- <23> Fingerprint USB11_P USB11_N AB3 AB2 USBP11+ USBP11- USB12_P USB12_N AC3 AC4 USBP12+ USBP12- USB13_P USB13_N AD3 AD4 USBP13+ USBP13- USB14_P USB14_N AC5 AC6 USBP14+ USBP14- RSVD RSVD AC7 AC8 USBP8+ RN13 1 USBP83 2 15KX2_4 4 RSVD RSVD AA8 AA9 USBP9- RN6 USBP9+ 1 3 2 15KX2_4 4 RSVD RSVD AB8 AB9 USBP10- RN9 USBP10+ 1 3 2 15KX2_4 4 USBP11+RN12 1 USBP113 2 15KX2_4 4 USBP12+RN11 1 USBP123 2 15KX2_4 4 USBP13+RN7 USBP13- 1 3 2 15KX2_4 4 USBP14+RN8 USBP14- 1 3 2 15KX2_4 4 +3VSUS C RN10 D4 <23> SATA_LED# 80mA +1.1V_NB 10mA +1.1V_NB B 20mA +1.1V_NB R91 40mA 0_6 L50 C380 C131 L51 C381 C133 L12 C128 C129 +1.1V_NB MLG1608B10NJ_6 +1.1V_PLL_SP_VDD 10U-6.3V_8 2.2U_4 MLG1608B10NJ_6 +1.1V_PLL_SP_SS 4.7U_6 2.2U_4 TI160808U300_6 +1.1V_PLL_LEG 4.7U_6 2.2U_4 +1.2V_SP_D C77 10U-6.3V_8 C78 10U-6.3V_8 C76 4.7U_6 C97 .1U_4 C94 .1U_4 L53 +1.1V_SP_A PBY201209T_8 SATA_THRM C404 4.7U_6 C405 4.7U_6 C110 .1U_4 C109 .1U_4 SATA_LED#/GPIO_57 +1.1V_PLL_SP_VDD +1.1V_PLL_SP_SS T2 T3 T4 T5 T6 USBOC#0 USBOC#1 USBOC#2 USBOC#3 USBOC#4 USBOC#3 USBOC#0 USBOC#1 USBOC#2 L16 +1.1V_PLL_LEG AE9 +1.1V_SPD_A1 AE6 AE7 AE8 +1.1V_SPD_B1 +1.1V_SPD_B2 +1.1V_SPD_B3 C180 .1U_4 +3.3V_PLL_USB AB10 AB11 +1.1V_SPA_A1 +1.1V_SPA_A2 AC10 AD10 AE10 +1.1V_SPA_B1 +1.1V_SPA_B2 +1.1V_SPA_B3 B C217 4.7U_6 P19 Y8 Y9 +3.3V_USB_DUAL T1 TI160808U300_6 +3V_S5 C111 .1U_4 USB_RBIAS_GND 18mA +3V L10 +3.3V_USB_DUAL1 +3.3V_USB_DUAL2 7 10KX4_8P4R 5 3 1 10K_4 8 6 4 2 R288 TI160808U300_6 +3.3V_USB_PLL P13 C104 .1U_4 213mA +1.1V_NB W13 V13 USB_OC0#/GPIO_25 USB_OC1#/GPIO_26 USB_OC2#/GPIO_27 USB_OC3#/GPIO_28/MGPIO_1 USB_OC4#/GPIO_29/MGPIO_3 405mA C122 .1U_4 USB_RBIAS_GND R87 845/F_4 AJ4 SATA_TERMP C124 .1U_4 R97 2.49K/F_4 2007/11/29: Page11 the resistor R87 from 909ohm change to 845ohm(follow NV suggest) A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 SATA and USB Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Sunday, March 09, 2008 Sheet 1 11 of 34 5 4 3 2 1 HDA HDA_SDOUT R74 R77 R285 R292 R81 R86 R284 R291 HDA_SYNC U15F HDA_BITCLK FCBGA836-NVIDIA-MCP67 HDA_RESET# SEC 6 OF 8 D HDA <20> HDA_SDIN0 B2 HDA_SDATA_IN0/GPIO_22 <20> HDA_SDIN1 A2 HDA_SDATA_IN1/GPIO_23/MGPIO_0 D1 HDA_SDATA_IN2/GPIO_24/MGPIO_2 HDA_SDIN2 T10 R383 *10K_4 R384 *4.7K_4 EC_SCI# HDA_DOCK_EN#/GPIO_51 HDA_DOCK_RST#/GPIO46 D3 C3 MCP77_GPIO51 MCP77_GPIO46 HDA_SDATA_OUT/GPIO_45 HDA_BITCLK HDA_RESET# HDA_SYNC/GPIO_44 B1 D2 C2 C1 HDA_SDOUT HDA_BITCLK HDA_RESET# HDA_SYNC 22_4 22_4 22_4 22_4 22_4 22_4 22_4 22_4 HDA_SDOUT_ADO <20> HDA_SDOUT_MDC <20> HDA_SYNC_ADO <20> HDA_SYNC_MDC <20> HDA_BITCLK_ADO <20> HDA_BITCLK_MDC <20> HDA_RESET#_ADO <20> HDA_RESET#_MDC <20> MCP77 STRAPPING HDA_RESET# (LAN) 0 MII 1 RGMII (DEFAULT) HDA_SDOUT_R , LFRAM1# (BIOS) 00 LPC (DEFAULT) 01 PCI BIOS 10 SPI BIOS 11 RESERVED (SPI) T8 T93 EMI Solution HDA_SDOUT HDA_SYNC HDA_RESET# HDA_BITCLK R300 0_4 +3V C373 C395 C393 C392 HDA_SYNC_R (SIO CLOCK) 0 14.318MHz (DEFAULT) 1 24MHz 10P_4 10P_4 10P_4 10P_4 SPI_DO , SPI_CLK (SPI CLOCK) 00 31MHz 01 42MHz 10 25MHz 11 1MHz KBSMI# MCP77_GPIO1 P6 MXM_PRESENT# N11 MCP77_GPIO3 R11 MXM_RUNPWROK M9 PE_RST_MXM# M10 T11 T39 T37 T7 T29 M4 <18> SATA-ODD_PRESENT# <22> GATEA20 <22> RCIN# <22> EC_SCI# <22> KBSMI# R83 T76 <13> SM_INTRUDER# <16> MCP77_LID# T41 R297 GPIO_1/PWRDN_OK/SPI_CS1 GPIO_2/NMI/PS2_CLK0 GPIO_3/SMI#/PS2_DATA0 GPIO_4/SCI/PS2_CLK1 GPIO_5/INIT#/PS2_DATA1 SLP_S3# SLP_RMGT# SLP_S5# GPIO_12/SUS_STAT/ACCLMTR_EXT_TRIG# K7 K6 0_4 SIO_PME# M6 P4 RI# P8 L3 A20GATE/GPIO_55/FANCTL3 KBRDRSTIN#/GPIO_56/FANRPM3 SIO_PME#/GPIO_31/SPI_CS2 EXT_SMI#/GPIO_32 RI#/GPIO33 INTRUDER# P5 PM_BATLOW# N10 LID# LLB# <22> DNBSWON# 1U_4 33_4 T4 Delay 10ms after S5 powerOK MISC <22> RSMRST# <4,22> PWROK_EC <22,29> HWPG_1.8V <22,30> HWPG_1.2V <22,26> CPU_COREPG MCP_SPKR <20> SMB_CLK0 SMB_DATA0 SMB_CLK1/MSMB_CLK SMB_DATA1/MSMB_DATA SMB_ALERT#/GPIO_64 E3 G3 E2 F2 F3 PCLK_SMB <15,17> PDAT_SMB <15,17> MSMB_CLK <6> MSMB_DATA <6> THERM#/GPIO_59 K5 THERM_SIC/GPIO_48/MSMB_CLK THERM_SID/GPIO_49/MSMB_DATA M5 RTC_RST# THERM_ALERT#/GPIO_47/PWR_LED# MCP77_TDI T25 MCP77_TDO T2 MCP77_TMS T1 *10K_4 MCP77_TRST# 22K_4 MCP77_TCK R84 R109 FANRPM0/GPIO_60 FANCTL0/GPIO_61 FANCTL1/GPIO_62 Y3 25MHZ 33P_4 C72 18P_4 1 2 C74 R71 XTAL1 XTAL2 H4 H3 XTALIN XTALOUT CLK_32KX1 CLK_32KX2 H2 H1 XTALIN_RTC XTALOUT_RTC R273 R256 *8.2K_4 8.2K_4 +3V R113 R114 *8.2K_4 8.2K_4 +3V R95 R96 *10K_4 10K_4 +3V R78 R295 *10K_4 10K_4 +3V_S5 R299 R290 10K_4 *10K_4 MCP_SPI_DO +3V_S5 R298 R289 *10K_4 10K_4 MCP_SPI_CLK HDA_RESET# HDA_SDOUT LFRAME# <9,17,22> MCP_SPKR HDA_SYNC C THERM_ALERT# <4> AC14 AB14 CPU_SIC CPU_SID AD12 MCP77_GPIO47 F6 F5 F4 BOARDID0 BOARDID1 BOARDID2 N3 M2 HTVDD_EN K2 K3 M7 J2 MCP77_GPIO10 MCP_SPI_CLK EMAIL_LED# MCP_SPI_DO R286 1K_4 <4> <4> +1.8VSUS Acer Suggest Reserve HDCP EEPROM 2007/12/05 +3V_S5 HTVDD_EN <27,30> CPU_VRON <26> C536 *.1u/16V_4 *4.7K_4 T94 U21 T9 HDCP_WP PCLK_SMB PDAT_SMB R389 SUS_CLK/GPIO_34 BUF_SIO_CLK TEST_MODE_EN PKG_TEST P2 J3 SUS_CLK_R SIO_CLK T92 T6 *4.7K_4 8 7 6 5 VCC A0 WP A1 SCL NC SDA GND *AT24C64 1 2 3 4 B P11 TESTMODE_EN P10 Y2 R279 1K_4 2 18P_4 +3V T5 T23 T35 SMB_ALERT# 32.768KHz *10M_6 C63 10K_4 *10K_4 R388 SPI_CS0/GPIO_10 SPI_CLK/GPIO_11 SPI_DI/GPIO_8 SPI_DO/GPIO_9 33P_4 B R280 R293 HDCP EEPROM MCPVDD_EN/HTVDD_EN CPUVDD_EN JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST# JTAG_TCK 1 C73 U9 T8 T7 U8 T9 PWRGD_SB PWRGD MEM_VLD MCP_VLD/HT_VLD CPU_VLD VCORE1.2ID0_R CR_CPPE# CR_WAKE# K4 PWRBTN# RSTBTN# +3V_S5 SUSC# <22> SPKR R10 P9 L4 T10 M8 0_4 HT_VLD P7 M3 R75 SUSB# <22> *22K_4 H5 H6 H7 FI_RSVD0 FI_RSVD1 FI_RSVD2 FI_RSVD3 FI_RSVD4 FI_RSVD5 FI_RSVD6 FI_RSVD7 FI_RSVD8 <13> RTCRST# 0_4 T95 0_4 MCP_VID0/GPIO_13 MCP_VID1/GPIO_14 MCP_VID2/GPIO_15 V9 W9 AC9 W10 Y10 AA10 W11 Y11 AA11 PWRBTN# RSTBTN# *22K_4 SUSBR# R296 SLP_RMGT# SUSCR# R85 R79 C C165 R124 R3 P3 R4 D MCP_SPKR (Boot MODE) 0 USER TABLE (DEFAULT) 1 SAFE TABLE SMB/I2C PULL-UP NO PN PCLK_SMB PDAT_SMB SMB_ALERT# R89 R88 R294 2.7K_4 2.7K_4 2.7K_4 MSMB_CLK MSMB_DATA R82 R271 2.7K_4 2.7K_4 +3V_S5 CN12 1 3 5 7 9 +3V 2007/11/28-Edison: Removethese part R315, R317, R326, R324, C423, Q28, Q29 +3V_S5 2 4 6 8 10 *MCP JTAG HEADER M/B ID for 14"/17" R100 10K_4 A R93 10K_4 R92 10K_4 ID0 0 0 0 1 1 1 1 BOARDID0 BOARDID1 BOARDID2 R101 *10K_4 R94 *10K_4 R90 *10K_4 ID1 0 0 1 0 0 1 1 ID2 0 1 0 0 1 0 1 M/B 17" X 15" 15" 14" 14" 14" A D D U Dual Core CPU & MXM Dual Core CPU & UMA Single Core CPU & UMA Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 HDA/SMB/PMU/GPIO Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Sunday, March 09, 2008 Sheet 1 12 of 34 5 4 3 2 1 MCP77 POWER PLANE/GND & BYPASS U15H RTC CN22 D FCBGA836-NVIDIA-MCP67 RTC-BAT_CONN 20MIL 1 VCCRTC_2 R59 3RTC_CHG1 1 2 2 R56 RTC_CHG2 10K/F_6 10K/F_6 Q9 MMBT3904 20MIL R60 D4 CH500H D2 CH500H C45 .1U_4 +3VPCU C46 +5VPCU R52 4.7K/F_4 R48 RTC_CHG3 VCCRTC_1 15K/F_4 U15G FCBGA836-NVIDIA-MCP67 1K_4 +3V 1803mA SEC 7 OF 8 20MIL AJ9 AG9 F11 H11 VCCRTC C168 4.7U_6 C119 1U_4 C137 .1U_4 C123 .1U_4 C115 .1U_4 4.7U_6 C130 .1U_4 +3.3V1 +3.3V2 +3.3V3 +3.3V4 PWR/GND +3V_DUAL RTCRST# R47 <12> RTCRST# C44 R106 +3V_S5 1 1M_4 *1U_4 0_6 C85 C84 80mA 49.9K/F_4 2 R46 <12> SM_INTRUDER# C G1 *SHORT_ PAD +3V_DUAL VCCRTC 1U_4 .1U_4 VCCRTC C75 .1U_4 +NB_CORE 7052mA C438 47U-6.3V_1210 C431 22U-6.3V_8 AM16 AH1 U13 R6 R8 M1 N1 U1 J1 J4 J6 Y13 AE1 Y6 A5 A12 N8 E6 AC11 H15 T17 J21 D18 A20 N4 G6 AG22 P16 T19 AE24 AJ26 AJ24 U32 T20 AM24 AF29 AJ13 AA32 AG13 AE15 F13 AF6 AB4 AG15 E25 AM17 R15 A17 AG24 N20 N24 AM1 AM21 A21 V25 AJ3 L25 P17 H18 L24 AM5 U14 AC16 U10 N29 AM2 AM32 AG11 L15 C434 22U-6.3V_8 C437 4.7U_6 C435 4.7U_6 C196 .1U_4 C222 .1U_4 C176 .1U_4 C172 .1U_4 C154 .1U_4 C197 .1U_4 C257 .1U_4 C436 4.7U_6 C430 4.7U_6 C223 1U_4 C182 .1U_4 C433 .1U_4 C228 .1U_4 C184 .1U_4 C432 .1U_4 C169 .1U_4 C242 .1U_4 +1.1V_DUAL +1.1V_S5 R126 0_6 +1.1V_DUAL C157 .1U_4 +3.3V_DUAL1 +3.3V_DUAL2 N2 +3.3V_VBAT AA22 V19 W20 Y20 Y19 V17 AB21 AA23 Y30 U17 U18 Y31 W17 Y18 U16 AA24 V18 AA25 AA26 AB22 W18 AB23 AA27 AA28 AA29 W19 AA30 AA31 V20 B 107mA L6 L8 N16 N17 +1.0V1 +1.0V10 +1.0V11 +1.0V12 +1.0V13 +1.0V14 +1.0V15 +1.0V16 +1.0V17 +1.0V18 +1.0V19 +1.0V2 +1.0V20 +1.0V21 +1.0V22 +1.0V23 +1.0V24 +1.0V25 +1.0V26 +1.0V27 +1.0V28 +1.0V29 +1.0V3 +1.0V4 +1.0V5 +1.0V6 +1.0V7 +1.0V8 +1.0V9 +1.1V_DUAL1 +1.1V_DUAL2 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AD9 AH6 AE32 Y32 AD8 M32 AE18 AB25 AB27 U15 AE11 V27 R27 N27 G27 Y14 F15 V29 AC12 AB19 AM9 AB12 AM8 AF8 AH4 E27 AM31 F22 AF4 V11 L23 P15 L11 V8 H13 N6 AA1 AD13 K23 AM3 R18 H9 R17 A1 D9 AG26 G4 AB6 J25 R25 C171 .1U_4 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND D GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SEC 8 OF 8 GND T16 T15 J29 W14 AD6 AB24 AM13 R16 V6 A13 N32 AM25 F9 N9 AL31 G25 AB18 AH32 D13 N25 A25 R9 R14 AF27 AH8 A32 P14 E29 E32 V10 J23 N14 AB29 E4 AE13 L27 J27 A9 J32 AE20 AJ22 AG18 AG20 V14 F18 F20 D20 E1 V4 J8 F7 T18 J24 A31 Y1 T13 D22 Y4 P18 AJ18 AE22 R24 N19 T14 AD27 P22 AD11 C B A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MCP77 POWER/GND/RTC Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 13 of 34 5 4 3 LVDS 2 1 CN1 TXLCLKOUTTXLCLKOUT+ <10> TXLCLKOUT<10> TXLCLKOUT+ C16 <10> TXLOUT0<10> TXLOUT0+ SINGLE_CH VIN_LCD TXLOUT0TXLOUT0+ +3V CCD_PWR TXLOUT1TXLOUT1+ <10> TXLOUT1<10> TXLOUT1+ BL_ON BRIGHTNESS LCD_EDIDCLK LCD_EDIDDATA <16> BL_ON TXLOUT2TXLOUT2+ <10> TXLOUT2<10> TXLOUT2+ 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 .1U_4 R6 0_6 L1 +3V D R8 2.7K_4 R10 2.7K_4 2 3 <11> USBP3<11> USBP3+ USBP3-_R USBP3+_R 1 4 1 4 *RFCM1632100M3 R5 0_6 LCD_EDIDCLK <10> LCD_EDIDCLK 2 3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 LCD_VCC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 *0_4 0_4 L_BKLT_CTRL <10> EC_L_BKLT_CTRL <22> TXLCLKOUT+ TXLCLKOUTTXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1R20 VIN TXLOUT2+ TXLOUT2- VIN_LCD 0_8 D C21 LCD_EDIDCLK LCD_EDIDDATA CON30X2_0 LCD_EDIDDATA <10> LCD_EDIDDATA R11 R12 BRIGHTNESS C6 *1000P_4 C19 4.7U-25V_8 1000P_4 R9 0_8 C8 *1000P_4 EMI Solution CAMERA MODULE POWER LCD POWER +3V +3V CCD_PWR Close to LVDS CONN. U1 .1U_4 6 4 <10> INT_LVDS_DIGON R2 DISP_ON 0_4 3 IN OUT IN GND ON/OFF GND 1 LCDVCC_1 R21 +3V LCD_VCC 0_8 1 2 C2 .1U_4 5 C3 10U-6.3V_8 C23 C22 C24 .1U_4 .01U_4 10U-6.3V_8 3 2 C1 Q2 *AO3413 C14 C13 10U-6.3V_8 R7 *4.7K_4 1000P_4 BECAUSE UR'S SUGGESTION, ACTICE CHANGE FROM LOW TO HIGH. Confirm by Joms 3 AAT4280 R1 2 CCD_POWERON <22> 1 10K_4 Q1 *DTC144EU C C CRT CRTVDD5 1N5819HW 16 D1 +5V CN13 CRT_CONN <10> INT_CRT_G <10> INT_CRT_B <10> HSYNC <10> VSYNC <10> CRTDCLK <10> CRTDDAT INT_CRT_R L6 BK1608LL680_6 CRT_R1 INT_CRT_G INT_CRT_G L5 BK1608LL680_6 CRT_G1 INT_CRT_B INT_CRT_B L4 BK1608LL680_6 CRT_B1 6 1 7 2 8 3 9 4 10 5 HSYNC R19 R18 R17 C20 C17 C12 C11 C15 C18 10P_4 10P_4 10P_4 10P_4 10P_4 10P_4 VSYNC 150/F_4 150/F_4 150/F_4 11 12 DDCDAT_1 13 CRTHSYNC 14 CRTVSYNC CRTVDD5 .1U_4 C7 15 DDCCLK_1 CRTVSYNC *10P_4 C5 CRTHSYNC *10P_4 C4 DDCCLK_1 10P_4 C9 DDCDAT_1 10P_4 C10 CRTDCLK 17 <10> INT_CRT_R INT_CRT_R CRTDDAT R4 R3 0_4 U2 +5V C26 CRTVDD5 1 .22U_6 7 8 .1U_4 C25 2 +3V B *0_4 VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1 16 14 VSYNC1 HSYNC1 15 13 VSYNC HSYNC 10 11 CRTDCLK CRTDDAT 9 12 DDCCLK_1 DDCDAT_1 L2 L3 BLM18BA220SN1_6 BLM18BA220SN1_6 CRT_SENSE# <22> CRTVSYNC CRTHSYNC CRTVDD5 B C27 .1U_4 INT_CRT_R INT_CRT_G INT_CRT_B 3 4 5 6 VIDEO_1 VIDEO_2 VIDEO_3 GND CM2009 DDC_IN1 DDC_IN2 DDC_OUT1 DDC_OUT2 R15 R14 2.7K_4 2.7K_4 R16 2.7K_4 +3V R13 2.7K_4 CM2009: AL002009W01 IP4772: AL004772000 TV Out (SVHS) MiniDIN 7-pin Delete TVOUT MiniDIN A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A LVDS/CRT/PC-Camera Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 14 of 34 5 4 3 Giga LAN BCM5787M/5764M 5787@0_6 4.7U_6 .1U_4 .1U_4 .1U_4 3V_LAN C376 +1.2V_LAN C369 C56 4.7U_6 .1U_4 L45 0603-200mA .1U_4 .1UV_4 AVDDL C362 4.7U_6 C360 .1U_4 GPHY_PLLVDD C357 4.7U_6 C358 .1U_4 20mil R244 L47 0603-200mA 39 51 20mil L48 0603-200mA 35 PCIE_PLLVDD C367 4.7U_6 30 R45 5787@0_6 C368 20mil R44 .1U_4 27 PCIE_SDS_VDD 33 24 TXDP_E TXDN_E 26 25 31 32 12 10 29 28 PCIE_WAKE_R# LAN_PERST# <8> CLK_PCIE-LAN <8> CLK_PCIE-LAN# R43 R40 R272 3V_LAN +3V AUX_PRES VMA_PRES LOW_PWR 1K/F_4 1K/F_4 4.7K_4 54 53 3 PCLK_SMB_LAN PDAT_SMB_LAN C55 1 68 6 15 19 56 61 AVDD BCM5787M/5764M AVDD 10mm X 10mm AVDDL 68-Pin QFN AVDD GPHY_PLLVDD AVDDL AVDDL TRD3TRD3+ PCIE_PLLVDD LAN_XTAL2 LAN_XTAL1 R61 R241 2 25MHZ TRD1TRD1+ PCIE_VDD PCIE_VDD TRD0TRD0+ PCIE_GND LINKLED# SPD100LED# SPD1000LED# TRAFFICLED# .1U_4 .1U_4 .1U_4 C C59 AVDDL 4.7U_6 C48 C50 C52 PCIE-LAN_RXP PCIE-LAN_RXN PCIE-LAN_TXP PCIE-LAN_TXN Y1 BIASVDD XTALVDD TRD2TRD2+ 5764@0_6 BCM5764 : 0.1uF Capacitor BCM5787 : 0 ohm Resistor 27P_4 VDDC VDDC VDDC VDDC VDDC VDDC 220_4 1.24K/F_4 58 57 XTALO RDAC PCIE_TXDP PCIE_TXDN PCIE_RXDP PCIE_RXDN WAKE# PERST# REFCLK+ REFCLK- GPIO2 UART_MODE GPIO1_SERIALDI GPIO0_SERIALDO SCLK SI SO CS# VAUXPRSNT VMAINPRSNT LOW_PWR <8> LAN_CLKREQ# 0_4 XTALO XTALI 37 RDAC <9> PCIRST# <8> PCIE_RST# R235 5764@0_6 52 45 AVDD 5787@0_6 L7 0603-200mA L44 0603-200mA D .1U_4 C356 .1U_4 TX1P_5764 44 46 TX1P_5764 TX2P_5764 49 50 TX3N TX3P 48 47 LAN_TX2N LAN_TX2P 42 43 LAN_TX1N LAN_TX1P 41 40 TX0N TX0P TX2P_5764 LAN_TX1N LAN_TX1P LAN_TX2N LAN_TX2P AVDD 2 1 67 66 LINKLED# R387 R28 R42 R29 R37 R38 R27 R32 R33 R41 R30 R35 R34 R236 R237 5764@0_4 5787@0_6 5764@0_4 5787@0_6 5764@0_6 5787@0_4 5764@0_4 5787@0_4 5764@0_6 5787@0_4 5764@0_4 5787@0_4 5764@0_6 5787@0_6 TX1P AVDDL TX2P AVDDL AVDDH TX1N TX1N TX1P AVDDH TX2N TX2N TX2P AVDDL AVDDH Delete LAN within DOCK Selector LAN_LINKLED# 0_4 LAN_ACTLED# 8 9 7 4 65 63 64 62 17 NC(CLK_REQ#) 0603-200mA .1U_4 AVDDH R240 5787@0_6 C41 38 L43 BCM_WP BCM_SCL R249 SI R248 BCM_SDA CS# R247 R57 ENERGY_DET_R R53 R275 5787@0_6 R276 5764@0_6 R277 5764@0_6 C *4.7K_4 *4.7K_4 4.7K_4 *4.7K_4 0_4 3V_LAN ENERGY_DET +2.5V_LAN VDDCIO_12 GND R314 15K_4 BCM5787MKMLG/5764M REG_GND 16 *0_4 R313 0_4 LAN_PERST# 3 TD1- MX1- 22 LAN_MX0- LAN_VDAC 4 TCT2 MCT2 21 LAN_MCT1 TX1P 5 TD2+ MX2+ TX1N 6 TX2P 8 TX2N 9 LAN POWER 4 2 22U-6.3V_8 C403 .1U_4 Q7 *2N7002E 3V_LAN C352 .1U_4 R258 R259 R260 4.7K_4 *4.7K_4 *4.7K_4 20mil +1.2V_LAN 0_4 *5764@BK1608HS121_6_0.3A BCM_WP BCM_SCL BCM_SDA *4.7K_4 MX3+ TD3- MX3- TCT4 MCT4 TD4+ MX4+ TD4- MX4- C350 .1U_4 3V_LAN C384 [email protected]_4 C383 [email protected]_4 Q25 5787@MMJT9435 4 3 2 40mil LAN REGCTL25 C408 [email protected]_6 40mil R304 1.5_1206 LAN_MX2+ 16 LAN_MX2- 15 LAN_MCT3 14 LAN_MX3+ 13 LAN_MX3- R231 75_8 R232 75_8 R233 75_8 R234 75_8 B LANMCT_G VCC A0 WP A1 SCL NC SDA GND RINGL 15 TIPL 14 LAN_LINKLED# 9 AT24C64 R26 220_8 LAN_VCC3 R22 220_8 LAN_VCC4 10 11 SO SI CS# SCLK 1 1 0 C29 470P_4 C33 470P_4 +2.5V_LAN C354 C382 [email protected]_6 [email protected]_6 C386 C385 [email protected]_6 [email protected]_4 24c64 C28 1000P-3KV_4250 RJ45-11 1 EMI solution C406 [email protected]_4 3V_LAN 40mil Q26 MMJT9435 4 2 12 LAN_MX0+ 1 LAN_MX0- 2 LAN_MX1+ 3 LAN_MX2+ 4 LAN_MX2- 5 LAN_MX1- 6 LAN_MX3+ 7 LAN_MX3- 8 RING TIP EMI Solution LED_GREEN LED_P_A1 LAN_LINKLED# LED_ORANGE LAN_ACTLED# LED_YELLOW LED_P_A2 C30 470P_4 C34 470P_4 TX+/0+ TX-/0RX+/1+ NC1/2+ GND NC2/2- GND 16 LAN_REG1_2V 3 17 RX-/1NC/3+ A NC4/3RJ-45&RJ-11 +1.2V_LAN CN16 R301 *1_1206 25mil R282 LAN REGCTL12 5787@0_4 C398 4.7U_6 C400 .1U_4 1 3V_LAN LAN_MCT2 17 CN15 3V_LAN 40mil A +2.5V_LAN LAN_MX1- 18 1 25mil LAN_MX1+ C353 .1U_4 LAN_ACTLED# 13 0_4 R283 [email protected]_4 TD3+ EEPROM Strapping PCLK_SMB_LAN LAN_CLKREQ1# C351 .1U_4 1 2 3 4 3V_LAN Q6 *2N7002E 1 12 MCT3 C374 .1U_4 8 7 6 5 VDDCIO_12 L52 11 TX3N TCT3 U12 BKP1608HS181T_6_1.5A R257 PDAT_SMB_LAN 1 10 TX3P MX2- +3V_S5 L54 C407 LAN_VDAC TD2- 20 19 LFE9256-R 3 1 2 LAN_MX0+ TX0N 5764@39K_6 *4.7KX2_4 2 LAN_MCT0 23 R68 RP1 FOR ASF R54 24 MX1+ 7 EEPROM 3 MCT1 TD1+ LAN_VDAC PCIE_WAKE_R# 3V_LAN <12,17> PCLK_SMB TCT1 2 5787@0_6 3V_LAN R51 1 TX0P R69 0_4 R312 3 LAN_VDAC LAN REGCTL12 14 B <12,17> PDAT_SMB Delta- LFE9261-R:GIGABIT C-test U3 L42 5787@0603-200mA LAN REGCTL25 18 2/20/08' Change PN form DB0Z05LAN01 to DB0Z05LAN02 on Transformer +2.5V_LAN <22> 69 2 Q27 *DTC144EUA 1 R308 R31 +3V_S5 3 <8,17,22> PCIE_WAKE# XTALVDD C42 .1U_4 VDDP REGCTL12 +3V_S5 23 SMB_CLK SMB_DATA 22 21 11 BIASVDD C355 59 REGCTL25 R274 36 NC/(ENERGY_DET) 27P_4 LAN_CLKREQ1# [email protected]_4 20mil 5764@0_6 C43 <8> <8> <8> <8> 5 55 13 20 34 60 C378 20mil L46 0603-200mA +1.2V_LAN C364 U11 5764@0_6 5787@0_6 VDDP R278 R242 VDDIO VDDIO VDDIO VDDIO VDDIO D VDDC/VDDC_IO .1U_4 +2.5V_LAN C375 [email protected]_4 C47 1 R253 3V_LAN C366 C58 C377 C379 VDDCIO_12 2 +2.5V_LAN C391 C390 C365 C359 C49 C363 10U-6.3V_6 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 C36 C53 *470P-3KV_1808 *470P-3KV_1808 TIPL RINGL 1 2 FI_S2P_HF_JAE Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A GigaLAN BCM5787/RJ45 & RJ11 Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Friday, March 07, 2008 Sheet 1 15 of 34 1 2 3 4 5 6 7 8 +5VPCU U13 2 3 4 1 9 C402 <22,24> USBON# .1U_4 C532 IN1 IN2 EN# GND GND-C LID SWITCH USBPWR1 8 7 6 OUT3 OUT2 OUT1 C397 R305 5 OC# *6.34K/F_4 +3V C62 1000P_4 100U-6.3V_3528 TPS2061DGNR R220 100K_4 *10u/10V_8 R221 CN18 1 4 1 4 1 2 3 4 USBP0-_R USBP0+_R 1 2 3 1 2 3 <11> USBP0<11> USBP0+ D30 D31 5 6 7 8 5 6 7 8 LEFT USB Delete CIR Function 2007/09/21 Anda GPIO list have internal PU 2 1 C412 100U-6.3V_3528 WCM-2012-900T 1 4 1 2 3 4 USBP1-_R USBP1+_R 1 1 4 1 2 3 D32 D17 1 BL_ON <14> 2 *1SS355 MCP77_LID# <12> 5 6 7 8 LEFT USB 0_4 R209 0_4 330_4 +3VPCU 1 R207 R230 LID591# <22> LID# C349 1U_4 2 C330 .1U_4 MR1 ME268-002 2/20/08' Implement ESD diode on C-test 2 AZ2015-01H_ESD 2 B 5 6 7 8 CN19 SYUIN_USB D33 AZ2015-01H_ESD 1 2 3 4 <22> Q18 1SS355 2 L14 2 3 <10> DTC144EU D18 1 C409 1000P_4 EC_FPBACK# R214 *10K_4 R208 *10K_4 USBPWR1 <11> USBP1<11> USBP1+ A INT_LVDS_BLON +3VSUS +3VPCU 2 2/20/08' Implement ESD diode on C-test 4.7K_4 1SS355 1 SYUIN_USB AZ2015-01H_ESD 2 AZ2015-01H_ESD 1 2 3 4 D19 2 3 L11 WCM-2012-900T 3 A B BLUETOOTH MODULE CONNECTOR CPU H16 h-tc213bc244d146p2 H17 h-tc213bc244d146p2 MDC H12 h-tc213bc244d146p2 H13 h-tc213bc244d146p2 H23 h-tc118bc197d83p2 BLUETOOTH H26 h-tc118bc197d83p2 H25 h-tc165bc118d79p2 H24 h-tc165bc118d79p2 1 1 1 1 1 1 1 1 Q30 AO3413 1 Power Board H9 h-c197d87p2 H10 h-c197d87p2 FAN H15 H-C276D146P2 BT_POWER 3 2 +3VSUS C467 + 1000P_4 10U-6.3V_8 C466 <22> BT_POWERON# H6 h-c236d146p2 H5 h-c236d146p2 PAD2 PAD3 PAD4 PAD5 *EMIPAD *EMIPAD *EMIPAD *EMIPAD PAD12 PAD7 PAD6 *EMIPAD *EMIPAD *EMIPAD *EMIPAD 2 3 4 H18 h-c276d118p2-8 5 6 7 1 1 2 3 4 5 BT_LED H34 h-c65d65n C323 4.7P_4 2007/12/4 add C325 4.7P_4 EMI solution PAD13 PAD14 PAD15 PAD16 PAD17 PAD18 PAD19 *ME-PAD *ME-PAD *ME-PAD *ME-PAD *ME-PAD *ME-PAD *ME-PAD 2 3 4 H19 h-c276d118p2-8 5 6 7 2 3 4 1 1 1 1 1 1 1 H21 H-C315D118P2-8 5 6 7 D H27 h-c276d118p2-8 5 6 7 8 1 9 2 3 4 <11> USBP6+ <11> USBP6<23> BT_LED 1 PAD1 1 H28 H-C315D118P2-8 5 6 7 1 2 3 4 8 1 9 H1 H-C315D118P2-8 5 6 7 8 1 9 2 3 4 8 1 9 H30 h-c315d118p2-8 5 6 7 8 1 9 2 3 4 8 1 9 D CN10 BT_POWER BT_CONN 1 *EMIPAD 8 1 1 *EMIPAD 1 *EMIPAD 1 *EMIPAD 1 PAD9 1 H32 H-C315D118P2-8 5 6 7 PAD11 1 2 3 4 PAD8 H33 h-tp236bpsd118p2-7 2 5 3 6 4 7 8 1 9 8 1 9 H2 H-C315D118P2-8 5 6 7 8 1 9 1 8 1 9 2 3 4 PAD10 2007/12/4 add 8 1 9 H14 h-c236d118p2 H11 H-sc315d118p2-8 2 5 3 6 4 7 8 1 9 H8 h-tc315be433x315d118p2-8 2 5 3 6 4 7 H29 H-C315D118P2-8 2 5 3 6 4 7 8 1 9 H20 h-c283d118p2-8 2 5 3 6 4 7 8 1 9 H22 h-c276d118p2-8 2 5 3 6 4 7 8 1 9 H7 h-c315d110p2-8 2 5 3 6 4 7 1 1 1 1 1 1 C 1 C PAD20 PAD21 PAD22 PAD23 PAD25 PAD26 *ME-PAD *ME-PAD *ME-PAD *ME-PAD *ME-PAD *ME-PAD 1 1 1 1 1 1 Quanta Computer Inc. 10/8 PROJECT : Z05 Size Document Number Rev 1A USB/BT/LID/HOLE Date: 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Sunday, March 09, 2008 7 Sheet 16 8 of 34 1 2 3 4 5 6 7 8 MINI-Card MINI-Card Port-1 +1.5V +3V L9 WCS_CLKR BK1608LM252-T_6 A C51 .1U_4 C40 .1U_4 A L8 3V_MINI1 BK1608LM252-T_6 R238 R239 <9,22> PLTRST# <9> PCI_CLK_DEBUG1 *0_4 *0_4 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 WCS_DATR WCS_CLKR <8> PCIE-MINI1_TXP <8> PCIE-MINI1_TXN <8> PCIE-MINI1_RXP <8> PCIE-MINI1_RXN 0_4 MINI1_REQ_CLK R64 <8> MINI1_CLKREQ# 3 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved 15 13 11 9 7 5 3 1 <8> CLK_PCIE_MINI1 <8> CLK_PCIE_MINI1# <8,15,22> PCIE_WAKE# +1.5V CN17 If M.P must NC all debug R 1 Q12 C39 .1U_4 *100U-6.3V_3528 C38 .1U_4 C371 *.1U_4 C372 .1U_4 C370 4.7U_8 T71 RF_LED# RF_LED# <23> R243 *0_4 Delete MINI-Card Port-2 USBP8+ <11> USBP8- <11> 3VSUS_MINI1 16 14 12 10 8 6 4 2 Reserved Reserved Reserved Reserved Reserved +1.5V GND +3.3V 3VSUS_MINI1 C60 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 +3.3V GND +1.5V LED_WPAN# LED_WLAN# LED_WWAN# GND USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# Reserved GND GND REFCLK+ REFCLKGND CLKREQ# Reserved Reserved WAKE# 3V_MINI1 C361 *10P_4 PDAT_SMB <12,15> PCLK_SMB <12,15> R246 *0_6 +3V R245 0_6 +3VSUS D3 2 1 BAS316 RP29 2 4 RP30 2 4 R281 1 0X2_4 3 1 0X2_4 3 0_4 PCIE_RST1# <8,19> RF_EN <22> LFRAME# <9,12,22> LAD3 <9,22> LAD2 <9,22> LAD1 <9,22> LAD0 <9,22> MINIPCI_E_CONN_WL *DTC144EU B 2 B +3VSUS New card NEW CARD'S POWER SWITCH 0_4 CPPE# R357 <22> CPPE#_EC U16 TPS2231PWG4 CN11 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 <8> PCIE-NEW_TXP <8> PCIE-NEW_TXN <8> PCIE-NEW_RXP <8> PCIE-NEW_RXN C <8> CLK_PCIE_NEW <8> CLK_PCIE_NEW# <8> CPPE# <8> NEW_CLKREQ# 2 +3V_S5 +NEW_3V PERST# +NEW_3VAUX Q17 *DTC144EU PCIE_WAKE# 3 1 +NEW_1.5V R211 NEW_SMDATA NEW_SMCLK 0_4 CPUSB# <11> USBP2+ <11> USBP2- GND1 GND29 PETp0 GND30 PETn0 GND2 PERp0 PERn0 GND3 REFCLK+ REFCLKCPPE# CLKREQ# +3.3V1 +3.3V2 PERST# +3.3VAUX WAKE# +1.5V1 +1.5V2 SMB_DATA SMB_CLK RESERVED1 RESERVED2 CPUSB# USB_D+ USB_DGND4 29 30 +3V 4 5 +3V_S5 18 +1.5V 16 15 PCIE_RST1# 1 2 19 9 10 6 7 +NEW_3V 17 +NEW_3VAUX 1.5VOUT 1.5VOUT 14 13 +NEW_1.5V STBY# CPPE# CPUSB# 3 12 11 3.3VIN 3.3VIN 3.3VOUT 3.3VOUT AUXIN AUXOUT 1.5VIN 1.5VIN SYSRST# SHDN# RCLKEN NC GND PERST# OC# C CPPE# CPUSB# PERST# 8 20 2/20/08' Del R365 and C493 for reset issue on C-test CPPE# : ( Internal Pull Up , active low when card support PCIE ) CPUSB# : ( Internal Pull Up , active low when card support USB ) SHDN# : ( Internal Pull Up ) +NEW_3V 4 2 EXPCARD-FOXCONN RP33 Q33 4.7KX2_4 +1.5V 2N7002E 3 1 +3V 2 +3V_S5 PDAT_SMB 3 C479 C498 C499 C473 C475 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 1 NEW_SMDATA +NEW_3V Q32 +NEW_3VAUX +NEW_3V 2 D +NEW_1.5V PCLK_SMB C474 C505 .1U_4 4.7U_8 C489 C506 .1U_4 .1U_4 C476 4.7U_8 3 D 2N7002E 1 NEW_SMCLK C471 .1U_4 Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A MINI PCI-E card & NEW CARD Date: 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 7 Sunday, March 09, 2008 Sheet 17 8 of 34 1 2 3 4 TP SWITCH SW2 3 1 LEFT# SATA HDD GND23 GND1 RXP RXN GND2 TXN TXP GND3 3.3V 3.3V 3.3V GND GND GND 5V 5V 5V GND RSVD GND 12V 12V 12V GND24 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 SW3 3 1 RIGHT# 23 1 2 3 4 5 6 7 2 4 SW1 3 1 <22,23> MX0 MISAKI_SWITCH_4.3 CN25 A E-KEY C328 C329 .01U_4 .01U_4 MY0 <22,23> A MX0 MY0:E-Key 2 4 MISAKI_SWITCH_4.3 SATA_TXP0 <11> SATA_TXN0 <11> SATA_RXN0_C SATA_RXP0_C 2 4 MISAKI_SWITCH_4.3 SATA_RXN0 <11> SATA_RXP0 <11> HDDA5V TP CONN +5V +5V HDDA5V C483 C484 C343 C344 R362 C482 L29 BKP1608HS181T_6_1.5A 0_8 R173 4.7K_4 24 .01U_4 .01U_4 .1U_4 .1U_4 4.7U_8 100U-6.3V_3528 25mil TP_VCC +5V C485 R175 4.7K_4 C286 .1U_4 CN5 1 2 3 4 5 6 7 8 9 10 11 12 SATA-HDD L27 L28 <22> TPDATA <22> TPCLK B LZA10-2ACB104MT_6_0.1A LZA10-2ACB104MT_6_0.1A TPDATA_R TPCLK_R RIGHT# TPDATA C283 12P_4 TPCLK C284 12P_4 LEFT# 1 2 3 4 5 6 7 8 9 10 11 12 B TOUCH_PAD_TP_12P EMI solution near connector ODD (SATA) CN26 C GND GND RXP RXN GND TXN TXP GND DP +5V +5V MD GND GND GND C 14 1 2 3 4 5 6 7 SATA_TXP1 <11> SATA_TXN1 <11> SATA_RXN1_C SATA_RXP1_C C346 C345 .01U_4 .01U_4 8 9 10 SATA_RXN1 <11> SATA_RXP1 <11> SATA-ODD_PRESENT# <12> R216 4.7K_4 +5V_ODD 11 12 13 15 SATA-ODD +5V_ODD 100mil L40 0_8 C338 C339 C334 C335 1000P_4 .1U_4 .1U_4 .1U_4 100U-6.3V_3528 +5V C333 D D Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A SATA-HDD & SATA-ODD&TP Date: 1 2 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 3 Monday, February 25, 2008 Sheet 4 18 of 34 A B C D E 7 IN 1 CARD READER +3V_CARD R413 +3VSUS 0_8 VCC_XD VCC_XD CN27 C537 *10U-6.3V_6 C538 C539 C540 C541 .1U_4 *.1U_4 .1U_4 .1U_4 4 C543 15P_4 R405 C542 15P_4 *10M_6 Y5 2 XD_D6/MS_D0/SD_D0 SD_D1 XD_RE#/SD_D2 XD_WE#/SD_D3 SD_CLK SD_CMD SD_CD# SD_WP# 23 25 29 10 11 24 12 36 35 (4)SD-VCC (7)SD-DAT0 (8)SD-DAT1 (9)SD-DAT2 (1)SD-DAT3 (5)SD-CLK (2)SD-CMD SD-CD SD-WP XD_D6/MS_D0/SD_D0 XD_D3/MS_D1 XD_D2/MS_D2 XD_D7/MS_D3 MS_SCLK MS_CD# XD_D5/MS_BS 14 19 20 18 16 15 17 21 (9)MS-VCC (4)MS-DATA0 (3)MS-DATA1 (5)MS-DATA2 (7)MS-DATA3 (8)MS-SCLK (6)MS-INS (2)MS-BS 13 22 (3)SD/(1)MS/(1)XD-GND (6)SD/(10)MS/(9)XD-GND 1 (18)XD-VCC 33 (19)XD-CD (2)XD-R/B (3)XD-RE (4)XD-CE (5)XD-CLE (6)XD-ALE (7)XD-WE (8)XD-WP 34 1 2 3 4 5 6 7 XD_CD# XD_R/B# XD_RE#/SD_D2 XD_CE# XD_CLE XD_ALE XD_WE#/SD_D3 XD_WP# (10)XD-D0 (11)XD-D1 (12)XD-D2 (13)XD-D3 (14)XD-D4 (15)XD-D5 (16)XD-D6 (17)XD-D7 8 9 26 27 28 30 31 32 XD_D0 XD_D1 XD_D2/MS_D2 XD_D3/MS_D1 XD_D4 XD_D5/MS_BS XD_D6/MS_D0/SD_D0 XD_D7/MS_D3 SDIO-GND SDIO-GND1 37 38 4 EMI Solution 1 6.81K/F_4 XD_RE#/SD_D2 XD_WE#/SD_D3 XD_R/B# XD_WP# 39 38 37 XD_RDY XD_ALE 40 .1U_4 R407 AV_PLL 2 RREF SD_DAT4/XD_WP#/MS_D7 1U_4 VREG SD_DAT3/XD_WE# XD_CE# 41 XD_ALE XD_CLE 42 XD_CE# CARD_RST# 43 C546 SD_DAT2/XD_RE# C545 XD_CLE MODE_SEL 44 46 CLK_12MX0 1U_4 3 MODE_SEL C547 AG_PLL CLK_12MX1 47 U22 0_4 CARD_RST# XTLI R417 XTLO R406 100K/F_4 48 +3V_CARD RST# 45 12MHz MS_SCLK SD_CLK 36 SD_CMD SD_DAT5/XD_D0/MS_D6 35 XD_D0 XD_D1 SD_CMD NC SD_CLK/XD_D1/MS_CLK 34 4 DM D3V3 33 <11> USBP5+ 5 DP DGND 32 6 AGND 7 NC +3V_CARD 8 3V3_IN VCC_XD 9 CARD_3V3 VREG C549 C550 VREG .1U_4 .1U_4 +3V_CARD 11 C551 10 12 RTS5158E-GR D3V3 DGND VCC_XD CN29 3 +3V_CARD C544 *22P_4 VCC_XD <11> USBP5- +3V_CARD *CARD_READER_TTN C554 *22P_4 XD_D6/MS_D0/SD_D0 SD_D1 XD_RE#/SD_D2 XD_WE#/SD_D3 SD_CLK SD_CMD SD_CD# SD_WP# R415 R416 0_4 0_4 MS_SCLK SD_CLK C548 +3V_CARD .1U_4 XD_D7/MS_D3 XD_D6/MS_D0/SD_D0 XD_D3/MS_D1 XD_D2/MS_D2 XD_D7/MS_D3 MS_SCLK MS_CD# XD_D5/MS_BS SD_DAT6/XD_D7/MS_D3 31 NC 30 MS_INS# 29 MS_CD# SD_DAT7/XD_D2/MS_D2 28 XD_D2/MS_D2 SD_DAT0/XD_D6/MS_D0 27 XD_D6/MS_D0/SD_D0 XD_D3/MS_D1 26 XD_D3/MS_D1 XD_D5/MS_BS 25 XD_D5/MS_BS 21 31 34 9 11 25 15 39 41 SD-VCC SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-CLK SD-CMD SD-C/D SD-WP 19 29 40 SD-VSS1 SD-VSS2 SD-GND 12 22 24 20 16 14 18 26 MS-VCC MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3 MS-SCLK MS-INS MS-BS 10 28 42 43 MS-VSS1 MS-VSS2 GND GND 3 XD-VCC 38 XD-CD XD-R/B XD-RE XD-CE XD-CLE XD-ALE XD-WE XD-WP 2 3 4 5 6 7 8 13 XD_CD# XD_R/B# XD_RE#/SD_D2 XD_CE# XD_CLE XD_ALE XD_WE#/SD_D3 XD_WP# XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7 23 27 30 32 33 35 36 37 XD_D0 XD_D1 XD_D2/MS_D2 XD_D3/MS_D1 XD_D4 XD_D5/MS_BS XD_D6/MS_D0/SD_D0 XD_D7/MS_D3 XG-GND1 XD-GND2 1 17 PROCONN-MXP038-A0-4010-NB4 24 MS_D5 2 MS_D5 XD_D4 23 XD_D4 MS_D4 22 MS_D4 SD_CD# 21 SD_CD# SD_WP 20 XD_CD# 19 EEDI 18 EECS EESK 17 16 EEDO GPIO0 *0_4 SD_WP# R409 XD_CD# +3V_CARD 15 13 2 14 XTAL_CTR .1U_4 XD_D3/MS_D1 R410 *0_4 XD_D4 R411 0_4 SD_D1 CARDREADER POWER MODE_SEL T88 T89 T90 T91 T87 VCC_XD 30mil R412 *10K_4 C553 *47p/50V_6 C491 C497 C495 C496 4.7U_6 .01U_4 .01U_4 .01U_4 R412/C553 = 10K/47pF => R410 Reside R412/C553 = NC / NC => R411 Reside 1 1 Quanta Computer Inc. PROJECT : Z05 Size Document Number Date: Monday, March 10, 2008 Rev 1A RTS5158E -Card Reader A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Sheet E 19 of 34 5 4 3 2 1 CODEC(ALC268) Power CODEC(ALC268/ALC888S-VC) INT MIC array +5V +5V_ADO CN2 L38 ALC268 TI201209G121_8_3A C318 .1U_4 C312 .1U_4 C313 .1U_4 1 2 C315 10U-6.3V_8 R342 1 2 MIC2_INTL1 MIC2-VREFO 2.2K_4 C32 INT_MIC *22P_4 2/20/08' Empty on C-test ALC888 MIC1-VREFO-R R341 MIC1_R1 2.2K_4 ADOGND ADOGND R340 MIC1_L1 2.2K_4 MUTE_ALC888 FRONT-L SPK OUT FRONT-R 10U-6.3V_6 VEN 5 VIN C300 .1U_4 C306 .1U_4 C309 10U-6.3V_8 ADOGND +5V_ADO 0_6 +1.5V R338 *0_6 25 27 26 AVDD1 AVSS1 29 30 28 VREF MIC1-VREFO-L LINE1-VREFO 31 GPIO1 MIC2-VREFO 33 34 32 MIC1-VREFO-R NC Sense B 36 22 C465 1U-16V_6 21 MIC1-L C464 1U-16V_6 LINE1-R_1 <21> +3V_AVDD LINE1-L_1 <21> MIC1_R1 <21> EMI suggest 12/4 MIC1_L1 <21> C533 17 MIC2_INT_R C305 1U-16V_6 16 MIC2_INT_L C304 1U-16V_6 MIC2_INTL1 ADOGND C534 ADOGND C462 10U-6.3V_8 .1U_4 0_4 R195 0_4 C287 .1U_4 R346 *10K_4 C426 .1U_4 CPGND_3 C518 .1U_4 *.1U_4 C461 1000P_4 C227 1000P_4 C486 1000P_4 CPGND_2 C535 PCBEEP SENSEA <21> ADOGND R345 10K_4 R344 *10K_4 R343 *10K_4 R349 *10K_4 R348 *10K_4 AGC_Lv1 AGC_Lv2 AGC_Attack AGC_ON/OFF AGC_Recovery1 AGC_Recovery2 R355 10K_4 R354 *10K_4 R353 10K_4 R352 10K_4 R351 10K_4 R356 10K_4 *.1U_4 CPGND_1 ADOGND AGC-attack-time selection PCBEEP C302 R335 C SENSEA +3V 10U-6.3V_8 0_4 ADOGND +AZA_VDD C460 *.1U_4 R374 12 RESET# SYNC 4.7U_6 13 Sense A 11 1 +3V R337 FRONT-L FRONT-R SPDIFO DVDD1 48 4.7U_6 C307 MIC1-R 14 NC 10 SPDIF_OUT_268 L36 BK1005LL121_4_0.35A <21> SPDIF_OUT EAPD DVDD2 C SDATA-IN MUTE_ALC268 47 0_4 C311 LINE1-L 15 NC 9 R185 MIC2-L DMIC-CLK DVSS2 EAPD NC BIT-CLK 46 8 45 MIC2-R LINE1-R 23 18 CD-L NC 24 19 CD-GND ALC268/ALC888S_VC NC 7 44 AVSS2 R184 *12K_4 20 CD-R 6 43 MIC1-L SURR-R SDATA-OUT 42 ADOGND JDREF 5 41 DVSS1 ALC268_JDREF 40 LINE1-L MIC1-R 4 20K/F_6 SURR-R LINE1-R SURR-L DMIC-3/4/GPIO3 R189 ADOGND 39 AVDD2 DMIC-1/2/GPIO0 HP Jack MONO-OUT 3 38 SURR-L 2 37 +5V_ADO 35 Vo=1.2*(R371+R372)/R371= 4.8V U7 D R186 *36K_4 ADOGND 2 ADOGND ALC268_VREF C319 4 GND MIC1-VREFO-L *ALC888@0_4 0_4 1 R187 *G961-18ADJTEU VOUT 3 U6 *0_4 +5V_268_VEN R191 R339 ADJ MIC2-VREFO EAPD D AGC_Attack (4 pin) LOW Hi HDA_RESET#_ADO <12> HDA_SYNC_ADO C463 .1U_4 AGC_ON/OFF (6 pin) LOW Hi +AZA_VDD ACZ_SDIN268 R334 10P_4 22_4 HDA_SDIN0 AGC-recovery-time selection Attack time 1 ms 2 ms AGC_Recovery1 (10 pin) LOW LOW Hi Hi AGC ON/OFF selection <12> <12> AGC ON/OFF ON OFF AGC-on-level selection Recovery Time 1.0 s 2.0 s 4.0 s 8.0 s AGC_Recovery2 (11 pin) LOW Hi LOW Hi AGC_Lv1 (2 pin) LOW LOW Hi Hi AGC_Lv2 (3 pin) LOW Hi LOW Hi AGC ON Level 9.8 dBV 9.0 dBV 8.1 dBV 6.0 dBV Output Po (RL=8 ohm) 1.2 W 1.0 W 0.8 W 0.5 W C456 EMI Solution HDA_BITCLK_ADO <12> HDA_SDOUT_ADO <12> +3V_AVDD R370 FRONT-R C470 EMI Solution FRONT-R-1 1U-16V_6 R347 +3V EMI Solution 1 <22> AMP_MUTE# R372 C511 FRONT-L-2 29 10K/F_6 820P_6 PREOUT-L 28 R350 C480 FRONT-R-2 10K/F_6 820P_6 PREOUT-R 10K/F_6 10K/F_6 ADOGND C510 1U-16V_6 33 MUTE_SPK 4 34 TC7SH08FU 3 35 EAPD C290 *47P_4 25 C289 *47P_4 12 18 19 VCC_SPL 5 26 31 SP_INL SP_OUTL Panasonic SP_INR AN12948A PREOUT_R SP_OUTR+ SP_OUTR+ SP_STBY2 HP_OUTL HP_STBY1 HP_INL TC7SH08FU ADOGND B INSPKL+ 22 INSPKL- INSPKR- 16 SP_STBY1 HP_INR HP_OUTR NC 1U-16V_6 17 SP_OUTR NC C494 20 SP_OUTR HP_STBY2 1U-16V_6 21 SP_OUTL VREFSP U20 2 37 SP_OUTL+ 4 <22> HP_MUTE# 1 23 AGC_Recovery2 GND 1 .1U_4 41 39 3 C297 *47P_4 36 *0_4 +3V C31 C301 *47P_4 R377 1 25 36 4 C2 C1 PREOUT_L C492 42 SP_OUTL+ 7 BK1608LL121_6_0.15A INSPKR-N BK1608LL121_6_0.15A INSPKR+N BK1608LL121_6_0.15A INSPKL-N BK1608LL121_6_0.15A INSPKL+N MUTE_HP MUTE FUNCTION CN8 SPEAKER_H1.95 L31 L32 L33 L35 5 INSPKRINSPKR+ INSPKLINSPKL+ 9 27 U19 2 8 43 AGC_Recovery1 EP EP EP EP EP EP FRONT-L-1 1U-16V_6 VSS_CP 55 56 57 58 50 51 C512 VSS AGC_Lv2 EP EP EP FRONT-L VCC_SPR AGC_ON/OFF Test1 6 Test2 AGC_ON/OFF Test3 AGC_Attack AGC_Lv1 Test4 4 AGC_Recovery1 10 SPK 38 AGC_Attack AGC_Recovery2 11 .1U_4 32 3 VCC_HP HP_STBY ON/OFF ON OFF OFF OFF C529 C530 10P_4 SPK +5V_ADO 49 53 54 C520 10P_4 <12> HP_STBY2 (36 pin) LOW Hi LOW Hi AGC_Lv2 GND_SPR HDA_BITCLK_MDC R380 0_4 HP_STBY1 (35 pin) LOW LOW Hi Hi 2 GND_SPL +3VSUS VCC_CP 0_6 AGC_Lv1 13 HDA_SDIN1_MDC R381 2 4 6 8 10 12 SP_STBY ON/OFF ON OFF OFF OFF 24 22_4 RSV RSV 3.3V GND GND AC_BCLK SP_STBY2 (34 pin) LOW Hi LOW Hi GND_CP R376 GND AC_SDO GND AC_SYNC AC_SDI AC_RST# U17 SP_STBY1 (33 pin) LOW LOW Hi Hi GND <12> HDA_SYNC_MDC <12> HDA_SDIN1 <12> HDA_RESET#_MDC 1 3 5 7 9 11 +3V_S5 46 <12> HDA_SDOUT_MDC *0_6 5 B R382 VCC CN28 MDC 40 SP_STBY ON/OFF & HP_STBY ON/OFF MDC ADOGND C459 10P_4 GND 0_4 30 R336 EP EP EP INSPKR+ 15 14 HPL 45 44 HPINL 48 HPINR R360 R361 20K/F_6 20K/F_6 R359 R358 20K/F_6 20K/F_6 C488 4.7U_6 SURR-L SURR-R1 C481 4.7U_6 SURR-R HPR 47 60 59 52 HP HPL <21> SURR-L1 HPR <21> CPGND_3 AN12948A A A ADOGND ADOGND Beep CPGND -- ISOLATED GND R379 *0_4 Modify CPGND to CPGND_1~4 ADOGND PCBEEP C458 1U-16V_6 BEEP_1 R333 10K_4 MCP_SPKR <12> +3V +3V_AVDD R368 C457 100P_6 R332 1K_4 C514 *10U-6.3V_8 CPGND_1 CPGND_2 +5V_ADO 0_8 C472 10U-6.3V_8 C477 .1U_4 C501 1U-16V_6 C500 1U-16V_6 C509 1U-16V_6 C490 1U-16V_6 C487 1U-16V_6 Quanta Computer Inc. C314 1U-16V_6 PROJECT : Z05 Size ADOGND 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com Rev 1A ALC268 & MDC/AMP/SPK/MIC ADOGND Date: 5 Document Number 2 Monday, February 25, 2008 Sheet 1 20 of 34 5 4 3 2 1 MIC <20> MIC1_L1 <20> MIC1_R1 +3V D7 DA204U MIC1_L1 L34 BK1608HS241_6 MIC1_L MIC1_R1 L37 BK1608HS241_6 MIC1_R MIC1_JD# 1 2 6 3 4 1 7 MIC1_JD# 3 2 8 ADOGND 5 CN24 D C303 D MIC C299 470p/50V_NPO_4 470p/50V_NPO_4 +3V D6 DA204U Normal OPEN Jack 1 LINEIN_JD# ADOGND <20> LINE1-L_1 <20> LINE1-R_1 LINE1-L_1 L26 BK1608HS241_6 LINEINL_SYS LINE1-R_1 L30 BK1608HS241_6 LINEINR_SYS LINE IN 3 2 BLUE ADOGND 1 2 6 3 4 LINEIN_JD# 7 C280 470p/50V_NPO_4 5 CN23 +3V D5 *DA204U 8 C288 LINEIN 1 470p/50V_NPO_4 HPPLG# 3 Normal OPEN Jack 2 ADOGND C C ADOGND HeadPhone OUT/SPDIF +3V_SPD BLACK Q13 DTA114YUA CN21 HPPLG# HPL_SYS1 HPR_SYS1 L22 L20 7 2 3 4 1 6 HPL_SYS HPR_SYS BK1608HS241_6 BK1608HS241_6 C265 5 +3V_SPD 3 1 +3V C268 470p/50V_NPO_4 9 10 8 SPDIF_OUT 470p/50V_NPO_4 Drive IC LED 2 75/F_4 75/F_4 47K R149 R146 10K <20> HPL <20> HPR HPPLG# SPDIF ADOGND Normal OPEN Jack ADOGND <20> SPDIF_OUT B B VR VR1 R183 20K/F_4 MIC1_JD# R182 10K/F_4 LINEIN_JD# R181 39.2K/F_4 LINEOUT_JD# <22> DIGVOL_UP <22> DIGVOL_DN DIGVOL_UP 2 DIGVOL_DN 3 A B 7 SENSEA 6 <20> SENSEA C 1 4 4 5 5 VR_XRE094_NOBLE +3V LINEOUT_JD# 3 R177 +3V 10K_4 HP_ON HPPLG# A 2 Q16 2N7002E 1 10K_4 3 R176 Q15 2 A 2N7002E 1 ADOGND Quanta Computer Inc. ADOGND PROJECT : Z05 Size Document Number Rev 1A Audio Jack Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 21 of 34 5 4 3 2 WPCE775C 1 I/O ADDRESS SETTING +3VPCU I/O Address +3V BADDR1-0 L41 +A3VPCU BLM18AG601SN1_6 C331 C337 C340 4.7U_6 .1U_4 For PCICLK LPC_CLK_EC R213 22_4 LPC_CLK_EC <9> CLKRUN# 8 <12> GATEA20 121 122 <12> RCIN# D11 <12> EC_SCI# BAS316 SCI#_R 124 <23> ARCADE_KEY For PCIRESET 29 6 <16> EC_FPBACK# C336 10P_4 3 126 127 128 1 2 7 <9,17> PLTRST# <16,24> USBON# 123 <9> SERIRQ 125 9 <12> KBSMI# GA20 LPC GPIO24/LDRQ GPIO10/LPCPD LREST GPIO67/PWUREQ SERIRQ GPIO65/SMI GPIO 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 <24> MBCLK <24> MBDATA <4> MBCLK_CPU <4> MBDATA_CPU B MBCLK MBDATA MBCLK_CPU MBDATA_CPU 72 71 10 11 12 13 <18> TPCLK <18> TPDATA <24> CHG-EN E775_32KX1 R200 R199 33K/F_4 Y4 1 C321 18P_4 E775_32KX2 20M_4 2 70 69 67 68 77 79 KBSOUT0/JENK KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KB KBSOUT4/JEN0 KBSOUT5/TDO KBSOUT6/RDY KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17 GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO37/PSCLK1 GPIO35/PSDAT1 GPIO26/PSCLK2 GPIO27PSDAT2 GPIO25/PSCLK3 GPIO12/PSDAT3 GPIO56/TA1 GPIO20/TA2 GPIO14/TB1 TIMER SPI SMB IR PS/2 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO66/G_PWM GPIO77/SPI_DI GPO76/SPI_DO/SHBM GPIO75/SPI_SCK GPIO72/IRRX1/SIN2 GPIO70/IRRX2_IRSL0 GPIO71/IRTX/SOUT2 GPIO87/CIRRXM/SIN_CR GPIO34/CIRRXL GPIO16/CIRTX GPO83/SOUT_CR/BADDR1 F_SDI F_SDO F_CS0 F_SCK FIU WPCE775 GPIO55/CLKOUT 4 3 GPIO01/TB2 GPIO03/AD6 GPIO06 GPIO07/AD7 GPIO23/SCL3 GPIO30/CIRTX2 GPIO31/SDA3 GPIO32/D_PWM GPIO33/H_PWM GPIO36/TB3 GPIO40/F_PWM GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/CIRRXM/TRST GPO47/SCL4 GPIO50/TDO GPIO51/TA3 GPIO52/CIRTX2/RDY GPIO53/SDA4 GPIO81 GPO82/TRIS GPO84/BADDR0 GPIO41 32KX1/32KCLKIN 32KX2 C327 18P_4 VCC_POR VREF 97 98 99 100 108 96 C469 C478 .1U_4 .1U_4 2Fh 164Eh 164Fh CCD_POWERON R218 10K_4 EC_SOUT_CR_DEBUG R217 *10K_4 MTEMP <24> SHBM RF_EN R202 10K_4 PCIE_WAKE# <8,15,17> SYS_I <24> DIGVOL_UP <21> DIGVOL_DN <21> Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware CC-SET <24> CPUFAN# <23> CPPE#_EC <17> CV-SET <24> 64 95 93 94 119 109 120 65 66 15 16 17 20 21 22 23 24 25 26 27 28 91 110 112 80 ACIN <24> NBSWON# <23> LID591# <16> SUSB# <12> SMBUS PULL-UP L39 HZ0603B601R_6 +3VPCU T69 MBCLK_CPU R192 MBDATA_CPU R193 4.7K_4 4.7K_4 MBCLK MBDATA 4.7K_4 4.7K_4 SUSLED# <23> T70 BATLED0# <23> BATLED1# <23> VRON <26> MAINON <27,28,30> R197 R194 T67 HWPG DNBSWON#_R AMP_MUTE# <20> EC_PROCHOT# <4> SUSON <29,30> ENERGY_DET <15> HP_MUTE# <20> D/C# <24> S5_ON <25,30> CPUMEMHOT# <4> D25 BAS316 C ACER ID 6 5 SCL SDA 75 73 74 113 14 114 111 86 87 90 92 A0 A1 A2 WP T65 VCC GND 1 2 3 8 4 24LC08 C320 .1U_4 FANSIG <23> 32 118 62 81 84 83 82 +3VPCU U8 MBCLK_CPU MBDATA_CPU DNBSWON# <12> BT_POWERON# <16> CCD_POWERON <14> 7 31 117 63 EC_L_BKLT_CTRL <14> NUMLED# <23> PWRLED# <23> CAPSLED# <23> CRT_SENSE# RF_EN CIRRX2 CRT_SENSE# <14> RF_EN <17> CELL-SET <24> SPI FLASH +3VPCU RSMRST# <12> SUSC# <12> PWROK_EC <4,12> NC_TEMP <30> 30 ECDB_CLOCK 85 VCC_POR# R206 104 VREF_uR R219 2 SPI_SDO_uR 5 SPI_SCK_uR 6 SPI_CS0#_uR 1 SO SI 10K_4 SPI_SDI_uR 22_4 SPI_SDO_uR SPI_CS0#_uR 22_4 SPI_SCK_uR R212 SPI_SDI_uR R210 T68 R215 +3VPCU U10 EC_SOUT_CR_DEBUG SCK CE VDD HOLD WP VSS 8 7 B C342 .1U_4 3 4 W25X80VSSIG T66 4.7K_4 +3VPCU 0_4 +A3VPCU INTERNAL KEYBOARD STRIP SET +3V +3VPCU MY0 R190 CRT_SENSE# R204 +3VPCU 10K_4 *4.7K_4 +3V Internal pull-up 1U-16V_6 E775AGND E775AGND <28> HWPG_NBCORE <27> HWPG_1.1V_NB A 2Eh 11 BADDR1 101 105 106 107 C308 32.768KHZ CORE DEFINED 10 BADDR0 VCORF_uR <18,23> MY0 <23> MY1 <23> MY2 <23> MY3 <23> MY4 <23> MY5 <23> MY6 <23> MY7 <23> MY8 <23> MY9 <23> MY10 <23> MY11 <23> MY12 <23> MY13 <23> MY14 <23> MY15 <23> MY16 <23> MY17 KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 GND1 GND2 GND3 GND4 GND5 GND6 54 55 56 57 58 59 60 61 5 18 45 78 89 116 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 D/A GPI94/DA0 GPI95/DA1 GPI96/DA2 GPI97/DA3 KBRST C <18,23> <23> <23> <23> <23> <23> <23> <23> A/D GPI90/AD0 GPI91/AD1 GPI92/AD2 GPI93/AD3 GPIO05/AD4 GPIO04/AD5 GPIO11/CLKRUN ECSCI/GPIO54 01 4 LFRAME LAD0 LAD1 LAD2 LAD3 LCLK VCORF <9,12,17> LFRAME# <9,17> LAD0 <9,17> LAD1 <9,17> LAD2 <9,17> LAD3 <9> LPC_CLK_EC XOR TREE TEST MODE D VDD U9 AGND C322 .1U_4 00 SHBM=0: Enable shared memory with host BIOS 44 C468 .1U_4 103 C326 .1U_4 102 C324 .1U_4 E775AGND AVCC C310 .1U_4 VCC1 VCC2 VCC3 VCC4 VCC5 C341 4.7U_6 19 46 76 88 115 D C332 4.7U_6 .1U_4 Data Index <25> HWPG_SYS <12,30> HWPG_1.2V <12,29> HWPG_1.8V <30> HWPG_2.5V <30> HWPG_1.1V_S5 <12,26> CPU_COREPG D8 BAS316 D15 *BAS316 D16 BAS316 D10 *BAS316 D14 BAS316 D12 BAS316 D13 *BAS316 D9 *BAS316 R196 R188 10K_4 *10K_4 A HWPG Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A EC WPCE775C_0DG & SPI Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 22 of 34 5 4 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 MX7 MX6 MX5 MX4 MX3 MX2 MX1 MX0 CPU FAN 2/21/08' Change from 330ohm to 220ohm on C-test +5V 10K_4 PWRLED#-R R229 220_4 SUSLED#-R <22> FANSIG CN20 U5 2 LED1 LED_G/Y_LTST-C155KGJSKT RP32 10 9 8 7 6 MX0 MX1 MX6 MX7 1 2 3 4 5 MX3 MX2 MX5 MX4 R226 220_4 R228 220_4 BATLED0# <22> <4> CPUFAN#_ON 1 <22> CPUFAN# 4 VIN VO GND /FON GND GND VSET GND TH_FAN_POWER 3 5 6 7 8 2 220_4 1 R227 1 C188 2.2U_6 +3VSUS 2 +3VPCU G995 C216 C416 C420 2.2U_6 .01U_4 *.01U_4 1 2 3 4 5 D FAN_CONN BATLED1# <22> LED2 LED_G/Y_LTST-C155KGJSKT FANPWR = 1.6*VSET 10KX8_10P8R <30> FAN_TP Q20 2N7002E PWRLED#-R 1 3 5 7 2 4 6 8 *220P-50V_8P4C 1 3 5 7 C 1 3 5 7 2 4 6 8 1 3 5 7 3 +3V *220P-50V_8P4C LED BOARD CONN. 1 10K_4 2 4 6 8 MY12 MY13 MY14 MY15 +3VPCU +3V <22> PWRLED# CN3 Q21 2N7002E CA1 2 4 6 8 Q19 2N7002E 12 11 10 9 8 7 6 5 4 3 2 1 *220P-50V_8P4C CA6 1 3 5 7 1 R224 CA4 *220P-50V_8P4C MX4 MX5 MX6 MX7 2 4 6 8 MY4 MY5 MY6 MY7 *220P-50V_8P4C CA7 MX0 MX1 MX2 MX3 3 CA2 2 MY11 MY10 MY9 MY8 2 CA3 FFC_26P_KB 1 3 5 7 2 4 6 8 MY0 MY1 MY2 MY3 SUSLED#-R 3 *220P-50V_8P4C CA5 2 4 6 8 R225 MY16 MY17 3 +3VSUS SUSLED#-R PWRLED#-R Q22 2N7002E 12 11 10 9 8 7 6 5 4 3 2 1 C 1 LED_CONN_12P 10K_4 2 1 3 5 7 <22> NBSWON# <22> CAPSLED# <22> NUMLED# <11> SATA_LED# 1 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 1 +3V R321 <18,22> MY[17..0] <18,22> MX[7..0] CN4 D 2 LED INT K/B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 3 *220P-50V_8P4C <22> SUSLED# Button BOARD CONN. Fingerprint BOARD CONN. Debug B B BUTTON MATRIX +3V MY0 Delete Debug Port(PCI & IDE) CN9 MX1 MAIL MX2 WWW MX4 WIRELESS MX5 BLUETOOTH <22> ARCADE_KEY <17> RF_LED# <16> BT_LED 12 11 10 9 8 7 6 5 4 3 2 1 MX1 MX2 MX4 MX5 MY0 12 11 10 9 8 7 6 5 4 3 2 1 +3VPCU Hot Key-SW_12P CN7 1 2 3 4 <11> USBP10<11> USBP10+ FP_CONN A A Quanta Computer Inc. PROJECT : Z05 Size Document Number Rev 1A FAN,SWITCH,LED,KB,FINGERPRINT Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Sunday, March 09, 2008 Sheet 1 23 of 34 4 3 3 PQ8 FDD6685 1 3 1 PQ34 FDD6685 VIN 4 3 4 BAT-V R1 1 PC108 0.1u/50V_6 VA2 2 2 PC106 0.1u/50V_6 2 0.02_3720 PR27 PD4 PDS1040S-13 1 PC17 0.1u/50V_6 PD5 P4SMAJ20A PC123 0.1u/50V_6 PC122 2200p/50V_6 Allen 0219 2 Allen 1203 PR18 220K/F_6 PR121 33K_6 1 VA 1 5 D D ACIN <22> ACIN PR20 220K/F_6 PD6 ACIN_1 6 2 5 3 2 1 PR130 10K_6 4 3 PR60 *10K/F_6 1 PQ4 IMD2AT108 CSIN_1 PR134 PR59 *10K/F_6 +3VPCU 2 <22> D/C# *ZD12V PR64 *6.8K/F_6 CSIP_1 PQ30 DMN601K-7 0_6 Allen 1203 VIN PL2 HI0805R800R-00_8 PC107 2.2u/10V_8 ISL6251_VDD 1 2 PR21 2.2/F_6 PR17 20/F_6 PR124 4.7_6 PC18 0.1u/50V_6 CSON 22 23 DCIN 24 PC14 6251CELLS_1 PR15 100K/F_6 PR7 10K/F_6 +3VPCU 6251CELLS_2 Allen 1019 2 PR118 100K/F_6 6251CELLS_1 15 VDDP 12 VADJ 11 ACLIM 10 PQ32 FDS6690AS CHLIM VRFE 8 ICM VCOMP VREF R2 PR25 71.5K/F_6 PC140 .01u/50V_6 PC28 *2200p/50V_6 CC-SET CC-SET <22> R3 CSOP_1 PC139 2200p/50V_6 CSON_1 10u/25V_1206 PC143 5 PR135 *514K/F_6 B CV-SET PR141 PR38 10K/F_6 PR142 *514K/F_6 CV-SET <22> *0_6 Input sense resistor and Constant power setting table 65W 1 PR16 *100K/F_6 90W 1 PC12 .01u/50V_6 2 PQ28 DMN601K-7 PR6 100K/F_6 R1 20m Ohm 20m Ohm CS+020AGM00 CS+020AGM00 R2 71.5K Ohm 6.19K Ohm CS37153F917 CS26193F929 R3 10K Ohm 10K Ohm CS31003F949 CS31003F949 SYS_I <22> PR22 3.3K/F_6 LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050) CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A CURRNT LIMIT POINT =(65w/19v)*0.85= 2.907A PC19 .01u/50V_6 A PC109 3300p/50V_4 PR127 *0_6 PC110 .01u/50V_6 PROJECT : Z05 2 2 PD12 ZD3.6V PC142 10u/25V_1206 Allen 0926 Float = 4.2V / CELL VADJ PC117 100p/50V_6 PC16 *100p/50V_6 1 1 2 PD2 ZD3.6V BAT-V Allen 0219 MBDATA <22> PD3 3TEMP_MBAT *DA204U CELL-SET <22> CELL-SET MBCLK <22> +3VPCU 1 A 2 PQ2 DMN601K-7 Allen 0919 GND Close Connector 2 PR37 ACLIM 3 47p/50V_6 PR128 100_4 13 0.03_3720 PR55 4 1 47p/50V_6 PR13 100_4 PGND 9/10 Change PL4 to 6R8. PL8 PCMC063T-6R8MN 6251LR 1 PR132 100_4 10mil Allen 0919 ISL6251_LGATE PC31 *2200p/50V_6 3 2 1 PR11 10K/F_6 PL6 HI0805R800R-00_8 7 4 6251EN BUS-10A-1206 PC21 PC111 0.1u/50V_6 14 2 SUYIN_BATTERY PR123 *10K/F_6 VREF *0_6 RB500V-40 100K/F_6 ISL6251_VDD 2 PR129 PD13 1 TEMP_MBAT 2 LGATE PQ9 FDS8878 3 1 2 3 4 5 6 7 1 PR120 6251VCOMP2 MBAT+ HI0805R800R-00_8 PL1 BAT-V 2 8 9 PF1 ICOMP CELLS EN 0_6 6 3 6251VCOMP1 PR8 10K/F_6 6251ICOMP MTEMP <22> Allen 1203 ISL6251_PHASE C 4 *2.2/F_6 5 Allen 1019 <22> CHG-EN PHASE 18 PC51 PC48 0.1u/50V_6 10u/25V_1206 PC50 2200p/50V_6 ACSET B PR122 UGATE ISL6251_UGATE DCIN 6251ACSET 2 PC113 100p/50V_6 PC115 .1u/50V_8 6251B_1 17 PR9 82.5K/F_6 Allen 1203 10/15 Change the PN by Bevis PU2 ISL6251A ACPRN PC10 0.1u/50V_6 PR10 10/F_6 6251B_2 16 PR43 *2.2/F_6 Allen 1203 CSON PR126 20/F_6 10/8 Change connector from 24 pin to 20 pin Del MX0 and MY0 signal Change USBON# from 24 pin to 20pin 10/17 Fill in the PN and footprint 2/20/08' Change PN from DFHD20MS025 and footprint C17339-12008-L-20P-RUV to DFHD20MS023 and C16305-102B-20P-RUV CN14 1 BOOT 2 CSON_1 PR133 2.7_6 9 20 HEADER_BTB CSOP PD14 RB500V-40 3 2 1 <16,22> VDD CSOP 21 PC112 47n/25V_6 1 USBON# CSIP PR131 20/F_6 CSOP_1 USBON# CSIN 20 CSIP 19 PQ46 DMN601K-7 CSIN VA 1 +5VPCU <11> USBP7+ <11> USBP7- 2 4 6 8 10 12 14 16 18 20 PC116 4.7u/10V_8 1 2 ISL6251_VDDP 2 2 4 6 8 10 12 14 16 18 20 1 C 1 3 5 7 9 11 13 15 17 19 5 6 7 8 PJ1 1 3 5 7 9 11 13 15 17 19 VA 1 3 PR205 100K/F_4 VA3 5 6 7 8 PR206 4.7K_4 1 PD7 1N4148WS CELL-SET = Hi ----> Cells = VDD ---->4S CELL-SET = Low ----> Cells = GND ---->3S 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Quanta Computer Inc. Size Custom Document Number Date: Monday, February 25, 2008 CHARGER (ISL6251A) Sheet 1 24 of 34 Rev 1A 5 4 MAIND 3 2 1 MAIND <29,30> SUSD SUSD <30> 1 <4,30> THERM_SYS_PWR 2 PR200 0_4 D VIN VIN D VL 2 VL 1 8 7 6 5 PR187 PC164 *2200p/50V_6 5V_LX PR114 *0_4 PR204 + 4 1 PC95 5V_DL PQ25 FDS6690AS PC90 0.1u/50V_6 PC163 2200p/50V_6 1 0.1u/50V_6 PC88 0.1u/50V_6 FDS6690AS Rds=12~15mOhm 1 3 2 1 REFIN2 1 PR98 196K/F_6 2 3V_LX PR95 SKIP DDPWRGD_R 3V5V_EN PC89 0.1u/50V_6 PQ19 FDS6690AS PR184 0_6 1 2 PR188 *0_6 SKIP PR102 0_6 +15V_ALWP *0_6 Allen 0929 0_6 Allen 0919 PR185 FDS6690AS Rds=12~15mOhm 10K/F_6 +3VPCU +3VPCU OCP:8A 500K PR96 0_6 HWPG_SYS <22> L(ripple current) =(19-3.3)*3.3/(2.2u*500k*19) ~2.479A PD15 CHN217 2 REFIN2 PR197 *200K_4 PR189 *0_6 PR198 *39K_4 B Iocp=8-(2.5/2)~6.75A Vth=6.75A*12mOhm=78mV R(Ilim)=(78mV*10)/5uA ~156K +3VPCU +5VPCU 1 2 5 6 2 +15V +3V_S5 0.1u/50V_6 REF DDPWRGD_R 1 PC161 0.1u/50V_6 PR183 PR186 PD10 CHN217 PC156 Allen 0919 3V_DL PR202 +15V + 330u/6.3V_6X5.7 PC80 0.1u/50V_6 2 22_8 +3VPCU SUSD PR180 1M_6 PQ39 FDC653N_NL 3 5 6 7 8 5 6 7 8 PR181 22_8 4 +3VPCU PR193 1M_6 2.2/F_6 PC76 2200p/50V_6 PR99 1/F_6 3 Iocp=8-(4.187/2)~5.9A Vth=5.9A*12mOhm=76mV R(Ilim)=(76mV*10)/5uA ~152K C 4 PC157 PC162 0.1u/50V_6 L(ripple current) =(19-5)*5/(2.2u*400k*19) ~4.187A VIN 32 31 30 29 28 27 26 25 PC86 1u/16V_6 3 +5VPCU OCP:8A 400K +3VPCU +3VPCU REFIN2 ILIM2 OUT2 SKIP# PGOOD2 EN2 DH2 LX2 1 VL OCP : 8A PL11 2R2uH-5.8mR Allen 0919 2 B PR107 1/F_6 2 PU7 ISL6237 1 10u/25V_1206 1 2 3 PR113 0_4 1 330u/6.3V_6X5.7 BYP OUT1 FB1 ILIM1 PGOOD1 EN1 DH1 LX1 PAD PAD 35 34 33 PC165 2.2/F_6 2 PC96 1 PR201 8 7 6 5 2 +5VPCU 9 10 11 2 12 196K/F_6 DDPWRGD_R 13 3V5V_EN 14 15 16 37 36 PAD PAD PAD C 1 2 3 +5VPCU PL12 2R2uH-5.8mR 17 18 19 20 21 22 23 24 Allen 0929 +5VPCU PC75 *2200p/50V_6 5 6 7 8 PQ26 FDS8878 OCP: 8A *0_6 3 2 1 5V_DH LDOREFIN LDO VIN NC ONLDO VCC TON REF 4 PQ18 FDS8878 3V_DH 8 7 6 5 4 3 2 1 PR194 150K_4 *2.2/F_6 PR94 *2.2/F_6 4 REF BST1 DL1 PVCC NC GND PGND DL2 BST2 PR203 2200p/50V_6 PC81 0.1u/50V_6 1 3V5V_EN PC82 1u-16V_6 PC79 10u/25V_1206 PC78 5 6 7 8 PC84 *.01u/16V_4 1 Allen 0919 PC77 0.1u/50V_6 PR191 0_4 1 PC87 0.1u/50V_6 2 PC92 10u/25V_1206 PC91 *10u/25V_1206 2 PC93 2200p/50V_6 PR192 0_4 2 PR199 39K/F_4 PC94 0.1u/50V_6 PC160 4.7u/6.3V_6 2 1 PR196 390K_4 3 3 3 MAIND 4 PQ44 FDS8878 PQ27 FDS8884 2 PQ37 FDC653N_NL 3 4 PQ38 DMN601K-7 +3V_S5 1 PQ41 DMN601K-7 3 2 1 PR190 1M_6 1 PQ40 DTC144EU S5D 2 3 2 1 2 1 <22,30> S5_ON MAIND 4 1 2 5 6 +3VSUS S5D A A +5V +3V PROJECT : Z05 Size Allen 0919 SYSTEM 5V/3V (ISL6237) Date: 5 Quanta Computer Inc. Document Number 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Thursday, March 06, 2008 Sheet 1 25 of 34 Rev 1A 4 3 2 PR24 10/F_6 + 2 PQ1 FDS6900AS 1 1.0 1 0 0.9 1 1 0.8 Allen 0919 UGATE_NB PR31 22.1K/F_4 0_8 PC119 1000p/50V_6 2 PR26 1 PC118 1u/16V_6 Allen 0919 PR207 2.2/F_6 1 1.2 1 0 1.0 1 1 0.8 1 1.4 0 1 Output 0 VIN 2 SVD 0 10/F_6 Allen 0919 PC166 2200p/50V_6 2 SVC Allen 0219 PC30 33p/50V_4 PC33 1200p/50V_4 2 VFIXEN VID Codes 5 0.36uH 2 5 PGND_0 PVCC OCSET LGATE_1 VDIFF_0 PGND_1 31 LGATE_0 30 29 1 LGATE_1 PL9 1 2 PC136 0.1u/50V_6 1 CPU_CORE1 PR166 B 1 2 3 2 + PC144 2200p/50V_6 PR61 PR62 0_6 0_6 2 + 4 PC39 330u_2V_7343 PC40 330u_2V_7343 PC47 0.1u/50V_6 PR66 4.02K/F_4 Allen 0919 + 2 2 PR160 6.81K/F_4 1 ISN_0 ISP_1 Allen 0219 1 <4> CPU_VDD0_FB_H 1 ISN_1 PC42 0.1u/50V_6 2 1 PR56 4.02K/F_4 2 0.36uH 2 2.2/F_6 LGATE_1 2 PR53 16.2K/F_4 1 OCP:20A 300K 1 ISN_1 ISP_1 PC46 0.1u/50V_6 PR161 PR162 PR163 PR164 0_4 0_4 0_4 0_4 CPU_CORE0 PR171 10/F_6 PC43 10u/25V_1206 PC36 *2200p/50V_6 UGATE_1 25 PQ35 AOL1412 ISP_0 PC44 10u/25V_1206 4 PQ10 AOL1414 24 23 VW_1 COMP_1 FB_1 PHASE_1 PR159 1/F_6 22 21 20 19 RTN_1 VDIFF_1 BOOT_1 VSEN_1 VW_0 26 UGATE_1 3 UGATE_1 27 PR52 *2.2/F_6 28 1 2 3 COMP_0 13 PC131 1000p/50V_6 Close to CPU socket 1 VIN 2 PC34 2.2u/10V_6 5 PHASE_1 ISP_0 PR157 6.81K/F_4 2 1 FB_0 18 12 B Allen 0219 +5VPCU 1 LGATE_0 RBIAS 17 11 2 PC132 2 1200p/50V_4 PC129 180p/50V_4 PC26 330u_2V_7343 PC168 330u_2V_7343 1 PU9 ISL6265 ENABLE RTN_0 10 1 PC25 330u_2V_7343 ISP_0 32 Allen 1203 PR54 1K/F_4 1 0_6 PC9 2200p/50V_6 2 8 9 PR156 54.9K/F_4 4 PQ31 AOL1412 + 1 PC37 4700p/25V_4 PR153 100K/F_4 SVC VSEN_0 PR57 255/F_4 0_6 + ISN_0 6 7 PR152 22K/F_4 1 PR29 1 10K/F_4 *0_4 0_4 Allen 0929 2 PR30 2 PR49 PR50 PR65 PHASE_0 + 2.2/F_6 4 <22> VRON <12> CPU_VRON UGATE_0 33 C PR12 1 Allen 1019 3 *0_4 PHASE_0 34 2 PC121 0.1u/50V_6 0_4 <4> CPU SVC 1 PR148 SVD 1 2 PR150 UGATE_0 Pin 49 is GND Pin 16 2 4 <4> CPU SVD PR33 10K_6 PWROK 0_4 35 2 3 PR47 BOOT_0 1/F_6 2 +3V PGOOD CPU_CORE0 4 3 2 15 +1.8V PR143 5 <12,22> CPU_COREPG 1 OCP:20A 300K PL5 1 1 2 3 PR36 *10K/F_4 PC20 0.1u/50V_6 PC13 *2200p/50V_6 36 5 0_4 ISN_0 PR44 14 C 2 PC24 10u/25V_1206 4 PQ6 AOL1414 PR42 1/F_6 BOOT_NB *2.2/F_6 PC23 10u/25V_1206 UGATE_0 1 2 3 1 PC29 0.1u/50V_6 37 38 PHASE_NB UGATE_NB 39 40 PGND_NB LGATE_NB 41 OCSET_NB 42 RTN_NB 43 FSET_NB VSEN_NB 44 45 46 FB_NB 47 OFS/VFIXEN COMP_NB 1 VIN *0_4 GND PR32 +3V PR41 10K/F_6 VCC 49 +3VPCU +5VPCU 1 PR14 PR136 PR137 0_4 0_4 0_4 48 PR39 2 2 PHASE_NB PR46 44.2K/F_4 2 Allen 0919 1 VIN LGATE_NB PR138 11.3K/F_6 1 PC120 0.1u/50V_6 UGATE_NB <4> CPU_PWRGD_SVID PC103 100u/25V_6X7.7 PC11 330u_2V_7343 PR139 PQ33 DTC144EU PC98 0.1u/50V_6 8 0 PC101 10u/25V_1206 D +5VPCU 7 1.1 6 Output 0 5 SVD 0 PC100 10u/25V_1206 G1 PR23 10/F_6 PR28 10/F_6 SVC S1/D2 D 2 2 PC15 10u/25V_1206 <4> CPU_VDDNB_RUN_FB_L Metal VID Codes + 1 2 3 <4> CPU_VDDNB_RUN_FB_H 2 X D1 O O G2 X X D1 X +5V VIN S2 +3.3V LGATE_NB CPU_VDDNB_RUN 1 X 2 VFIX O 1 SVI 4 Offset & Droop O 1 GND 1 OFS/VFIXEN 1 PL3 2.5uH_7.5A OCP:3A 260K 1 5 <4> CPU_VDD0_FB_L PC137 1000p/50V_6 PR68 16.2K/F_4 PC167 330u_2V_7343 ISN_1 Parallel PR170 10/F_6 1 Close to CPU socket PC141 1200p/50V_4 2 2 1 <4> CPU_VDD1_FB_L PR63 <4> CPU_VDD1_FB_H 1K/F_4 2 A PC49 4700p/25V_4 1 PR70 10/F_6 PC138 180p/50V_4 A PR67 255/F_4 CPU_CORE1 PR69 10/F_6 PROJECT : Z05 PR165 54.9K/F_4 Quanta Computer Inc. Size Document Number Date: Thursday, March 06, 2008 AMD Gfiffin (ISL6265) 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Sheet 1 26 of 34 Rev 1A 1 2 3 4 5 A A Allen 0919 VIN +5VPCU Allen 1203 PR115 10_6 PC6 2 4.7u/6.3V_6 PR5 0_6 <12,30> HTVDD_EN 4 6 Allen 0919 PC2 14 1 PC97 1 5 PC1 *1000p/50V_6 PU1 RT8202 FB PGOOD OC VDDP LGATE GND PGND NC TPAD NC Allen 0919 3 2 1 OCP: 7A PL4 PHASE-1.1V 11 10 PR117 +1.1V_NB 6.04K/F_6 2R2uH-5.8mR 1 VDD UGATE-1.1V 12 5 6 7 8 PHASE 18 2 2 1u/16V_6 VOUT 13 PR35 9 + 8 LGATE-1.1V PQ5 FDS6690AS 4 2.2/F_6 PR147 7 17 Rds*OCP=RILIM*20uA PC134 560u/2.5V_6X5.7 1.1V_FB TON=3.85p*1M*1/(Vin-0.5) FDS6690AS Rds=12~15mOhm OCP=7-0.8A L(ripple current) =(19-1)*1/(2.2u*272k*19) ~1.58A Frequency=1/(0.0036767)=272K 12m*6=RILIM*20uA RILIM=3.6K(2.5~8K) TON=3.85p*RTON*Vout/(Vin-0.5) Frequency=Vout/(Vin*TON) 4.7K/F_6 PC126 33p/50V_6 PC27 2200p/50V_6 .01u/50V_6 C R1 2 3 <22> HWPG_1.1V_NB UGATE B PC105 *2200p/50V_6 3 2 1 2 PR1 10K/F_6 BOOT TON GND 1 EN/DEM GND 16 PC3 0.1u/50V_6 PC8 10u/25V_1206 R2 PR144 10K/F_6 PC128 10u/10V_8 21 +3VPCU GND 15 <22,28,30> MAINON PC5 0.1u/50V_6 PQ3 FDS8878 PC7 0.1u/50V_6 20 47K_6 Allen 0919 *2.2/F_6 4 PR3 *10K/F_6 GND PR2 PR119 *0.1u/50V_6 19 B PR116 1M_6 *47K_6 1 PC99 PR4 5 6 7 8 PD1 RB500V-40 VOUT=(1+R1/R2)*0.75 C D D PROJECT : Z05 Quanta Computer Inc. Size Document Number Rev 1A NB_VCC (RT8202) Date: 1 2 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 4 Monday, February 25, 2008 Sheet 5 27 of 34 1 2 3 4 5 A A Allen 0919 VIN +5VPCU PR169 Allen 1203 10_6 1 PR168 1M_6 PC56 2 B PR76 *10K/F_6 4.7u/6.3V_6 6 5 PC61 14 1 1 Allen 0919 *1000p/50V_6 FB PGOOD VDDP LGATE GND PGND NC TPAD NC 10 PR167 3 2 1 +NB_CORE 6.04K/F_6 2R2uH-5.8mR PR72 9 1V 1 OC OCP: 7A PHASE-1V 11 + 8 LGATE-1V 2.2/F_6 4 7 17 PR74 PQ12 FDS6690AS Rds*OCP=RILIM*20uA R1 2 PU4 RT8202 Allen 0219 PL10 5 6 7 8 VDD 18 2 2 1u/16V_6 PHASE B 4.02K/F_6 PC59 33p/50V_6 PC54 2200p/50V_6 3 2 1 4 VOUT UGATE-1V 12 PC52 10u/25V_1206 PC55 *2200p/50V_6 13 GND 3 <22> HWPG_NBCORE UGATE GND 2 PR78 10K/F_6 BOOT TON PC53 0.1u/50V_6 PQ11 FDS8878 PC146 PC145 560u/2.5V_6X5.7 10u/10V_8 R2 PR75 10K/F_6 21 1 EN/DEM GND 16 PC60 0.1u/50V_6 20 +3VPCU GND 15 <22,27,30> MAINON PC62 *2.2/F_6 4 PC58 0.1u/50V_6 19 47K_6 PC63 PR71 *0.1u/50V_6 PR73 0_6 PR77 5 6 7 8 PD8 RB500V-40 PC57 .01u/50V_6 1V_FB VOUT=(1+R1/R2)*0.75 C C TON=3.85p*1M*1/(Vin-0.5) FDS6690AS Rds=12~15mOhm OCP=7-0.8A L(ripple current) =(19-1)*1/(2.2u*272k*19) ~1.58A Frequency=1/(0.0036767)=272K 12m*6=RILIM*20uA RILIM=3.6K(2.5~8K) TON=3.85p*RTON*Vout/(Vin-0.5) Frequency=Vout/(Vin*TON) D D PROJECT : Z05 Quanta Computer Inc. Size Document Number Rev 1A NB_VCC (RT8202) Date: 1 2 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 4 Monday, February 25, 2008 Sheet 5 28 of 34 5 4 3 2 1 D D Allen 0919 VIN PR125 PU3 TPS51116 2 4 PC41 10u/10V_8 VLDOIN DRVH VTT VBST VTTSNS LL GND DRVL VTTGND PGND 19 PQ29 AOL1414 4 PC38 20 PR58 0.1u/50V_6 PC104 PC114 2200p/50V_6 *2200p/50V_6 0_6 PC102 10u/25V_1206 OCP: 12.5A PL7 +1.8VSUS 2R2uH-5.8mR 17 7 +SMDDR_VREF PR151 0_6 *0_6 DIS_MODE 8 9 5VIN 10 S3 VTTREF S5 COMP VDDSNS VDDQSET 21 22 23 24 25 26 27 PR48 0_6 +1.8VSUS PR158 V5IN PGOOD 0_6 CS PR19 11 S3_1.8V 12 S5_1.8V PR140 *0_6 R1 PQ7 AOL1412 PC22 2200p/50V_6 +3VPCU if tune Vout PR38 un-mount, PR156 PR165 mount R2 PC45 10u/10V_8 PR51 5.1K/D_6 Allen 0219 HWPG_1.8V <12,22> PC32 4.7u/6.3V_6 PR34 *110K/F_6 FDS6690AS Rds=3.8~4.6mOhm OCP=12-0.5A L(ripple current) =(19-1.8)*1.8/(2.2u*400k*19) ~1.03A Vout=0.75(1+R1/R2) B PC133 560u/2.5V_6X5.7 15 5VIN +5VPCU C 2.2/F_6 4 SUSON <22,30> PC35 PR45 0_6 Allen 0929 SUSON <22,30> PR154 +3VPCU 100K/F_6 13 2 <4> VDDIO_FB_H PR145 0_6 PR149 0_6 5VIN 14 *1000p/50V_6 PR146 FOR DDR II 0_6 + 16 1 PR155 5VIN PC127 0.033u/50V_6 MODE 1 2 3 6 GND GND GND GND GND GND GND 3 DIS_MODE C PC4 10u/25V_1206 18 5 5 Allen 0919 1 2 3 1 +SMDDR_VTERM PC130 10u/10V_8 *2.2/F_6 5 PC135 10u/10V_8 PR40 *76.8K/F_6 S3_1.8V +1.8VSUS S5_1.8V PC124 *0.1u/50V_6 PC125 *0.1u/50V_6 Allen 0919 B 3.8m*12=RILIM*10uA RILIM=4.56K 1 2 5 6 (10u*PR35)/Rdson+Delta_I/2=Iocp MAIND PQ36 FDC653N_NL 3 8/27 Add CAP for Delay time. 4 <25,30> MAIND +1.8V A A PROJECT : Z05 Quanta Computer Inc. Size Document Number Rev 1A DDR 1.8V(TPS51116) Date: 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 29 of 34 5 4 3 2 1 Allen 0919 VIN VIN +3VPCU Allen 1203 PD9 RB500V-40 PR110 200K/F_4 Allen 0919 PR104 200K_6 PC150 8 3 2 <23> FAN_TP 1 2 PC85 0.1U/X7R-50V_6 VL PGOOD 1 VEN VO 6 3 8 9 VIN GND GND NC 5 HWPG_1.1V_S5 PC155 10u/10V_8 PR108 4.95V 5 + 6 - 1M/F_6 For EC control thermal protection (output 3.3V) 100K/F_6 PU8B PD11 1 7 2 RB500V-40 LM393 PC153 0.1u/50V_6 R1 PR175 13K/F_6 R2 PR174 34K/F_6 PC70 10u/10V_8 PC154 *0.1u/50V_6 Allen 0919 Vout =0.8(1+R1/R2) =1.106V NC_TEMP <22> Allen 0919 Allen 1203 Allen 0921 D 0.15A PR105 PR109 10K/F_6 <22> +1.1V_S5 0.8V +3VPCU PR111 196K/F_4 VPP 2 PQ22 DMN601K-7 PU8A LM393 4 Connect to Thermistor +3VPCU + 4 7 2.469V 1u/16V_6 1 D PU10 RT9025-25PSP PR92 10K/F_6 <22,25> S5_ON 3 PC83 0.1U/X7R-50V_6 PR93 100K_4 +5VPCU <4,25> 1 THERM_SYS_PWR PR112 1K/F_4 ADJ VL 2 VL +3VPCU +3VPCU PR179 100K_4 +5VPCU MAINON PR178 10K/F_6 VPP PGOOD 1 2 VEN VO 6 3 8 9 HWPG_1.5V PC65 NC 1u/16V_6 4 0.75A VIN GND GND PU5 RT9025-25PSP +1.5V +1.8VSUS PR176 30K/F_4 R1 PR84 10K/F_6 <12,27> HTVDD_EN 5 PC151 10u/10V_8 VPP 2 VEN 3 8 9 VIN GND GND C PGOOD 1 VO 6 NC 5 HWPG_1.2V +1.2V_HT 0.8V PC152 10u/10V_8 PC148 0.1u/50V_6 <12,22> 1.5A 7 7 +1.8VSUS Allen 0919 4 ADJ C PR81 100K_4 +5VPCU PU11 RT9025-25PSP 1u/16V_6 ADJ PC147 PC149 *0.1u/50V_6 R1 PR172 17.4K/F_6 R2 PR173 34K/F_6 PC64 10u/10V_8 0.8V PR177 34K/F_6 R2 PC74 10u/10V_8 Vout =0.8(1+R1/R2) Allen 0921 =1.506V VIN +1.8VSUS PC72 0.1u/50V_6 PC73 *0.1u/50V_6 Allen 0919 Vout =0.8(1+R1/R2) =1.209V +3VSUS +SMDDR_VTERM Allen 0919 +15V +3VPCU B PR82 22_8 PR86 22_8 PR83 22_8 PR182 1M_6 B 3 3 Allen 0919 PC67 PR87 1M_6 2 2 2 2 PQ42 DMN601K-7 PC158 *2200p/50V_4 MAINON PR91 10K/F_6 +3VSUS 4 VPP PGOOD 1 2 VEN VO 6 3 8 9 VIN GND GND NC 5 Allen 0919 VIN +3V PR103 1M_6 PR97 22_8 PR100 22_8 +NB_CORE PR106 22_8 PC71 10u/10V_8 +1.1V_NB PR80 *22_8 PR79 *22_8 R2 PR88 34K/F_6 PC66 10u/10V_8 Vout =0.8(1+R1/R2) =2.522V MAIND <25,29> 3 3 3 PC68 *0.1u/50V_6 3 3 PC69 0.1u/50V_6 Allen 0919 PR195 1M_6 MAIND 3 R1 PR85 73.2K/F_6 +15V MAINON_ON_G 3 <22> +2.5V 0.8V +1.8V +5V HWPG_2.5V 0.75A 7 1 PQ16 DMN601K-7 1 PQ17 DMN601K-7 1 1 1 PQ43 DTC144EU PU6 RT9025-25PSP 1u/16V_6 2 <22,29> SUSON PQ15 DMN601K-7 PR90 100K_4 +5VPCU SUSD <25> 3 3 SUSD 3 SUS_ON_G ADJ PR89 1M_6 PQ20 DMN601K-7 2 PQ21 DMN601K-7 2 PQ24 DMN601K-7 2 PQ13 *DMN601K-7 PQ14 *DMN601K-7 PQ45 DMN601K-7 PC159 *2200p/50V_4 PROJECT : Z05 1 2 1 2 1 2 1 PQ23 DTC144EU A PR101 1M_6 2 1 MAINON 1 <22,27,28> 1 A Quanta Computer Inc. Size Date: 5 4 Document Number Rev 1A Discharge (1.1V/1.2V/2.5V) Allen 0919 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Monday, February 25, 2008 Sheet 1 30 of 34 5 4 ISL6265 CPU_CORE0 PU9 CPU_CORE1 D 3 2 1 D CPU_VDDNB_RUN RT8202 +1.1V_NB PU1 RT8202 +NB_CORE PU4 +5VPCU VIN +5VPCU ADAPTER FDS8884 PQ27 +5V C C ISL6237 +3VPCU PU7 Charger ISL6251A VIN FDC653N PQ37 +3V_S5 FDC653N PQ39 +3VSUS +3VPCU PU2 RT9025 PU6 FDS8878 BATTERY PQ44 RT9025 +1.1V_S5 PU10 +1.8VSUS VIN +1.8VSUS B 1. +1.1V_S5MCP77M Power(+1.1V_DUAL) 2. +5VPCUPower IC VCC, USB PORT POWER(S3 control) 3. +5VAudio, FAN, Touch pad, SATA HDD, ODD, CRT 4. +3V_S5MCP77M, New Card, LAN Power 5. +3VPCUKBC WPCE755C,SPI ROM, LED, LID Switch, Fingerprint Module 6. +3VSUSBluetooth, Mini Card, MDC 7. +3VCPU Thermal Sense, MCP77M, System Memory, LCD Panel, PC Camera, Mini card, New Card, Audio, Codec, Card Reader, KBC WPCE775C, LED 8. +2.5VCPU VDDA 9. +3V_LANLAN Power(BCM5764M) 10. +1.2V_LANLAN Power(BCM5764M) 11. +2.5V_LANLAN Power(BCM5787M) 12. +1.5VMini Card, New Card 13. +1.8VSUSCPU VDD I/O, System Memory 14. SMDDR_VTEMCPU Memory Interface , SYSTEM DDR DIMM Memory Termination 15. +1.8VMCP77M LCD Interface 16. +1.1V_NBMCP77M (HT Interface, PCI-E Interface, I/O Power, SATA Interface) 17. +NB_COREMCP77M Core Power 18. +1.2V_HTCPU HT Power 19. CPU_CORE0 CPU Power 20. CPU_CORE1 CPU Power 21. CPU_VDDNB_RUNCPU NB Power 22. +2.5V +3V TPS51116 PU3 FDC653N PQ36 +1.8V RT9025 PU5 +1.2V_HT RT9025 +1.5V PU11 +SMDDR_VTERM +SMDDR_VREF A B A PROJECT : Z05 Quanta Computer Inc. Size Document Number Date: Monday, February 25, 2008 Rev 1A Power Tree 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 1 Sheet 31 of 34