Transcript
[AKD4649-B]
AKD4649-B AK4649 Evaluation board Rev.0 GENERAL DESCRIPTION AKD4649-B is an evaluation board for the AK4649, Stereo CODEC with built-in MIC/SPK amplifier. The AKD4649-B can evaluate A/D converter and D/A converter separately in addition to loop-back mode (A/D → D/A). The AKD4649-B also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide AKD4649-B
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Evaluation board for AK4649 (Cable for connecting with printer port of IBM-AT compatible PC and control software are packed with this. This control software does not operate on Windows NT.)
FUNCTION • DIT/DIR with optical input/output • 10pin Header for serial control mode
5V
Regulator
GND 3.3V
PORT4
LIN1/ RIN1
Control Data 10pin Header
LIN2/ RIN2
PORT3
MIN
DSP 10pin Header
LOUT/ ROUT
AK4649
PORT1 Opt In AK4114 Opt out
PORT2
Figure 1. AKD4649-B Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual
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BOARD OUTLINE CHART
■ Outline Chart
SPK
J4
J6
SPK-JACK
LOUT/ROUT
J2 MIN
U1
U3
E
PORT1 Opt In
J3 LIN2/RIN2
AK4649 LED1
A
PORT4
6
1
U4 U2 CTRL
J5 LIN1/RIN1
AK4114
PORT2 Opt Out
JP1 DGND
AGND
VCC
DSP PORT3
Figure 2. AKD4649-B Outline Chart
■ Comment (1) J2, J3, J5 (Mini Jacks) Analog signal input. (2) J4, J6 (Mini Jacks) Analog signal output. (3) VCC, AGND, DGND (Power Supply Terminal) Connect power supply with these terminals.
(4) PORT1, PORT2 (Optical Connectors) PORT1 (DIR) : Input optical signal (SPDIF, Fs:32～48kHz) to AK4114. PORT2 (DIT) : Output optical signal (SPDIF, Fs:32～48kHz) from AK4114. .
(5) PORT4 (10pin Header) Control port. Connect the bundled cable into this port. (6) PORT3 (10pin Header) DSP port. MCLK, BICK, LRCK, SDTO and SDTI can be input/output from PORT3.
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Evaluation Board Manual Operation sequence 1) Set up the power supply lines. Name VCC AGND DGND
Color Red Black Black
Voltage +5.0V 0V 0V
Comments Attention Regulator Power line is needed for this jack. Analog ground Power line is needed for this jack. Digital ground Power line is needed for this jack. Table 1 Set up of power supply lines
2) Set up the evaluation mode, jumper pins. (See the followings.) 3) Power on. The AK4649 and AK4114 should be reset once bringing SW1 “L” upon power-up.
Evaluation mode (1) Slave mode (1-1) Evaluation of Recording block (MIC, ADC) using DIT of AK4114 (1-2) Evaluation of Playback block (SPK, Lineout) using DIR of AK4114 (1-3) Evaluation of Loop-back using AK4114 (1-4) All interface signals including master clock are fed externally. The AK4114’s audio interface format is fixed to MSB Justified.
(1-1) Evaluation of Recording block using DIT of AK4114 PORT2 (DIT) and X1 (X’tal) are used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX141). Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
(1-2) Evaluation of Playback block using DIR of AK4114 PORT1 (DIR) is used. Nothing should be connected to PORT3 (DSP). JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, any other evaluation mode without using DIR should be used.
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(1-3) Evaluation of Loop-back using AK4114 X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, any other evaluation mode without using DIR should be used.
(1-4) All interface signals including master clock are fed externally. PORT3 (DSP) is used. Nothing should be connected to PORT1 (DIR). JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
(2) Master mode (2-1) Evaluation of Loop-back using MCLK of AK4114 (2-2) Master clock is fed externally (2-1) Evaluation of Loop-back using MCLK of AK4114 X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). It can be evaluated at internal loop-back mode (ADCPF = PFDAC bits = “1”). It is possible to evaluate at various sampling frequencies using built-in AK4649’s PLL. JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
(2-2) Master clock is fed externally PORT3 (DSP) is used and MCLK is fed from PORT3. Nothing should be connected to PORT1 (DIR). It can be evaluated at internal loop-back mode (ADCPF = PFDAC bits = “1”). It is possible to evaluate at various sampling frequencies using built-in AK4649’s PLL. JP6 BICK2
JP7 LRCK2
JP8 LRCK
JP9
JP10
MCLK
BICK
JP11 SDTI
DIR
ADC
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In case of using the digital microphone
JP17 JP18 JP19 JP20
Analog MIC LIN1 RIN1
Digital MIC DMDAT DMCLK DMP: Supply the power to the digital microphone from DMP pin. Don’t care AVDD: Supply the power to the digital microphone from AVDD. MPWR DMP Table 2 .The setting of jump pins for the digital microphone
Other jumper pins set up 1. JP1 (GND) : Connection between AGND and DGND. OPEN : Both grounds are separated on board. SHORT : Both grounds are connected on board. 2. JP2, JP3 : Connection of mic power. OPEN: Mic power is not connected. SHORT : Mic power is connected. 3. JP4, JP5 : Select speaker type. EXT : SPP and SPN signals are output from J4. Dynamic : Dynamic speaker 4. JP12, JP21, JP22, JP23 : Select I/F Mode. 3-wire : 3-wire Serial Mode. I2C : I2C Bus Mode 5. JP13 (CAD0) : Select chip address in I2C Mode. OPEN : Chip address (CAD0) = “1” SHORT : Chip address (CAD0) = “0” 6. JP16 : Connection of MIN External Resistance. OPEN : External Resistance Mode (BPM bit = “0”) SHORT : Internal Resistance Mode (BPM bit = “1”)
The function of the toggle SW [SW1] (PDN): Power down of AK4649 and AK4114. Keep “H” during normal operation.
Indication for LED [LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114.
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Serial Control The AK4649 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (CTRL) with PC by 10 wire flat cable packed with the AKD4649.
CSN CCLK CDTI
Connect PC
AKD4649-B 10 wire flat cable
10pin Connector
10pin Header
Figure 3. Connect of 10 wire flat cable
The AK4649 supports 3-wire serial control mode and I2C-bus control mode (fast-mode, max : 400kHz).Please Set the jump pins as the table 1 when you want to change another mode.
Mode 3-wire I2C
JP12, JP21, JP22, JP23 3-wire I2C (CAD0 = “0”) I2C (CAD0 = “1”)
JP13 Open Short Open
Table 3 .Select Control Mode
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Analog Input/Output Circuits (1) Input Circuits 1. MIN Input Circuit J2 MIN
6
C14 1u
R15 20k MIN
+
4 3
JP16 MIN
Figure 4. MIN Input Circuit 2. LINE1 Input Circuit R1 2.2k MPWR R2 2.2k
J5 LIN1/RIN1
JP3 RIN1
6
C3 1u RIN1 +
4 3 C2 1u LIN1 +
JP2 LIN1
Figure 5. LIN1/RIN1 Input Circuit
3. LINE2 Input Circuit J3 LIN2/RIN2
C19 1u
6
+
4 3
RIN2
C18 1u +
LIN2
Figure 6. LIN2/RIN2 Input Circuit
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(2) Output Circuits 1.
STEREO LINE Output Circuit
C21 1u +
R23 220
ROUT
4 3
R24 20k
C20 1u
J6 LOUT/ROUT
6
+
R21 220
LOUT R22 20k
Figure 7 . STEREO LINE Output Circuit
2.
SPEAKER Output Circuit JP5
SPP
Dy namic 3 4
EXT
6
SPKP
J4 SPK-JACK SPK1 020S16
CN1 P 2
1
N
JP4 SPN
Dy namic EXT
SPKN
Figure 8. SPEAKER Output Circuit
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Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4649-B according to previous term. 2. Connect IBM-AT compatible PC with AKD4649-B by 10-line type flat cable (packed with AKD4649-B). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”. In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled “AKD4649-B Evaluation Kit” into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of “AKD4649.exe” to set up the control program. 5. Then please evaluate according to the follows.
Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click “Port Reset” button. 3. Click “Write default” button
Explanation of each buttons 1. [Port Reset] : 2. [Write default] : 3. [All Write] : 4. [Function1] : 5. [Function2] : 6. [Function3] : 7. [Function4] : 8. [Function5] : 9.[Write] : 10.[SAVE] : 11.[OPEN] :
Set up the port. When this is pushed, the printer port or USB port is selected automatically. Initialize the register of the AK4649 Write all registers that is currently displayed Dialog to write data by keyboard operation. Dialog to evaluate IVL/R, OVL/R, DVOL. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Dialog to write data by mouse operation. Save the current register setting. Write the save values to all register.
Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet.
Explanation of each dialog
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1. [Write Dialog]: Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes “H” or “1”. If not, “L” or “0”. If you want to write the input data to the AK4649, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Data Box:
Input registers address in 2 figures of hexadecimal. Input registers data in 2 figures of hexadecimal.
If you want to write the input data to the AK4649, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog] : Dialog to evaluate volume. There are dialogs corresponding to register of 09h, 0Ah, 0Ch, 0FH and 25H. Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to the AK4649 by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to the AK4649, click [OK] button. If not, click [Cancel] button.
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4. [SAVE] and [OPEN] 4-1. [SAVE] All of current register setting values displayed on the main window are saved to the file. The extension of file name is “akr”. (1) Click [SAVE] Button. (2) Set the file name and click [SAVE] Button. The extension of file name is “akr”. 4-2. [OPEN] The register setting values saved by [SAVE] are written to the AK4649. The file type is the same as [SAVE]. (1) Click [OPEN] Button. (2) Select the file (*.akr) and Click [OPEN] Button.
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5. [Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused. (3) Click [START] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file name is “aks”.
Figure 9. Window of [F3]
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6. [Function4 Dialog] The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed. When [F4] button is clicked, the window as shown in Figure 10 opens.
Figure 10. [F4] window
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6-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3]. The sequence file name is displayed as shown in Figure 11. ( In case that the selected sequence file name is “DAC_Stereo_ON.aks”)
Figure 11. [F4] window(2) (2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name is “*.ak4”. [OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded.
6-3. Note (1) This function doesn't support the pause function of sequence function. (2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the change.
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7. [Function5 Dialog] The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to buttons and then executed. When [F5] button is clicked, the window as shown in Figure 12 opens.
Figure 12. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). The register setting file name is displayed as shown in Figure 13. (In case that the selected file name is “DAC_Output.akr”) (2) Click [WRITE] button, then the register setting is executed.
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Figure 13. [F5] windows(2)
7-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file name is “*.ak5”. [OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded.
7-3. Note (1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be loaded again in order to reflect the change.
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8. [Filter Dialog] A calculation of a coefficient of Digital Programmable Filter such as HPF,EQ filter ,a write to a register and check frequency response such as HPF,EQ filter. Window to show to Figure 14 opens when push a [Filter] button .
Figure 14. Main Window
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8-1. Setting of a parameter (1) Please set a parameter of each Filter. Item Sampling Rate FIL3 Cut Off Frequency Filter type Gain HPF Cut Off Frequency
Contents Sampling frequency (fs) Stereo separation emphasis filter cut cff frequency Type of stereo separation emphasis filter Gain of stereo separation emphasis filter
Setting range 7350Hz ≤ fs ≤ 48000Hz fs/10000 ≤ Cut Off Frequency ≤ (0.497 * fs) LPF or HPF –10dB ≤ Gain ≤ 0dB
High pass filter cut off frequency
fs/10000 ≤ Cut Off Frequency ≤ (0.497 * fs)
LPF Cut Off Frequency
Low pass filter cut off frequency
fs/20 ≤ Cut Off Frequency ≤ (0.497 * fs)
EQ for Gain Compensation (EQ0) Pole Frequency
Pole Frequency
Zero-point Frequency
Zero-point Frequency
Gain 5 Band Equalizer EQ1-5 Center Frequency
Gain EQ1-5 Center Frequency
EQ1-5 Band Width EQ1-5 Band Width (Note 1) EQ1-5 Gain EQ1-5 Gain (Note 2) Note 1. A gain difference is a bandwidth of 3dB from center frequency. Note 2. When a gain is smaller than 0 , EQ becomes a notch filter.
fs/10000 ≤ Pole Frequency ≤ (0.497 * fs) fs/10000 ≤ Zero-point Frequency ≤ (0.497 * fs) 0dB ≤ Gain ≤ +12dB 0Hz ≤ Center Frequency < (0.497 * fs) 1Hz ≤ Band Width < (0.497 * fs) -1≤ Gain < 3
(2) “FIL3”, “EQ0”, “LPF”, “HPF”, “HPFAD”, “EQ1”, “EQ2”, “EQ3”, “EQ4”, “EQ5” Please set ON/OFF of Filter with a check button. When checked it, Filter becomes ON. When checked “Notch Filter Auto Correction”, perform automatic revision of center frequency of a notch filter. (“Cf. 8-4. automatic revision of center frequency of a notch filter”)
Figure 15. Filter ON/OFF setting button
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8-2. A calculation of a register A register set value is displayed when push a [Register Setting] button. When a value out of a setting range is set, error message is displayed, and a calculation of register setting is not carried out.
Figure 16. A register setting calculation result
When it is as follows that a register set value is updated. (1) When [Register Setting] button was pushed. (2) When [Frequency Response] button was pushed. (3) When [UpDate] button was pushed on a frequency characteristic indication window. (4) When set ON/OFF of a check button “Notch Filter Auto Correction”
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8-3.Indication of a frequency characteristic A frequency characteristic is displayed when push a [Frequency Response] button. In addition, a register set point is updated then, too. Change "Frequency Range", and indication of a frequency characteristic is updated when push a [UpDate] button.
Figure 17. A frequency characteristic indication result
When it is as follows that a register set point is updated. (1) When [Register Setting] button was pushed. (2) When [Frequency Response] button was pushed. (3) When [UpDate] button was pushed on a frequency characteristic indication window. (4) When set ON/OFF of a check button “Notch Filter Auto Correction”
8-4. Automatic revision of center frequency of a notch filter When set a gain of 5 band Equalizer to -1, Equalizer becomes a notch filter. When center frequency of plural notch filters is adjacent, produce a gap to central frequency (Figure 18). When check "a Notch Filter Auto Correction" button, perform automatic revision of central frequency of a notch filter, display register setting after automatic revision and a frequency characteristic (Figure 19). This automatic revision is availability for Equalizer Band which set a gain to "-1". (Note) When distance among center frequency is smaller than band width, there is a possibility that automatic revision is not performed definitely. Please confirm a revision result by indication of a frequency characteristic.
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Setting of center frequency: 4400Hz, 5000Hz, 5400Hz / Band Width : 200Hz(3 band common) Figure 18. When there is no revision of center frequency
Setting of center frequency: 4400Hz, 5000Hz, 5400Hz / Band Width : 200Hz(3 band common) Figure 19. When there is revision of center frequency
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MEASUREMENT RESULTS [Measurement condition] • Measurement unit • MCLK • BICK • fs • Bit • Power Supply • Measurement Filter • Temperature
: Audio Precession System Two Cascade : 11.2896MHz : 64fs : 44.1kHz : 24bit : AVDD = DVDD = SVDD = 3.3V : 10Hz ∼ 20kHz : Room
1.
LIN1/RIN1 Æ ADC a) MGAIN = +20dB Parameter Result (Lch / Rch) Unit ADC Analog Input Characteristics: (LIN1/RIN1 pins Æ ADC Æ IVOL, IVOL = 0dB, ALC = OFF), MGAIN = +20dB, PMMP = “1” S/(N+D) (-1dBFS Output) 81.8 / 81.7 dB D-Range (-60dB Output, A-weighted) 89.3 / 89.3 dB S/N (A-weighted) 89.5 / 89.6 dB b) MGAIN = 0dB Parameter Result (Lch / Rch) Unit ADC Analog Input Characteristics: (LIN1/RIN1 pins Æ ADC Æ IVOL, IVOL = 0dB, ALC = OFF), MGAIN = 0dB, PMMP = “1” S/(N+D) (-1dBFS Output) 82.2 / 82.1 dB D-Range (-60dB Output, A-weighted) 99.6 / 99.4 dB S/N (A-weighted) 102.2 / 102.1 dB
2.
LIN2/RIN2 Æ ADC a) MGAIN = +20dB Parameter Result (Lch / Rch) Unit ADC Analog Input Characteristics: (LIN2/RIN2 pins Æ ADC Æ IVOL, IVOL = 0dB, ALC = OFF), MGAIN = +20dB, PMMP = “0” S/(N+D) (-1dBFS Output) 82.1 / 81.8 dB D-Range (-60dB Output, A-weighted) 89.2 / 89.2 dB S/N (A-weighted) 89.4 / 89.5 dB b) MGAIN = 0dB Parameter Result (Lch / Rch) Unit ADC Analog Input Characteristics: (LIN2/RIN2 pins Æ ADC Æ IVOL, IVOL = 0dB, ALC = OFF), MGAIN = 0dB, PMMP = “0” S/(N+D) (-1dBFS Output) 82.0 / 82.1 dB D-Range (-60dB Output, A-weighted) 99.6 / 99.4 dB S/N (A-weighted) 102.2 / 102.0 dB
3.
DAC Æ LINEOUT Parameter Result (Lch / Rch) Unit Stereo Line Output Characteristics: (DAC Æ LOUT/ROUT pins), ALC = OFF, LOVL1-0 bit = “00”, RL=10kΩ, DVOL = OVOL = DATT = 0dB S/(N+D) (-3dBFS Output) 88.8 / 88.7 dB D-Range (-60dB Output, A-weighted) 96.9 / 96.9 dB S/N (A-weighted) 97.3 / 97.3 dB
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4.
DAC Æ SPK Parameter Result Speaker-Amp Characteristics: (DAC Æ SPP/SPN pins), ALC = OFF, RL=8Ω, DVOL = OVOL = DATT = 0dB, SPKG1-0 bits = “00” S/(N+D) (-0.5dBFS Output) 58.8 S/N (A-weighted) 98.2
Unit
Parameter Result Speaker-Amp Characteristics: (DAC Æ SPP/SPN pins), ALC = OFF, RL=8Ω, DVOL = OVOL = DATT = 0dB, SPKG1-0 bits = “01” S/(N+D) (-0.5dBFS Output) 59.2 S/N (A-weighted) 98.9
Unit
dB dB
dB dB
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PLOT DATA 1. LINEIN1 (LIN1 / RIN1 Æ ADC ) AK4649 LIN1/RIN1 THD+N vs. Input Level (fin = 1kHz, MGAIN = +20dB, PMMP = “1”)
AKM -60 -65 -70 -75 d B F S
-80 -85 -90 -95 -100 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 20. THD+N vs. Input Level AK4649 LIN1/RIN1 THD+N vs. Input Frequency (Input Level = -1dBr, MGAIN = +20dB, PMMP = “1”)
AKM -60 -65 -70 -75 d B F S
-80 -85 -90 -95 -100 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 21. THD+N vs. Input Frequency
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AK4649 LIN1/RIN1 Linearity(fin=1kHz, MGAIN = +20dB, PMMP = “1”)
AKM +0
T T T
-10 -20 -30 -40 d B F S
-50 -60 -70 -80 -90 -100 -110 -120 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 22. Linearity
AK4649 LIN1/RIN1 Frequency Response (Input Level = -1dBr, MGAIN = +20dB, PMMP = “1”)
AKM -0
-0.5
-1 d B F S
-1.5
-2
-2.5
-3 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 23. Frequency Response
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AK4649 LIN1/RIN1 FFT (fin=1kHz, Input= -1dBr, MGAIN = +20dB, PMMP = “1”) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
10k
20k
10k
20k
Hz
Figure 24. FFT Plot (Input = -1dBr, 0dBr = 82.98mVrms)
AK4649 LIN1/RIN1 FFT (fin=1kHz, Input= -60dBr, MGAIN = +20dB, PMMP = “1”) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
Hz
Figure 25. FFT Plot (Input=-60dBr, 0dBr = 82.98mVrms )
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AK4649 LIN1/RIN1 FFT (Input=no signal) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 26. FFT Plot (no signal input) AK4649 LIN1/RIN1 Crosstalk (Input Level = -1dBr) RED: Rch Æ Lch, BLUE: Lch Æ Rch
AKM -60
T T T T T T
T
-70 -80 -90 d B
-100 -110 -120 -130 -140 20
50
100
200
500
1k
2k
Hz
Figure 27. Crosstalk
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2. LINEIN2 ( LIN2 / RIN2 Æ ADC ) AK4649 LIN2/RIN2 THD+N vs. Input Level (fin = 1kHz, MGAIN = 0dB, PMMP = “0”)
AKM -70 -75 -80 -85 -90
d B F S
-95 -100 -105 -110 -115 -120 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 28. THD+N vs. Input Level AK4649 LIN2/RIN2 THD+N vs. Input Frequency (Input Level = -1dBr, MGAIN = 0dB, PMMP = “0”)
AKM -50 -55 -60 -65
d B F S
-70 -75 -80 -85 -90 -95 -100 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 29. THD+N vs. Input Frequency C18 and C19: Tantalum Capacitor In this case, a tantalum capacitor is used LIN2 and RIN2 pin on the AKD4649-B.As the performance of a tantalum capacitor is not so good about low frequency signal. Refer to Figure 30 about the performance of AK4649.
2008 / 11 - 28 -
[AKD4649-B]
AK4649 LIN2/RIN2 THD+N vs. Input Frequency (Input Level = -1dBr, MGAIN = 0dB, PMMP = “0”)
AKM -50 -55 -60 -65 -70
d B F S
-75 -80 -85 -90 -95 -100 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 30. THD+N vs. Input Frequency C18 and C19: Electrolytic Capacitor AK4649 LIN2/RIN2 FFT (fin=1kHz, Input= -1dBr, MGAIN = 0dB, PMMP = “0”) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 31. FFT Plot (Input = -1dBr, 0dBr = 823.2mVrms)
2008 / 11 - 29 -
[AKD4649-B]
AK4649 LIN2/RIN2 FFT (fin=1kHz, Input= -60dBr, MGAIN = 0dB, PMMP = “0”) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 32. FFT Plot (Input=-60dBr, 0dBr = 823.2mVrms ) AK4649 LIN2/RIN2 FFT (Input=no signal) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B F S
-80 -100 -120 -140 -160 -180 20
50
100
200
500
1k
2k
Hz
Figure 33. FFT Plot (no signal input)
2008 / 11 - 30 -
[AKD4649-B]
AK4649 LIN2/RIN2 Crosstalk (Input Level = -1dBr) RED: Rch Æ Lch, BLUE: Lch Æ Rch
AKM -80
T
-85 -90 -95 -100 -105 d B
-110 -115 -120 -125 -130 -135 -140 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 34. Crosstalk
2008 / 11 - 31 -
[AKD4649-B]
3. LINEOUT (DAC Æ LOUT / ROUT pins ) AK4649 LINEOUT THD+N vs. Input Level (fin = 1kHz)
AKM -80 -82 -84 -86 d B r
-88
A
-92
-90
-94 -96 -98 -100 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBFS
Figure 35. THD+N vs. Input Level AK4649 LINEOUT THD+N vs. Input Frequency (Input Level= -3dBFS)
AKM -10 -20 -30 -40 d B r
-50 -60
A -70 -80 -90 -100 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 36. THD+N vs. Input Frequency C20 and C21: Tantalum Capacitor In this case, a tantalum capacitor is used LOUT and ROUT pin on the AKD4649-B.As the performance of a tantalum capacitor is not so good about low frequency signal. Refer to Figure 37 about the performance of AK4649.
2008 / 11 - 32 -
[AKD4649-B]
AK4649 LINEOUT THD+N vs. Input Frequency (Input Level= -3dBFS)
AKM +0 -10 -20 -30 -40 d B r
-50
A
-70
-60
-80 -90 -100 -110 -120 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 37. THD+N vs. Input Frequency C20 and C21: Electrolytic Capacitor AK4649 LINEOUT Linearity (fin=1kHz)
AKM +0 -10 -20 -30 -40 d B r
-50
A
-70
-60
-80 -90 -100 -110 -120 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBFS
Figure 38. Linearity
2008 / 11 - 33 -
[AKD4649-B]
AK4649 LINEOUT Frequency Response (Input Level = -3dBFS)
AKM -1 -1.5 -2 -2.5 d B r A
-3 -3.5 -4 -4.5
-5 20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 39. Frequency Response AK4649 LINEOUT FFT (fin = 1kHz, Input = -3dBFS) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B r
-80 -100
A -120 -140 -160 -180 20
50
100
200
500
1k
2k
Hz
Figure 40. FFT Plot (Input = -3dBFS)
2008 / 11 - 34 -
[AKD4649-B]
AK4693 LINEOUT FFT (fin=1kHz, Input=-60dBFS) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B r
-80 -100
A -120 -140 -160 -180 20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
Figure 41. FFT Plot (Input = -60dBFS) AK4649 LINEOUT FFT (Input=no data) FFT point=16384, Average=8
AKM +0 -20 -40 -60 d B r
-80 -100
A -120 -140 -160 -180 20
50
100
200
500
1k Hz
Figure 42. FFT Plot (no data input)
2008 / 11 - 35 -
[AKD4649-B]
AK4649 LINEOUT Out-of-band noise (Input=no data) FFT point=16384, Average=8
AKM +0 -10 -20 -30 -40 -50 -60 d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 43. Out-of-band noise (no data input) AK4649 LINEOUT Crosstalk (Input Level = -3dBFS) RED: Rch Æ Lch, BLUE: Lch Æ Rch
AKM +0
T
T
T T
-10 -20 -30 -40 -50 d B
-60 -70 -80 -90 -100 -110 -120 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 44. Crosstalk
2008 / 11 - 36 -
[AKD4649-B]
4. SPK (DAC Æ SPK) PLOT DATA AK4649 SPK THD+N vs. Input Level (fin = 1kHz, SPKG1-0 = “00”)
AKM -40 -45 -50 -55 -60 d B r
-65
A
-75
-70
-80 -85 -90 -95 -100 -120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBFS
Figure 45. THD+N vs. Input Level
AK4649 SPK THD+N vs. Input Frequency (Input Level = -0.5dBFS, SPKG1-0 = “00”)
AKM -40 -45 -50 -55 -60 d B r
-65
A
-75
-70
-80 -85 -90 -95 -100 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 46. THD+N vs. Input Frequency (Input Level = -0.5dBFS, SPKG1-0 = “00” )
2008 / 11 - 37 -
[AKD4649-B]
AK4649 SPK FFT (fin = 1kHz, Input = -0.5dBFS, SPKG1-0 = “00”) FFT point=16384, Average=8
AKM +0 -10 -20 -30 -40 -50 -60 d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 47. FFT Plot (Input = -0.5dBr, SPKG1-0 = “00”) AK4649 FFT (fin = 1kHz, Input = -60dBFS, SPKG1-0 = “00”) FFT point=16384, Average=8
AKM +0 -10 -20 -30 -40 -50 -60 d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20
50
100
200
500
1k
2k
Hz
Figure 48. FFT Plot (Input = -60dBFS, SPKG1-0 = “00” )
2008 / 11 - 38 -
[AKD4649-B]
AK4649 SPK FFT (Input=no data, SPKG1-0 = “00”) FFT point=16384, Average=8
AKM +0 -10 -20 -30 -40 -50 -60 d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 49. FFT Plot (no data input, SPKG1-0 = “00”) AK4649 SPK Out-of-band noise Input=no data, SPKG1-0 = “00” FFT point=16384, Average=8
AKM +0 -10 -20 -30 -40 -50 -60 d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 50. Out-of-band noise (no data input, SPKG1-0 = “00”)
2008 / 11 - 39 -
[AKD4649-B]
REVISION HISTORY Date (YY/MM/DD)
Manual Revision
08/11/12
KM097100
Board Revision 0
Reason
Page
Contents
First Edition
IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei EMD Corporation (AKEMD) or authorized distributors as to current status of the products. z AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKEMD assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKEMD. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKEMD harmless from any and all claims arising from the use of said product in the absence of such notification.
2008 / 11 - 40 -
A
B
C
D
E
JP1 GND
DGND
E
AGND
DMP
E
DMP JP19
DMCLK
DMDAT
AGND
T45_B
T45_B 1
DGND
T45_R 1
JP18
VCC
1
LOUT
ROUT
MIN
RIN2
LIN2
DMCLK
LIN1
RIN1
AVDD
VCC
RIN1 JP17
DMDAT LIN1 D
D
+
B1
AVDD
A2
VCOC
C3
I2C
B3
PDN
E3
D3
E2
D2
E1
MIN
ROUT
LOUT
D4
SPP
SPN
E4
SPN
MCKO
D6
TEST2
MCKI
B5
MCKI
VSS2
A6
DVDD
BICK
LRCK
C5
A5
B
R13 51
+
R12 51
BICK
LRCK
SDTO
I2C-SEL2
SDTI
I2C 3-wire
51
R11 51
JP23
CCLK
I2C-SEL1
SDTO
CDTIO/CAD0
SDTI
R10 51
I2C
CDTI/SDA
SPP
C11 0.1u
R8 51
3-wire
R18
SVDD
C9 10u
C
B6
47k
D5
C4
R40
JP22
51
RIN2
LIN1/DMDAT
LIN2
C1
AK4649
51
PDN
CSN/CAD0
SVDD
E5
10k
R6
JP21
VSS1
C6
R3
R5 10
3-wire
B2
C7 0.1u
A4
C10 4.7n
VCOM
CCLK/SCL
C6 10u
4649_AVDD
R17
E6
C5 0.1u
B4
+
C
B
VSS3
C8 0.1u A1
CSN/SDA
C4 2.2u
I2C
MPWR/DMP
RIN1/DMCLK
C2
MPWR
+
U1 JP20 DMP MPWR
D1
GND
C12 10u
A
A
Title
- 41 -
Size
A3 Date: A
B
C
D
AKD4649-B Document Number
Rev
AK4649
Tuesday, November 11, 2008
Sheet E
0 1
of
5
A
E
J2 MIN
B
C14 1u
6
D
E
E
R15 20k MIN
+
4 3
C
JP16 MIN
J3 LIN2/RIN2
C19 1u 6
+
RIN2
4 3 D
D
C18 1u +
LIN2
JP5
R1 2.2k
SPP
MPWR
Dynamic
3 4
EXT
SPKP
R2 2.2k
J4 SPK-JACK
6
SPK1 020S16
CN1 J5 LIN1/RIN1 C
JP3 RIN1
6
P
C3 1u
2 C
+
RIN1
4 3
1
C2 1u +
JP2 LIN1
N LIN1 JP4 SPN
Dynamic EXT
SPKN
C21 1u
R23 220
+
B
B
J6 LOUT/ROUT 6
ROUT R24 20k
C20 1u
4 3
+
R21 220
LOUT R22 20k
A
A
Title
- 42 -
Size
A3 Date: A
B
C
D
AKD4649-B Document Number
Rev
Input/Output
Thursday, August 14, 2008
Sheet E
0 2
of
5
A
B
C
D
E
VCC
1
4114_REG L1 47u
GND OUT
2 1
TORX141
C27 10u + C29 10u
C28 0.1u
R25 470
IN
4114_REG
C30 0.1u
C22 47u
+
4114_REG
E
4649_AVDD
OUT 1
3
+
VCC
C23 0.1u
C24 0.1u
L2 10u 2
PORT1
GND
2
E
SVDD T1 TA48033F
D3V
C31 0.47u
C25 0.1u
R26 18k
for 74HC14
1
38
37
U3A 74HC14
INT1
R
AVDD
39
40 VCOM
AVSS
41
42 RX0
43 NC
44 RX1
45 TEST1
47
46 RX2
D
NC
RX3
U2
48
D3V
IPS0
INT0
36
1
D
14 2 7
R27 1k
LED1 K
A
D3V
ERF D3V
2
NC
OCKS0
35
3
DIF0
OCKS1
34
4
TEST2
CM1
33
5
DIF1
CM0
32
6
NC
PDN
31
XTI
30
R38 47k
R28 47k
AK4114
C
4114_PDN C
TEST1
C32 5p
DIF2
8
IPS1
XTO
29
9
P/SN
DAUX
28
10
XTL0
MCKO2
27
11
XTL1
BICK
26
DIR_BICK
12
VIN
SDTO
25
DIR_SDTO
1
7
C33 5p
2
X1 11.2896MHz
SDTO
A
IN VCC
3 2
GND
1
TOTX141
LRCK 24
MCKO1
DIR_LRCK
DIR_MCLK
C36 10u
C37 10u
D3V PORT2
23
22
DVSS
DVDD 21
C35 0.1u +
20
VOUT
UOUT 19
COUT 18
BOUT 17
TX1 16
15
DVSS 14
C34 0.1u +
13
TX0
B
TVDD
B
R29 5.1 4114_REG
A
C38 0.1u
Title
- 43 -
Size
A3 Date: A
B
C
D
AKD4649-B Document Number
Rev
DIR/DIT
Monday, September 08, 2008
Sheet E
0 3
of
5
A
B
C
D
E
U4 3
A1
B1
21
4
A2
B2
20
LRCK
5
A3
B3
19
SDTI
6
A4
B4
18
7
A5
B5
17
8
A6
B6
16
9
A7
B7
15
10
A8
B8
14
E
MCKI
JP6BICK2
BICK
JP7LRCK2
3-wire CDTI/SDA
I2C
JP12
CCLK
E
JP8 LRCK DIR_LRCK
CSN/CAD0 D3V
PDN D3V C39 0.1u
D
1
VCCA
VCCB
2
DIR
VCCB
24 23
C54
11
GND
OE
22
0.1u
12
GND
GND
13
D
74AVC8T245
JP9 MCLK
C
D3V
PORT4 10 8 6 4 2
9 7 5 3 1
R30
10k
R33
10k
R35
10k
CSN SCL/CCLK SDA/CDTI
R31 R32 R34
JP10 BICK
470 470 470
C
DIR_MCLK MCLK BICK LRCK SDTI VCC
DIR_BICK
PORT3 1 3 5 7 9
2 4 6 8 10
DSP R36
JP13 CAD0
D3V 10k
CTRL
ADC
SDTO
B
B
JP11 SDTI DIR_SDTO
DIR D3V K
D3V R37 10k
U3B 74HC14
A
D3 HSU119
3
5
U3C 74HC14 14 6 7
4114_PDN
1
H 3
L
14 4 7
SW1 PDN
C40 0.1u
A
2
A
Title
- 44 -
Size
A3 Date: A
B
C
D
AKD4649-B Document Number
Rev
LOGIC
Tuesday, August 26, 2008
0 Sheet E
4
of
5
- 45 -
- 46 -
- 47 -
- 48 -
- 49 -
- 50 -
