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A pp li c at i on N ot e , R ev . 1 . 2 , J an ua ry 2 00 8 A p p li c a t i o n N o t e N o . 1 3 6 L o w C o s t , 3 V ol t , + 1 4 d B m 2 .3 3 G H z S D A R S A c t i v e A nt e n n a 2n d S t a g e L ow N oi s e A m p l i f i e r u s i n g th e I n f i ne o n B F P 6 4 0 S i G e T r a n s i s to r R F & P r o t e c ti o n D e v i c e s Edition 2008-01-07 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2009. All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Application Note No. 136 Application Note No. 136 Revision History: 2008-01-07, Rev. 1.2 Previous Version: 2004-11-12, Rev. 1.1 Page Subjects (major changes since last revision) All Small changes in figure descriptions Application Note 3 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low 1 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Noise Amplifier using the Infineon BFP640 SiGe Transistor Overview The Silicon-Germanium BFP640 SiGe Low Noise Transistor is shown in an SDARS active antenna LNA application. The BFP640 is targeted for the 2nd stage in a 3 stage SIRIUS LNA chain. The demo board is standard FR4 material and "0402" case sizes components are used throughout. A total of approximately 41 mm² of PCB area is required, and the total component count, including the BFP640 and all passives, is 12. SDARS Active Antenna LNA 2320 - 2332.5 MHz (SIRIUS, 3 Stages) &RPELQHG6DWHOOLWH&LUFXODU3RODUL]DWLRQ 7HUUHVWULDO$QWHQQD/LQHDU3RODUL]DWLRQ ,QILQHRQ %)3%)3) ,QILQHRQ %)3 %DQGSDVV)LOWHU ,QILQHRQ %)3 &RD[&DEOH $SSUR[G% ORVV * G% ,'&  P$ 1) G% 3G%  G%P#9P$ 3G%  G%P#9P$ * G% ,'&  P$ 1) G% 3G% G%P $1BRYHUYLHZB6'$56BDFWLYHBDQWHQQDB/1$YVG Figure 1 Overview of SDARS Active Antenna LNA Summary Achieved 16.8 dB gain, 1.3 dB Noise Figure over the 2320 - 2345 MHz band, drawing 23.6 mA @ 3.0 V. Noise figure result does NOT "back out" FR4 PCB losses - if PCB loss at LNA input were extracted, Noise Figure result would be approximately 0.1 - 0.2 dB lower. Amplifier is unconditionally stable from 5 MHz to 6 GHz. Output P1dB = +13.7 dBm @ 3 V. Input 3rd Order Intercept = +13.01 dBm @ 2332 MHz, Output IP3 = +29.8 dBm. Application Note 4 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low PCB Cross - Section Diagram 7+,663$&,1*&5,7,&$/ 723/$<(5 LQFKPP ,17(51$/*5281'3/$1( LQFKPP" /$<(5)250(&+$1,&$/5,*,',7<2)3&%7+,&.1(66+(5(127 &5,7,&$/$6/21*$6727$/3&%7+,&.1(66'2(6127(;&((' ,1&+PP63(&,),&$7,21)25727$/3&%7+,&.1(66 ,1&+PPPP %27720/$<(5 Figure 2 $1B3&%YVG PCB - Cross Sectional Diagram Schematic Diagram 9FF  9 - '&&RQQHFWRU , P$ 5 RKPV 5 . & S) & S) 5 RKPV / %ODFNUHFWDQJOHVDUHPLFURVWULS Q+ WUDFNVQRWFKLSFRPSRQHQWV - 5),1387 & X) 4 %)36L*H 7UDQVLVWRU 627 RKPPLFURVWULS / Q+ & S) & S) - 5)287387 RKPPLFURVWULS 3&% 5HY$ 3&%RDUG0DWHULDO 6WDQGDUG)5 & S) %)39FH 9 ,QGXFWLYH(PLWWHU'HJHQHUDWLRQ0LFURVWULS IRU,3 LPSURYHPHQW5)PDWFKLQJ :LGWK LQFKPP /HQJWK LQFKPP Figure 3 $1B6FKHPDWLFYVG Schematic Diagram Application Note 5 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Summary of Data T = 25 °C, Network analyzer source power = -25 dBm Table 1 Summary of Data Parameter Result Comments Frequency Range Under 2320 - over 2345 MHz Covers both XM Radio and SIRIUS frequency bands. DC Current 23.6 mA @ 3.0 V Note power supply voltage is measured directly across PCB supply line and ground, to eliminate voltage drop across wire harness. Gain 16.9 dB @ 2320 MHz 16.8 dB @ 2332.5 MHz 16.8 dB @ 2345 MHz Negligible change in gain or matching at 3.3 or 3.0 volts. Noise Figure 1.3 dB @ 2320 MHz 1.3 dB @ 2332.5 MHz 1.4 dB @ 2345 MHz These values do not extract PCB losses, etc. resulting from FR4 board an passives used on PCB these results are at input SMA connector. Input P1dB -2.1 dBm @ 3.0 V Measured @ 2332.5 MHz. See Figure 8 Output P1dB +13.7 dBm @ 3.0 V See Figure 8 Power Added Efficiency (PAE) at 1 dB Compression Point 32.2% @ 3.0 V PAE = (POUT - PIN) / (VCC x IC) Decent results for a “Class A” amplifier. Input 3rd Order Intercept +13.0 dBm @ 2332 MHz Measured at 3.3 V, see Figure 15 and Figure 16 Output 3rd Order Intercept +29.8 dBm @ 2332 MHz Measured at 3.3 V, see Figure 15 and Figure 16 Input Return Loss 17.8 dB @ 2320 MHz 18.1 dB @ 2332.5 MHz 15.5 dB @ 2345 MHz Output Return Loss 14.6 dB @ 2320 MHz 14.2 dB @ 2332.5 MHz 13.9 dB @ 2345 MHz Reverse Isolation 21.7 dB @ 2320 MHz 21.6 dB @ 2332.5 MHz 21.6 dB @ 2345 MHz Application Note 6 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Noise Figure, Plot, 2232.5 MHz to 2432.5 MHz, Center of Plot (x-axis) is 2332.5 MHz. 5RKGH 6FKZDU])6(. 1RY 1RLVH)LJXUH5DXVFKPHVVXQJ (871DPH 0DQXIDFWXUHU 2SHUDWLQJ&RQGLWLRQV 2SHUDWRU1DPH 7HVW6SHFLILFDWLRQ &RPPHQW %)3*+]6'$56$FWLYH$QWHQQD/1$QG6WDJH ,QILQHRQ7HFKQRORJLHV 9 9, P$7 & *HUDUG:HYHUV /:5B6'B/1$B3 3&% 5HY$ 1RYHPEHU $QDO\]HU 5)$WW 5HI/YO G% G%P 5%: 0+] 9%: +] 5DQJH G% 5HI/YODXWR 21 0RGH 'LUHFW (15 +3$(15 0HDVXUHPHQW QGVWDJHFRUU 21 1RLVH)LJXUHG%            0+] 0+]',9 0+] $1BSORWBQIYVG Figure 4 Noise Figure Application Note 7 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Noise Figure, Tabular Data From Rohde & Schwarz FSEK3 + FSEB30 System Preamplifier = MITEQ SMC-02 Table 2 Noise Figure Frequency Noise Figure 2232.5 MHz 1.34 dB 2245 MHz 1.34 dB 2257.5 MHz 1.38 dB 2270 MHz 1.34 dB 2282.5 MHz 1.34 dB 2295 MHz 1.33 dB 2307.5 MHz 1.33 dB 2320 MHz 1.34 dB 2332.5 MHz 1.29 dB 2345 MHz 1.36 dB 2357.5 MHz 1.34 dB 2370 MHz 1.31 dB 2382.5 MHz 1.31 dB 2395 MHz 1.32 dB 2407.5 MHz 1.32 dB 2420 MHz 1.35 dB 2432.5 MHz 1.31 dB 2442.5 MHz 1.31 dB Application Note 8 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Scanned Image of PC Board Figure 5 Image of PC Board Application Note 9 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Scanned Image of PC Board, Close-In Shot. Total PCB area used ≅ 41 mm² Figure 6 Image of PC Board, Close-In Shot Application Note 10 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Stability Factor “K” and Stability Measure “B1” (5 MHz - 6 GHz) Plots are generated from real, measured S parameters taken from the demo PC board, NOT a simulation. S parameters are exported from Network Analyzer, then imported into Eagleware GENESYS software, which calculates and plots K and B1. Note K > 1 and B1 > 0, showing unconditional stability. K is trace in red color (bottom trace) and is assigned to left vertical axis at bottom of page. Note K > 1. “Glitch" at low frequencies e.g. < 200 MHz is due to lack of dynamic range in network analyzer - S parameter S12 becomes vanishingly small as one moves lower in frequency, which causes expression for calculating "K" to "blow up”. B1 is trace is blue in color (top trace) and is assigned to right vertical. Figure 7 Plot of K(f) and B1(f) Application Note 11 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Gain Compression Test VCC = 3.0 V Network Analyzer is set to "CW" mode - e.g. set to a single frequency, with power sweep. Input power is swept from -25 dBm to +3 dBm at 2332.5 MHz.Amplifier hits Input 1 dB compression point (IP1dB) at - 2.1 dBm input power. Output P1dB = - 2.1 dBm + 15.8 dB gain at P1dB point => +13.7 dBm, or 23.4 mW. &+ 6  ORJ0$* G% 5()G% 1RY BG% G%P 35P BG% G%P &RU 'HO 6PR  67$57G%P  &:0+] 6723G%P $1BSORWBJDLQBFRPSBWHVWYVG Figure 8 Plot of Gain Compression Test Application Note 12 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Input Return Loss, Log Mag 5 MHz - 6 GHz &+ 6  ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 6PR   67$570+] 67230+] $1BSORWBLQSXWBUHWXUQBORVVYVG Figure 9 Plot of Input Return Loss Application Note 13 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Input Return Loss, Smith Chart Reference Plane = Input SMA Connector on PC Board 5 MHz - 6 GHz &+ 6  8)6 B 1RY  S+ 0+] 35P B  *+] &RU B  *+] 'HO 6PR   67$570+] 67230+] $1BVPLWKBLQSXWBUHWXUQBORVVYVG Figure 10 Smith Chart of Input Return Loss Application Note 14 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Forward Gain, Wide Sweep 5 MHz - 6 GHz &+ 6  ORJ0$* G% 5()G% 1RY BG% 0+] 35P &RU  BG% *+]  BG% *+] 'HO 6PR 67$570+] 67230+] $1BSORWBIZBJDLQYVG Figure 11 Plot of Forward Gain Application Note 15 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Reverse Isolation 5 MHz - 6 GHz &+ 6  ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 6PR   67$570+] 67230+] $1BSORWBUHYHUVHBLVRODWLRQYVG Figure 12 Plot of Reverse Isolation Application Note 16 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Output Return Loss, Log Mag 5 MHz - 6 GHz &+ 6  ORJ0$* G% 5()G% 1RY BG% 0+] 35P BG% *+] &RU BG% *+] 'HO 6PR   67$570+] 67230+] $1BSORWBRXWSXWBUHWXUQBORVVYVG Figure 13 Plot of Output Return Loss Application Note 17 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Output Return Loss, Smith Chart Reference Plane = Output SMA Connector on PC Board 5 MHz - 6 GHz &+ 6  8)6 1RY  S) B 0+] 35P B  *+] &RU B  *+] 'HO 6PR   67$570+] 67230+] $1BVPLWKBRXWSXWBUHWXUQBORVVYVG Figure 14 Smith Chart of Output Return Loss Application Note 18 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Two-Tone Test, 2332 MHz Input Stimulus for Amplifier Two-Tone Test. f1 = 2332 MHz, f2 = 2333 MHz, -19 dBm each tone. $1BSORWBWZRBWRQHBLQSXWYVG Figure 15 Tow-Tone Test, Input Stimulus @ 2332 MHz Application Note 19 Rev. 1.2, 2008-01-07 Application Note No. 136 Low Cost, 3 Volt, +14 dBm 2.33 GHz SDARS Active Antenna 2nd Stage Low Two-Tone Test, 2332 MHz LNA Response to Two-Tone Test. Input IP3 = -19 + (64.0 / 2) = +13.0 dBm Output IP3 = +13.0 dBm + 16.8 dB gain = +29.8 dBm $1BSORWBWZRBWRQHBUHVSRQVHYVG Figure 16 Tow-Tone Test, LNA Response @ 2332 MHz Application Note 20 Rev. 1.2, 2008-01-07