Transcript
AO4306 30V N-Channel MOSFET
General Description
Product Summary
The AO4306 uses advanced trench technology to provide excellent RDS(ON) with low gate charge. This device is suitable for high side switch in SMPS and general purpose applications.
ID (at VGS=10V)
VDS
30V 13A
RDS(ON) (at VGS=10V)
< 11.5mΩ
RDS(ON) (at VGS = 4.5V)
< 15.5mΩ
100% UIS Tested 100% Rg Tested
SOIC-8 D Top View D D
Bottom View
D D G
G S
S
S S
Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage
VGS TA=25°C
Continuous Drain Current C
Units V
±20
V
13
ID
TA=70°C
Maximum 30
10.4
A
IDM
100
Avalanche Current C
IAS
22
A
Avalanche energy L=0.1mH C TA=25°C
EAS
24
mJ
Pulsed Drain Current
Power Dissipation B
Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead
Rev.1.0: October 2014
3.1
PD
TA=70°C
TJ, TSTG
Symbol t ≤ 10s Steady-State Steady-State
W
2
RθJA RθJL
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-55 to 150
Typ 31 59 16
°C
Max 40 75 24
Units °C/W °C/W °C/W
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Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol
Parameter
STATIC PARAMETERS Drain-Source Breakdown Voltage BVDSS IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS ID=250µA
1.5
ID(ON)
On state drain current
VGS=10V, VDS=5V
100
VGS=10V, ID=12A TJ=125°C VGS=4.5V, ID=10A gFS
Forward Transconductance
VDS=5V, ID=12A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
±100
nA
1.9
2.5
V
9.5
11.5
14
17
12.5
15.5
mΩ
1
V
4
A
A
45 0.75
DYNAMIC PARAMETERS Ciss Input Capacitance Coss
µA
5
VGS(th)
VGS=0V, VDS=15V, f=1MHz 0.8
mΩ
S
760
pF
125
pF
70 VGS=0V, VDS=0V, f=1MHz
Units V
1 TJ=55°C
Static Drain-Source On-Resistance
Max
30
VDS=30V, VGS=0V
IGSS
RDS(ON)
Typ
1.6
pF 2.4
Ω
SWITCHING PARAMETERS Qg(10V) Total Gate Charge
14
25
nC
Qg(4.5V) Total Gate Charge
6.6
12
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
VGS=10V, VDS=15V, ID=12A
VGS=4.5V, VDS=15V, ID=12A
VGS=10V, VDS=15V, RL=1.25Ω, RGEN=3Ω
2.4
nC
3
nC
2.4
nC
3
nC
4.4
ns
9
ns
17
ns
6
ns
IF=12A, dI/dt=500A/µs
7
Body Diode Reverse Recovery Charge IF=12A, dI/dt=500A/µs
8
ns nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.1.0: October 2014
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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 100
30
6V
10V
VDS=5V 5V
80
25
7V 20
4.5V ID(A)
ID (A)
60 4V
15
40 10
125°C
3.5V
20
5 VGS=3V
0 0
1
2
3
4
25°C
0 1
5
18
2
2.5
3
3.5
4
Normalized On-Resistance
1.8
16 RDS(ON) (mΩ)
1.5
VGS(Volts) Figure 2: Transfer Characteristics (Note E)
VDS (Volts) Fig 1: On-Region Characteristics (Note E)
VGS=4.5V
14 12 10
VGS=10V
8
VGS=10V ID=12A
1.6 1.4
17 5 2 VGS=4.5V 10
1.2
ID=10A
1 0.8
6 0
5
0
10
15 20 25 30 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E)
25
50
75
100
125
150
175
0 Temperature (°C) Figure 4: On-Resistance vs. Junction 18Temperature (Note E)
30
1.0E+02 ID=12A 1.0E+01
25
40
1.0E+00 125°C IS (A)
RDS(ON) (mΩ)
20 15 10
1.0E-01
125°C
1.0E-02 25°C
1.0E-03 25°C
5
1.0E-04 1.0E-05
0 2
4
6
8
10
VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E)
Rev.1.0: October 2014
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts) Figure 6: Body-Diode Characteristics (Note E)
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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 10
1200 VDS=15V ID=12A
1000 Capacitance (pF)
VGS (Volts)
8
6
4
2
Ciss 800 600 400 Coss 200
0 0
3
6 9 12 Qg (nC) Figure 7: Gate-Charge Characteristics
15
0
100
5
10 15 20 25 VDS (Volts) Figure 8: Capacitance Characteristics
30
1000.0 TA=25°C
IAR (A) Peak Avalanche Current
Crss
0
TA=100°C 100.0
ID (Amps)
TA=150°C 10 TA=125°C
10.0
10
100
1000
1ms 10ms 100ms 10s
TJ(Max)=150°C TA=25°C
0.0 0.01
1
100µs
1.0 0.1
1
10µs RDS(ON) limited
DC
0.1
1
10
100
VDS (Volts)
Time in avalanche, tA (µs) Figure 9: Single Pulse Avalanche capability (Note C)
Figure 10: Maximum Forward Biased Safe Operating Area (Note F)
1000 TA=25°C
Power (W)
100
10
1 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s) Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
Rev.1.0: October 2014
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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
ZθJA Normalized Transient Thermal Resistance
10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1
In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=75°C/W
0.1 PD 0.01
0.001 0.00001
Single Pulse
0.0001
0.001
Ton
0.01
0.1
1
T
10
100
1000
Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: October 2014
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Gate Charge Test Circuit & Waveform Vgs Qg 10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT Vgs Ig
Charge
Resistive Switching Test Circuit & Waveforms RL Vds Vds 90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT Vgs
Vgs
Diode Recovery Test Circuit & Waveforms Q rr = - Idt
Vds + DUT
Vds -
Isd Vgs
Ig
Rev.1.0: October 2014
Vgs
L
Isd
+ Vdd
t rr
dI/dt I RM Vdd
VDC
-
IF
Vds
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