Transcript
AO4476A 30V N-Channel MOSFET
General Description
Product Summary
The AO4476A combines advanced trench MOSFET technology with a low resistance package to provide extremely low RDS(ON). This device is suitable for use as a high side switch in SMPS and general purpose applications.
VDS
30V 15A
ID (at VGS=10V) RDS(ON) (at VGS=10V)
< 7.7mΩ
RDS(ON) (at VGS = 4.5V)
< 10.8mΩ
100% UIS Tested 100% Rg Tested
D
SOIC-8 D
G
G S
S Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage
VGS TA=25°C
Continuous Drain Current C
Units V
±20
V
15
ID
TA=70°C
Maximum 30
12
A
IDM
110
Avalanche Current C
IAS, IAR
27
A
Avalanche energy L=0.1mH C TA=25°C
EAS, EAR
36
mJ
Pulsed Drain Current
Power Dissipation B
Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead
Rev1: September 2010
3.1
PD
TA=70°C
TJ, TSTG
Symbol t ≤ 10s Steady-State Steady-State
W
2
RθJA RθJL
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-55 to 150
Typ 31 59 16
°C
Max 40 75 24
Units °C/W °C/W °C/W
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AO4476A
Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol
Parameter
STATIC PARAMETERS Drain-Source Breakdown Voltage BVDSS IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V TJ=55°C
Gate-Body leakage current
VDS=0V, VGS= ±20V VDS=VGS ID=250µA
1.5
ID(ON)
On state drain current
VGS=10V, VDS=5V
110
100
nA
1.98
2.5
V
6.4
7.7
10
12
VGS=4.5V, ID=12A
8.6
10.8
mΩ
45 1
V
4
A
VGS=10V, ID=15A Static Drain-Source On-Resistance
TJ=125°C
gFS
Forward Transconductance
VDS=5V, ID=15A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS Ciss Input Capacitance Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
µA
5
Gate Threshold Voltage
Units V
1
IGSS
Coss
Max
30
VDS=30V, VGS=0V
VGS(th)
RDS(ON)
Typ
A
0.74
mΩ
S
920
1150
1380
pF
VGS=0V, VDS=15V, f=1MHz
125
180
235
pF
60
105
150
pF
VGS=0V, VDS=0V, f=1MHz
0.55
1.1
1.65
Ω
SWITCHING PARAMETERS Qg(10V) Total Gate Charge
16
20
24
nC
Qg(4.5V) Total Gate Charge
7.6
9.5
11.4
nC
2
2.7
3.2
nC
3
5
7
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
VGS=10V, VDS=15V, ID=15A
VGS=10V, VDS=15V, RL=1Ω, RGEN=3Ω
6.5
ns
2
ns
17
ns
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=15A, dI/dt=500A/µs
7
3.5 8.7
10.5
ns
Qrr
Body Diode Reverse Recovery Charge IF=15A, dI/dt=500A/µs
11
13.5
16
ns nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev1: September 2010
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AO4476A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 100
110 10V
100
5V
VDS=5V
90 70
80
60
4V
60 ID(A)
ID (A)
4.5V 6V
80
50
40
40
3.5V
30
125°C
10
VGS=3V
0 0
1
2 3 4 VDS (Volts) Fig 1: On-Region Characteristics (Note E)
0 0.5
5
1
1.5
2
2.5
3
3.5
4
4.5
5
VGS(Volts) Figure 2: Transfer Characteristics (Note E)
1.8
10
Normalized On-Resistance
12
RDS(ON) (mΩ Ω)
25°C
20
20
VGS=4.5V
8 6 VGS=10V 4 2
VGS=10V ID=15A
1.6 1.4
17 5 VGS=4.5V ID=12A 2 10
1.2 1 0.8
0
5
10
15 20 25 30 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E)
0
25
25
50
75 100 125 150 175 Temperature (°C) 0 Figure 4: On-Resistance vs. Junction Temperature 18 (Note E)
1.0E+02 ID=15A
1.0E+01
20
40
15 125°C 10
IS (A)
RDS(ON) (mΩ Ω)
1.0E+00 1.0E-01
125°C
25°C
1.0E-02 1.0E-03
5 25°C
1.0E-04 1.0E-05
0 2
4
6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E)
Rev1: September 2010
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts) Figure 6: Body-Diode Characteristics (Note E)
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AO4476A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 10
1600 VDS=15V ID=15A
8
1400 Ciss
Capacitance (pF)
VGS (Volts)
1200 6
4
1000 800 600 400
2
Coss 200
0
5
10 15 Qg (nC) Figure 7: Gate-Charge Characteristics
0
20
5
10 15 20 25 VDS (Volts) Figure 8: Capacitance Characteristics
30
1000.0
70 TA=25°C
60
100.0
50
TA=150°C TA=100°C
40 30
ID (Amps)
IAR (A) Peak Avalanche Current
Crss
0
0
10.0
10µs RDS(ON) limited
100µs 1ms
1.0
10ms 20
TA=125°C
TJ(Max)=150°C TA=25°C
0.1
10
10s DC
0.0
0
0.01
0.000001
0.00001 0.0001 0.001 Time in avalanche, tA (s) Figure 9: Single Pulse Avalanche capability (Note C)
0.1
1 10 VDS (Volts) Figure 10: Maximum Forward Biased Safe Operating Area (Note F)
100
10000 TA=25°C
Power (W)
1000
100
10
1 0.00001
0.001
0.1
10
1000
Pulse Width (s) Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
Rev1: September 2010
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AO4476A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Zθ JA Normalized Transient Thermal Resistance
10
1
D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA
In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=75°C/W
0.1 PD
0.01
Single Pulse Ton
T
0.001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Rev1: September 2010
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AO4476A
Gate Charge Test Circuit & Waveform Vgs Qg 10V
+ + Vds
VDC
-
Qgs
Qgd
VDC
-
DUT Vgs Ig
Charge
Resistive Switching Test Circuit & Waveforms RL Vds Vds 90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT Vgs
Vgs
Diode Recovery Test Circuit & Waveforms Q rr = - Idt
Vds + DUT
Vds Isd Vgs Ig
Rev1: September 2010
Vgs
L
Isd
+ Vdd
t rr
dI/dt I RM Vdd
VDC
-
IF
Vds
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