Transcript
AON7403 30V P-Channel MOSFET
General Description
Product Summary
The AON7403 uses advanced trench technology to provide excellent RDS(ON), and ultra-low low gate charge with a 25V gate rating. This device is suitable for use as a load switch or in PWM applications.
VDS ID (at VGS=-10V)
-30V -29A
RDS(ON) (at VGS=-10V)
< 18mW
RDS(ON) (at VGS=-5V)
< 36mW
100% UIS Tested
DFN 3x3_EP Bottom View
Top View
D
Top View S S S
1
8
D
2
7
3
6
D D
G
4
5
D
G
Pin 1
S
Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current
VGS TC=25°C
Pulsed Drain Current C Continuous Drain Current
V A
-80 -11
IDSM
TA=70°C
±25 -18
IDM TA=25°C
Units V
-29
ID
TC=100°C
Maximum -30
A
-8.5
Avalanche Current C
IAR
24
A
Repetitive avalanche energy L=0.1mH C
EAR
29
mJ
TC=25°C Power Dissipation B
TA=25°C Power Dissipation A
Junction and Storage Temperature Range
Rev.4.0: November. 2013
4.1
Steady-State Steady-State
RqJA RqJC
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W
2.6
TJ, TSTG
Symbol t ≤ 10s
W
10
PDSM
TA=70°C
Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead
25
PD
TC=100°C
-55 to 150
Typ 22 47 4.2
°C
Max 30 60 5
Units °C/W °C/W °C/W
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Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol
Parameter
STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage
Conditions
Min
ID=-250mA, VGS=0V
-30
Typ
-1
Zero Gate Voltage Drain Current
IGSS VGS(th)
Gate-Body leakage current
VDS=0V, VGS= ±25V
Gate Threshold Voltage
VDS=VGS ID=-250mA
-1.7
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-80
TJ=55°C
VGS=-10V, ID=-8A
-5 100
nA
-3
V
14
18
20
25 36
A
Static Drain-Source On-Resistance VGS=-5V, ID=-5A
26
gFS
Forward Transconductance
VDS=-5V, ID=-8A
20
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
-0.7
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS Ciss Input Capacitance Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
1130 VGS=0V, VDS=-15V, f=1MHz
mA
-2.2
RDS(ON)
TJ=125°C
Units V
VDS=-30V, VGS=0V
IDSS
Coss
Max
mW mW S
-1
V
-22
A
1400
pF
240
pF
155
pF
VGS=0V, VDS=0V, f=1MHz
5.8
8
W
18
24
nC
VGS=-10V, VDS=-15V, ID=-8A
5.5
nC
SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qgs
Gate Source Charge
Qgd
Gate Drain Charge
3.3
nC
tD(on)
Turn-On DelayTime
8.7
ns
tr
Turn-On Rise Time
8.5
ns
tD(off)
Turn-Off DelayTime
18
ns
tf trr
Turn-Off Fall Time
7
ns
IF=-8A, dI/dt=500A/ms
12
Qrr
Body Diode Reverse Recovery Charge IF=-8A, dI/dt=500A/ms
26
Body Diode Reverse Recovery Time
VGS=-10V, VDS=-15V, RL=1.8W, RGEN=3W
16
ns nC
A. The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R qJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RqJA is the sum of the thermal impedence from junction to case RqJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300ms pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. G. The maximum current rating is package limited. H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.4.0: November. 2013
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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 80
80
-10V
VDS=-5V
-8V -6V 60
-ID(A)
-ID (A)
60
40
40
-4.5V
125°C 20
20
25°C
VGS=-4V 0
0 0
1
2
3
4
1
5
40
3
4
5
6
Normalized On-Resistance
1.6
35 VGS=-5V RDS(ON) (mW)
2
-VGS(Volts) Figure 2: Transfer Characteristics (Note E)
-VDS (Volts) Fig 1: On-Region Characteristics (Note E)
30 25 20 VGS=-10V 15 10
VGS=-10V ID=-8A
1.4
17 5 2 10
1.2
1
VGS=-5V ID=-5A 0.8
0
5
10 15 20 -ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E)
0
25
50
75
100
125
150
175
Temperature (°C) 0 Figure 4: On-Resistance vs. Junction 18Temperature (Note E)
50
1.0E+01 ID=-8A 1.0E+00 40 125°
-IS (A)
RDS(ON) (mW)
40
30
1.0E-01
125° 25°
25°
1.0E-02
20
1.0E-03
10 2
4
6
8
10
-VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E)
Rev.4.0: November. 2013
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts) Figure 6: Body-Diode Characteristics (Note E)
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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 1600
10 VDS=-15V ID=-8A
1400 Ciss
1200 Capacitance (pF)
-VGS (Volts)
8
6
4
1000 800 600 Coss
400 2 200 0
Crss
0 0
5
10 15 Qg (nC) Figure 7: Gate-Charge Characteristics
20
1000.0
0
5 10 15 20 25 -VDS (Volts) Figure 8: Capacitance Characteristics
30
10000 TA=25°
100.0
10ms 100ms 1ms
1.0
DC TJ(Max)=150°C TA=25°C
0.1
0.0 0.01
100ms 10s
0.1
1 10 -VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F)
10 ZqJA Normalized Transient Thermal Resistance
10ms
1
Power (W)
-ID (Amps)
1000
RDS(ON)
10.0
100
10
1 0.00001
100
0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
D=Ton/T TJ,PK=TA+PDM.ZqJA.RqJA
In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RqJA=60°C/W
0.1 PD 0.01
Ton Single Pulse
0.001 0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.4.0: November. 2013
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Gate Charge Test Circuit & Waveform Vgs Qg -10V
-
-
VDC
+
VDC
Qgs
Vds
Qgd
+
DUT Vgs Ig
Charge
Resistive Switching Test Circuit & Waveforms RL Vds
toff
ton
Vgs
-
DUT
Vgs
td(on)
td(off)
tr
tf
90%
Vdd
VDC
+
Rg
Vgs
10% Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 2
L
EAR= 1/2 LIAR
Vds Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS Vdd Id I AR
DUT Vgs
Vgs
Diode Recovery Test Circuit & Waveforms Q rr = - Idt
Vds + DUT Vgs
Vds Isd Vgs Ig
Rev.4.0: November. 2013
L
-Isd
+ Vdd
t rr
dI/dt -I RM Vdd
VDC
-
-I F
-Vds
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