复件 Bm501613lf_0801 - Ky Thuat Phan Cung

Transcript

5 4 3 2 GUAM S1G4 SCHEMATIC DESIGN PRELIMINARY DDR III, 1333MT/S HDT UNBUFFERED DDR3 NEAR SODIMM 18,19 Channel A 16 Channel B SCAN 16 EXTERNAL CLOCK GENERATOR D 1 Optional CPU Temperature sensor 16 UNBUFFERED DDR3 FAR SODIMM 18,19 AMD S1G4 CPU D SLG8LP625 20 SB-TSI IN OUT 14,15,16,17 16 HyperTransport LINK0 16x16 LVDS CON LVDS MUX 43 RS880M HyperTransport LINK0 CPU I/F X16 PCIE MUX PARK_XT_S3 31--40 DX10 IGP LVDS/TVOUT/TMDS VGA CON CRT MUX 44 C I2C I/F DISPLAY PORT X2 Side Port Memory Ambient Light Sensor BOOTSTRAPS ROM(NB) 24 52 C 1 X16 PCIE I/F 1 X4 PCIE I/F WITH SB 6 X1 PCIE I/F GPP PCIE INTERFACE 21,22,23,24,25 LAN&CARDREADER JMC261 PCIE 48 X4 USB 2.0 MINIPCIE WIFI 47 AZALIA CODEC CX20671 42 HD AUDIO I/F SB820M GPP INTERFACE USB#4 USB2.0 (14)+1.1(2) SATA III (6 PORTS) SIM card socket MINIPCIE USB#8 49 USB 2.0 4 X1 PCIE GEN2 I/F SATA III I/F INT. CLK GEN. B Mobile 2.5" HDD 41 GB MAC Bluetooth USB#7 45 Finger Print Reader USB#6 45 CAM USB#5 45 USB#3 USB#1 46 46 USB#0 46 USB 2.0 Mobile ODD 41 B HW MONITOR PCI/PCI BDGE HW MONITOR I/F INT. RTC HW MONITOR 28 CPU Tempreture Sensor 26,27,28,29 EC HD AUDIO SPI I/F LPC I/F SPI ROM 28 SPI I/F I2C I/F ACPI 1.1 BATTERY CHAGER CPU CORE 7 A SYSTEM MAIN POWER 13 8 1V1DUAL/VLDT/ 10 VCC_NB/+1.1V CPU MEMORY POWER 9 DISCHARGE CIRCUIT 1.5V/1.5VDUAL/ 11 1.8V/3.3V/5V A SCANNED MATRIX KEYBOARD RESET,FAN & ENABLES 5 BOOTSTRAPS ROM (SB) 30 55 49 IT8502E EC PS2 TOUCH PAD 49 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 49 Title http://pc-120.taobao.com/ 4 3 2 BLOCK DIAGRAM Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 1 of 54 5 4 3 2 1 TABLE OF CONTENTS D D C C B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 TABLE OF CONTENTS Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 2 of 54 5 4 3 2 1 AMD S1G4 BATTERY 11.1V 62WHr BATTERY CHARGER ISL6251 +VIN AC ADAPTOR 15-16V 90W D CPU core PWM ISL6265A CPU_VDD_RUN@38A CPU core PWM ISL6265A CPU_VDDNB_RUN@4A CPU_VDDA_RUN CPU_VDDNB_RUN DDR3 PWM [email protected] LDO VTT TPS51128&RT9199GSP AOZ1024 PWM +5V +1V~1.2V SW +1.1V SW ISL6228 +1.1VDUAL@10A VLDT +VCC_NB_RUN +1.1V +1.1V +1.8V SW MAX8716-2/2 +1.8V [email protected] +VCC_NB VDDR +5V SW +3V SW +5V LDO +3V LDO tps51125 C +1.8V +3.3VALW +5VALW +1.5V +1.5V +3.3V +3.3VDUAL@8A +1.8V +5VDUAL@8A +3.3V +1.8V +1.1V VDDC PWM VDDC@15A MVDDQ +1.5V 4A SWITCH 1.1V_1.0V_PWR +3.3V +3.3VDUAL +1.1VDUAL +3.3VDUAL B SWITCH +3VRUN +1.1V VDDIO_GBE_S/2 SWITCH 1.8V_REG 1.5A VDDHTTX 1.2V 0.68A VDDHTRX+HT 1.1V 0.68A BEAD VDDPCIE 1.1V 1.1A BEAD VDDA18 1.8V 0.64A BEAD VDDG18 1.8V 0.005A BEAD VDD18_MEM 1.8V 0.005A BEAD VDD_MEM 1.8V 0.23A BEAD AVDD 3.3V 0.125A BEAD VDDLT18 0.22A BEAD VDDLT33 0A BEAD PLLs 1.8V 0.1A BEAD PLLs 1.1/1.2V 0.23A BEAD VDDAN_11_PCIE 1.1V 1A BEAD VDDPL_33_PCIE 3.3V 0.030A BEAD VDDAN_11_SATA 1.1V 0.8A BEAD VDDPL_33_SATA 3.3V 0.020A BEAD VDDAN_33_USB_S 3.3V 0.2A BEAD VDDAN_11_USB_S 1.2V 0.2A BEAD SWITCH SWITCH +1.1VDUAL +3.3V +3.3VDUAL SWITCH +3.3V +1.1V +3.3VDUAL +3.3V 2.5V LDO CPU_VDDA_RUN +3.3VDUAL +3.3VDUAL A +1.1V DUAL SWITCH +1.1V VDDC +3.3VDUAL +3.3VDUAL 5 1.5V LDO SWITCH S3,S4,S5 +1.5VDUAL SMSC1100--EC 3.3V 0.5A LCD PANEL SW 3.3V 1.5A C LED_BL +VIN +VDD_MAIN USB X2 FR +5VDUAL 5VDual MINI PCIE SLOT0,1,2 +1.5V 1.5V (S0, S1) 0.5A each 3.3V (S3, S5) 2.75A each +3.3VDUAL SATA HD0,1 B VDDAN_11_CLK 1.1V 0.4A +5V 5V (S3, S5) TBD SATA ODD +5V 5V (S0, S1) TBD VDDIO_GBE_S 3.3V VDDIO_33_S 3.3V VDDCR_11_S 1.1V BEAD VDDCD_11_USB 1.1V VDDIO_AZ_S 3.3V OR 1.5V BEAD VDDCR_11_USB_S 1.1V BEAD VDDPL_33_SYS 3.3V SYS PLL BEAD VDDPL_11_SYS 1.1 V SYS PLL BEAD VDDPL_33_USB_S 3.3 V USB PLL BEAD VDDAN_33_S 3.3V HWM BEAD VDDXL_33_S 3.3V A AMD SB800 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division MVDDQ 1.1V_1.0V_PWR PARK_XT_S3 Title 1.8V_REG +3VRUN http://pc-120.taobao.com/ 4 AUDIO OP BACK LIGHT VDDCR_11_GBE_S 1.1V +1.1VDUAL AZ_VDDIO_DUAL +5V 3V BEAD +3.3V VDDRF_GBE_S +1.1VDUAL +1.1VDUAL +5VDUAL 5V BEAD VDDIO_33_GBE_S 3.3V +3.3VDUAL +1.5V@1A BEAD +3.3VDUAL VDDG33 3.3V 0.06A PHY_VDDIO_DUAL CPU_VDDIO_SUS +3.3VDUAL VDDC 1.0V-1.1V 7.6A +3.3VDUAL +1.5V +3.3V VDDCR_11 1.1V 0.5A +1.1V +3.3VDUAL HD CODEC +5V VDDIO_18_FC 1.8V 0.050A +3.3V 2.6A 3.3V VDDIO_33_PCIGP 3.3V 0.020A +1.1V CPU_VDDIO_SUS BEAD AMD SB800 +1.1V SWITCH VTT_MEM 0.5A D VDDR 1.5A BEAD +1.8V CPU_VDDIO_SUS +3.3V VDD MEM TPDA BEAD +3.3V TPS51128 VDD MEM 4A CLOCK GEN VDDNB CORE 0.9V 4A RS880M +3.3V DDRiII SODIMMX2--SYSTEM VLDT 1.2V TPDA BEAD CPU_VDDIO_SUS CPU_VDDIO_SUS@9A MEM_VTT VDD CORE 1.375-1.500V 36A CPU_VDD_RUN VLDT CPU_VDDIO_SUS VCCA 2.5V 3 2 POWER DELIVERY CHART Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 3 of 54 5 4 3 2 1 Power on Sequence required: SB800: 1, +3.3VDUAL ramp before +1.1VDUAL 2, +3.3V ramp before +1.8v CPU_LDT_RST# (SB TO CPU) 3, +1.8V ramp before +1.1v 4, +3.3v ramp before +1.1v 5, +3.3VALW_R ramping down time > 300us 6, 50uS <= All power rails except +3.3VALW_R <= 40mS CPU_PWROK 7, 100uS <= +3.3VALW_R <= 40mS >1 mS (SB TO CPU) Req. CPU_CLKP/N RS880: 1, 0 <(+3.3V) - (+1.8v) < 2.1 2, +1.8V ramp before +1.1v 3. +1.1V ramp before VCC_NB running >1 mS Req. running D D >1 mS Req. SB OUTPUT VCC_NB(all NB power) valid before NB_PWRGD. NB_PWRGD NB_PWRGD_IN SB INPUT SB_PWRGD 1)+1.5V SWITCH TO +1.5VDUAL SLP_S3# 1V1DUAL_PWRGD SYS_RST# 1V5_PWRGD/DNI +1.2V_PWRGD KBC_GPIO77/DNI 2)LASSO_PWRON 3)LPCPD# for TPM 4) TO SB&KBC +1.2V_PWRGD PARK-XT_PGOOD T3>0 1.8V_REG T2>0 RC=~ms 1.1V_1.0V_PWR RC=~ms PCIE_REFCLKP/N VDD_CT T1>=0 RC=~ms VDDC RC=~ms MVDDQ RC=~22ms VCC_NB GROUP B C VCC_NB should not ramp before 1.1v RC=~4.7ms VLDT VRM_PWRGD AND 1V8_PWRGD +1.1V VRM_PWRGD C RC=0 CPU_VDDR RC=0 CPU_VDD_RUN RC=0 CPU_VDDNB_RUN GROUP A VDDA_PWRGD +2.5V_LDO (CPU_VDDA_2.5_RUN) +1.5V 1V8_PWRGD RC=0 +1.8V +5V/+3.3V 5V/3.3V_GATE to S3 SLP_S3# VDRAM_PWRGD CPU MEM CTL & DDR3 SODIMM PWRS MEM_VTT MEM_VREF VTT only will be shut down in S3 mode, and VTT for DDR3 SODIMM only. CPU_VDDIO_SUS SLP_S5# PWR_BTN#_EC B CPU_THM/SB/SB_SCL1/2 SB_KB/SPI/LPC ROM PWRS Power button from EC to SB 20mS delay B RSMRST# V3V5DUAL_PWRGD 1V1DUAL_PWRGD SYSTEM_DUAL_PG_DELAY DUAL RAILS +5VDUAL/+3.3VDUAL/+1.5VDUAL/+1.1VDUAL When IMC, always on at all time( always PWR) VDD_DUAL_EN Power button pressed KBC is ready KBC is powered by A_VBAT & +3.3VALW AC_OK (ACIN detect) Power button pressed AC not present scenario = LOW AC present= high +5VALW/+3.3VALW LDO:5.4V (from DCIN) +VIN/+12V_HD Battery inserted/AC IN A_VBAT A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 3 2 http://pc-120.taobao.com/ POWER SEQUENCE CHART Size D Document Number Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 4 of 54 5 4 3 2 EXTERNAL CLOCK MODE 1 NB CLOCK INPUT TABLE NB CLOCKS RS880M HT_REFCLKP 100M DIFF 14M SE (1.1V) REFCLK_N vref GFX_REFCLK NB_OSC GPPSB_REFCLK 100M DIFF * RS880M can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode. CLK_REQ in CLK GEN 25M Hz PCIE GFX PARK_XT(RS880M, 16 LANES) PARK_XT 25M_X1 EXT_PCIE_PE2_CLKREQ# EXTERNAL PCICLK0 PCI_CLK0 33MHZ FOR DEBUG PORT PCICLK1 SMSC_CLK 33MHZ STRAPS SETTING, PCIE GEN1/PCIE GEN2 PCICLK2 PCICLK3 PCICLK4 AMD SB800 200MHZ SIG4 CPU 25M_X2 PCIE_REFCLKP/N 100MHZ 27M Hz CPU_CLKP/N D NC or 100M DIFF OUTPUT 14.318MHZ GPP REF_CLK 100MHZ 100M DIFF(IN/OUT)* GPP_REFCLK HT_REFCLKP/N 100MHZ 100MHZ B_SODIMM AMD 100M DIFF REFCLK_P MEM_MB_CLK1_P/N MEM_MB_CLK2_P/N MEM_MA_CLK1_P/N MEM_MA_CLK2_P/N A_SODIMM D HT_REFCLKN GPP_REFCLK NB_GFX_REFCLKP/N 100MHZ NBLINK_RCLKP/N A-LINK AMD NORTHBRIDGE RS880M EXT CLK MODE CLOCK GENERATOR LPCCLK0 PCIE_PE2_CLKP/N MINIPCIE SLOT (SB800, 1 LANE) 100MHZ EXT_PCIE_PE2_CLKREQ# PCIE GPP I/F (RS880M, 1 LANE) 100MHZ EXT_PCIE_LAN_CLKREQ# DNI 33MHZ LPC_CLK1 33MHZ AZ_BIT_CLK AZ_BITCLK SATA_X1 SPI_CLK 24MHZ SPI_CLK xxHZ STRAPS SETTING, UNUSED CLOCKS EC/STRAPS SETTING :EC ENABLE STRAPS SETTING, CLOCKS ENABLE HD AUDIO SPI ROM & HEADER SATA_X2 25M Hz C LPC_CLK0 RTCCLK FOR SATA JMC261 25M Hz 14.31818MHz PCIE_LAN_CLKP/N LPCCLK1 PORT2:WLAN PCI_CLK2 PCI_CLK3 PCI_CLK4 33MHZ GBE_RXCLK GBE_TXCLK C NC SBSRC_CLKP/N 100MHZ SB_OSC CLK_48M_USB 48MHZ DNI PCIE_RCLKP/N USBCLK 32.768K Hz INTERNAL CLOCK MODE EC/STRAPS SETTING :EC ENABLE STRAPS SETTING, CLOCKS ENABLE SPI ROM & HEADER HD AUDIO 33MHZ LPC_CLK0 33MHZ LPC_CLK1 33MHZ PCICLK1 PCICLK2 B PARK_XT SLT_GFX_CLKP/N PCIE_REFCLKP/N 100MHZ PCIE GFX PARK_XT(RS880M, 16 LANES) SB_MXM_CLKREQ# PCICLK3 PCICLK4 LPCCLK0 LPCCLK1 RTCCLK SPI_CLK xxHZ HT_REFCLKP/N 100MHZ 33MHZ PCI_CLK3 33MHZ PCI_CLK4 PCICLK0 PCIE_RCLKP/N SMSC_CLK 33MHZ PCI_CLK2 SIDE PORT MEMORY CHIP REFCLKP/N NB_HT_CLKP/N STRAPS SETTING, UNUSED CLOCKS PCI_CLK0 SPM_CLK xxxMHZ 27M Hz FOR DEBUG PORT STRAPS SETTING, PCIE GEN1/PCIE GEN2 CPU_HT_CLKP/N B AMD NORTHBRIDGE RS880M GPP_REFCLK NB_REFCLK_P/N 100MHZ SIG4 CPU SB_NBLINK_RCLKP/N A-LINK 100MHZ AMD NB_DISP_CLKP/N MEM_MB_CLK1_P/N MEM_MB_CLK2_P/N CPU_CLKP/N B_SODIMM MEM_MA_CLK1_P/N MEM_MA_CLK2_P/N 200MHZ A_SODIMM AMD SB820M SPI_CLK CLOCK GENERATOR AZ_BIT_CLK AZ_BITCLK 24MHZ SB_PCIE_PE2_CLKREQ# GPP_CLK2P/N GPP_CLK3P/N 100MHZ PCIE_LAN_CLKP/N 100MHZ MINIPCIE SLOT (SB800, 1 LANE) CLK_REQ2 in SB PCIE GPP I/F (RS880M, 1 LANE) CLK_REQ3 in SB PORT2:WIFI JMC261 25M Hz A A FOR MASTER 25M Hz FOR RTC 32.768K Hz FOR SATA 25M Hz Bitland Information Techonogy Co.,Ltd. Notebook R&D Division DNI http://pc-120.taobao.com/ Title 5 4 3 2 CLOCK DISTRIBUTION Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 5 of 54 5 4 3 2 1 Thermal Systems (Emergency Shutdown, Throttling, Fan Control) translate 3.3V TSI 1.5V TSI THERMTRIP_L G7 translate SID SIC ALERT_L D KBC SMSC T7 translate Y9 translate THERMDC THERMDA MEMHOT_L VRM_HOT# NON-POP PROCHOT_L FANOUT2 W18 AA18 SDA0 SCL0 VRM Power AMD S1G4 THERMTRIP# SDA3 (S5-S0) SCL3 TALERT# (S0) translate OVERRIDE# SMBus Block Diagram AMD SB800 B6 C6 TEMPIN1 A6 TEMPIN0 TEMP_COMM TEMP_COMM C6 F24 PROCHOT# M8 PWM TACH D P5 (S5-S0) DUAL_SMB1 AMD SB800 (master) SDATA1 SCLK1 SDA1 SCL1 SDATA0 SCLK0 SDA0 (S0) SCL0 SDA2 (S5-S0) SDA3 SCL2 (S5-S0) 1.8V SCL3 DDR 2 SO-DIMM J401 FANOUT0 FANIN0 AMD S1G4 TEMPIN2 TEMPIN3 SDA2 GEVENT4# SCL2 J4 translate mini PCI Exp x1 MPCIE1 NON-POP 4-PIN CPU FAN mini PCI Exp x1 MPCIE2 Place under DDR NON-POP DDR 2 SO-DIMM J402 SIC SID CLK. Gen. 9LRS4880 U800 SVC SVD MAX17009 SVC CPU Core PWR PWM SVD U2800 (S3-S0) TEMP SENSOR (Q600) ADM 1032 C (S5-S0) ASF Only C J106 SO-DIMM EVENT translate SDA SCL THERMDC THERMDA ADM 1032 AMD RS880 MXM THERM# NOPOP Thermal disaster prevention is implemented by PROCHOT_L and THERMTRIP_L with hardware non-system dependant functions. Fan speed control will only be implemented by SB TSI software based implementation POP CPU Thermal Sensor ADM1032 EC MAX1535 battery charger GPU Thermal Sensor U8 U2700 BAT_DAT BAT_CLK (S5-S0) POP SMCLK0 SMDAT0 (S5-S0) U103 (master) 3.3V SB-TSI SMCLK1 SMDAT1 (S5-S0) KBC1100L Power State / Voltage Rail Activity Summary B Global System State Sleep State Processor Power State G0 S0 C0 Running Running Description RTC G0 S0 C0 G0 S0 C1 Halt C2 Stop grant, caches snoopable P-state transitions under OS control ALW DUAL SUS B RUN ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON G0 S0 ON ON ON ON ON G0 S0 C3 TBD ON ON ON ON ON G0 S0 c4 TBD ON ON ON ON ON G1 S1 OFF G1 S3 OFF G2 S4 OFF G2 S5 OFF G2/G3 S5 LOW OFF Group Name Description A OFF G3 5 Sleeping Powered on suspend ON ON ON ON ON Suspend to RAM ON ON ON ON OFF Suspend to diskON ON ON ON OFF OFF Soft-off ON ON ON OFF OFF ON ON OFF OFF OFF Battery IN Mechanical off ON OFF OFF OFF INT: Stuff when use internal clock generator EXT: Stuff when use external clock generator DNI/NC: DO NOT INSTALL KBC: Stuff when use external KBC IMC: Stuff when use internal EC A11:Resistors marked with "A11" is only for SB800A11 ONLY. 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Notebook R&D Division Title OFF http://pc-120.taobao.com/ 4 3 2 MISCELLANEOUS TABLES Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 6 of 54 5 4 3 2 1 1 PR65 4 D 2 SBM54PT SMA PD4 2 2 PC191 NC_100pF/50V,NPO C0402 1 1 1 1 2 2 4 3 49 @ PC117 100pF/50V,NPO C0402 PQ33 2N7002 SOT23 SM_BAT_SCL 1 @ BAT54S sot_23 3 SM_BAT_SDA 1 BAT54S sot_23 1 2 2 PR21 510K R0402 PC8 1000pF/50V,X7R C0402 1 1 2 2 PC10 0.01uF/25V,X7R C0402 2 1 1 1 PC137 0.01uF/25V,X7R C0402 2 2 PC134 0.01uF/25V,X7R C0402 2 1 Isense_SYSP C PZD1 2 3 2 PQ53 2N7002 SOT23 1 49 EC_V3.3AL PZD2 1 3 SHDN 9 PR208 2 3 1 49 GND1 8 EC_V3.3AL nc_0.1U_0402_16V7K PC26 2 1 3 PC135 C0402 1000pF/50V,X7R GND BAT_INT# PR12 0R R0402 PR16 510K R0402 1 2 3 4 5 6 7 R0402 1K 49 2 2 1 PR140 4.7K R0402 1 2 2 PR41 20K R0402 1 PR207 300K R0402 2 ACOFF# PR48 51K R0402 2 8 7 6 5 PQ41 PC44PC18 PC43 PC7 AO4419 NC_2200pF/50V,X7R NC_0.1uF/25V,X7R NC_0.1uF/25V,X7R 0.01uF/25V,X7R SO8_50_150 C0402 C0402 C0402 C0402 510K 2 R0402 bat_bp02071-p5651-7f C10376-10701-B BATCON2 8A PC184 PC185 49 EC_V3.3AL 5.6pF/50V,NPO 5.6pF/50V,NPO C0402 C0402 1 49 PC9 1000pF/50V,X7R C0402 100 100 R0402 PR206 R0402 1 1 PR14 1 del BAT_OV# VMB D PR205 BAT_DAT BAT_CLK @ PC149 @ PC150 nc_0.1u_0402_50V7K nc_2200P_0402_50V7K 1 2 3 SM_BAT_SCL SM_BAT_SDA 4 5 6 7 8A 1 2 3 PQ42 2N7002 SOT23 2 1 PQ47 2N7002 SOT23 1 2 2 @ PC140 @ PC141 PC25 nc_0.1u_0402_50V7K nc_2200P_0402_50V7K 1000P_0402_50V7K +VIN PR133 51K R0402 PR15 51K R0402 3 1 ACIN 49 49 SSM34PT PC3 0.1uF/25V,Y5V SMA C0402 PR132 51K R0402 PF1 7A FUSE1206 1 2 1 Isense_SYSN 2 49 8A 8A Isense_SYSP EC_V3.3AL PQ49 2N7002 SOT23 5 6 7 8 2 2 8A 3 2 1 0.015_1W_F 1608 PC193 470pF/50V,NPO C0603 FB0805 PFB2 100ohm@100MHz,3A 1 2 FB0805 2 5A 2 SBM54PT SMA PD8 1 2 BATT+ 1 4 PD7 1 1 FB0805 PFB3 100ohm@100MHz,3A 1 2 PQ34 AO4419 SO8_50_150 2 49 8 7 6 5 PF2 7A FUSE1206 1 2 1 13 1 ALW_EN PQ48 AO4419 SO8_50_150 1 2 3 S PR131 G 100K R0402 2 ALW_EN PR142 51K R0402 PC192 1000pF/50V,NPO C0402 PR47 1K R0402 PFB1 100ohm@100MHz,3A 1 2 1 2 R0402 10 1 PR10 1 2 2 R0402 20K 2 2 PC116 0.01UF/25V,X7R C0402 1 2 PC23 1000P_0402_50V7K 1 1 1 2 100P_0402_50V8J PC21 100P_0402_50V8J PC22 1000P_0402_50V7K 1 0.1uF/25V,X7R C0603 2 PD13 SSM34PT SMA PR9 PC2 1 1 AD-2 3 2 AD-1 1 2 VPFB1 100ohm@100MHz,3A fb0805 1 2 VPFB2 100ohm@100MHz,3A fb0805 1 2 VPFB3 100ohm@100MHz,3A PC24 fb0805 5A 2 1206 2 SHLD1 D VPF1 7A 1 1 PC253 NC_10U_1206_25V6M 2 1 PC255 NC_10U_1206_25V6M 2 1 PC256 NC_10U_1206_25V6M 2 1 1 2 4 AD+ 1 SHLD2 2 as BM5910 5 8.2K 2 R0402 nc_0.1U_0402_16V7K PC27 2 1 PR11 1 AD+ VPJ1 DC JACK 5P PCN1 2 VMB AD_6251+ PC136 1000pF/50V,NPO C0402 C PU11 21 1 1 CSON 22 1 2 1 1 1 1 2 21 1 PC138 10uF/25V,X7R C1206 1 TPC60 NC_TestP PC145 10uF/25V,X7R C1206 PC41 680P_50V_M_B 0402 B 2 PR181 2.2 R0402 PC129 1uF/10V,X7R C0603 1 1 4 12 1 2 PR184 100 R0402 ADC1 2 CELLS 4 3 2 2 CELLNUMBER VDD GND FLOAT Layout note: Far away from critical signal trace 0A 400mA 1 10K,1% R0402 2 8 + - 3ADPT_OUVP_DET 49 1 2 3 A SOD323 NC_1N4148WS PD36 1 1 PD34 NC_1N4148WS SOD323 ADAPT_OUVP=1/9*AD+ BATT_OVP 2 ADAPT_OUVP_R 1 2 7 10K,1% R0402 - 0 2 PR51 931K,1% R0402 PBATT_OVP 6 1 ADAPT_OUVP 5 PR57 133K,1% R0402 BATT_OVP_R PR52 133K,1% R0402 1 0V 0.66V 49 + 2 充电电流 1 SET_I 2 NC_100K,1% 2 LI-4CELLS :18.0V----BATT-OVP=2.001V PU27B LM358DT_SO8 PR53 2 2 2 Iaclim=1/PR8*(0.05*Vaclim/Vref+0.05) PU27A LM358DT_SO8 1 2 0 P 1 R0402 NC_100K,1% PR215 2 BATT-OVP=1/9*BATT+ PR50 133K,1% R0402 PR55 931K,1% R0402需接到EC之ADC 需接到EC之ADC PR56 PQ5 NC_DTC115EUA_SC70-3 0.01UF/25V,X5R C0402 PR54 133K,1% R0402 100mV/25m ohm=4.0A. R0402 BATT+ 2 2 LI-3CELLS:13.5V----BATT-OVP=1.5012V 设置适配器限流值为 6251_DCIN PR266 1 1 VCC_358 G 1 CELL PIN CELL PIN CELL PIN 4 3 VDDP 2 PR35 0R R0402 1 PQ6 NC_TP0610K-T1-E3_SOT23-3 AD_6251+ 2 PR36 NC_0 R0402 1 ISL6251HAZ SSOP24_25_150 PC133 3300pF/50V,X7R C0402 1 49 PC30 0.01UF/16V,X5R C0402 2 2 GND 7 1 ICM 1 CELLS ACPRN R0402 10.5K_F PR185 SOD323 1N4148WS/LMDL914T1G_SOD323-2~D D94 PC31 2 0.1 Vref 23 1 SOD323 1N4148WS/LMDL914T1G_SOD323-2~D D88 ACLIM 1 10 1 2 R0402 20K_F PR183 +VIN AD+ 8 VREF VBATS1 2A P 2.39V_Vref8 2 PR179 50mOHM,1% PC147 R1206 4.7uF/25V,X7R C1206 2 CSOP 2A G CHLIM 1 4 9 4 14 13 12.6V BATT+ 2 PR49 4.7F 0603 PQ58 AO4468 PAK1212-8 EN PGND 1 2 2A phase 2 phase 5 2 PC132 NC_0.01uF/25V,X7R C0402 PR39 100K R0402 Isense_SYSN PC144 10uF/25V,X7R C1206 1 2 MHCI06030 PL11 nc_10uH/4A/68m LS2_1040 VADJ LGATE 3 2 2 1 2 R0402 10K PR177 PD32 1N4148WS SOD323 18 PC142 0.1uF/25V,X7R C0603 PL3 10uH/4A/68mOHM 3 2 1 VDDP 2 PC126 0.1uF/25V,Y5V C0402 1 1 2 1 11 2 R0402 15.4K,1% PR182 4 PC148 1000pF/50V,X7R C0402 1 2 2 PR180 6.98K,1% R0402 2 PR176 0R R0402 VCOMP 1 1 SET_I 1 1 BOOT PHASE B 49 6 PR37 NC_15.4K,1% 1 R0402 2 PR32 10K 1 R0402 ICOMP 1 17 16 S CHG_ON UGATE G 49 CSIN PQ57 AO4468 PAK1212-8 3 2 1 PR40 NC_31.6K,1% 1 R0402 2 CHGVADJ CSIP D 49 1.5A 2 PR212 0R R0402 S 5 0.01uF/25V,X7R 2 C0402 PC131 1 2 AD_6251+ 1 2 2 20 5600pF/50V,Y5V 2 C0603 PC146 1 PR186 10K R0402 6251_DCIN G 2 PR175 10 1000pF/50V,X7R R0402 2 C0402 PC130 1 1 PC128 0.1uF/25V,Y5V C0402 24 2 1 PC143 0.1uF/25V,Y5V C0402 2 PR172 0R R0402 D 1 Isense_SYSN DCIN 19 1 VDD 5V_internal_LDO Isense_SYSP 2 5 ACSET 1 VDDP 2 1 1 2 1uF/10V,X7R 2 C0603 PC108 1 15 VDDP R0402 4.7 PR173 2 1uF/10V,X7R 2 C0603 PC127 1 Input OVP : 22.3V Input UVP : 17.26V CHG_ON 49 SLP_S3# 9,11,27,40,49,51 3.3V 2A A ICHG=165mV/PR179*(VCHLIM/3.3V) Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 3 2 http://pc-120.taobao.com/ ADP IN/BATTERY CHARGER Size D Document Number Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 7 of 54 4 D 1.1 1 1.0 1 0 0.9 1 1 0.8 2 1 R267 10 4 C376C375 33P 1200P 2 X7R X7R 25V 25V R145 1 100 1 R104 100 1 2 C64 10U_1210_25V 3 2 1 2 C71 180P C63 10nF 1 2 1 C49 22uF_0805_6.3V 1 2 C43 22uF_0805_6.3V 1 2 2 1 C31 22uF_0805_6.3V 1 2 C69 10U_1210_25V C68 10U_1210_25V 2 1 1 C66 10U_1210_25V 2 1 2 + 2 PC218 330U_2.5V_R9mOHM PC217 330U_2.5V_R9mOHM 1 2 680P_50V8J C389 0.1U 1 X7R 16V 2 C338 0.1U X7R 16V 1 C340 0.1U X7R 16V 2 2 1 C382 0.1U 1 X7R 16V 2 C383 0.1U X7R 16V 1 2 C384 0.1U X7R 16V 1 2 C385 0.1U X7R 16V 1 C386 0.1U X7R 16V 2 2 1 C387 C388 0.1U 0.1U 1 X7R X7R 16V 16V 1 + Updata on rev:1.1 for esd 2 ISN_0 LGATE_0 0.7 - 1.3 V C61 2.2uF_X7R 1 28 27 36A C VIN2 PHASE_1 2 PQ32 4 UGATE_1 1 C380 2200P X7R 25V 2 C381 0.01u X7R 25V C75 10U_1210_25V LGATE_1 C74 10U_1210_25V 2 1 29 1 1 2 2 SIR462DP-T1-GE3 UGATE_1 R136 2.2 2 1 C361 2 1 Panasonic ETQP4LR36WFC 4 CPU_VDD_RUN 0.36UH_PCMC104T-R36MN1R17_30A_20% LS2_1040 1 2 PL16 PQ39 LGATE_1 4 PQ40 SIR466DP-T1-GE3 SIR466DP-T1-GE3 C1932 1 1 + 2 PC221 330U_2.5V_R9mOHM 26 25 PC220 330U_2.5V_R9mOHM 37 1 +5V 31 30 C77 10U_1210_25V 2 1 PHASE_NB LGATE_NB UGATE_NB 38 40 PGND_NB 39 41 42 RTN_NB VSEN_NB OCSET_NB 43 44 FSET_NB 46 45 47 VCC COMP_NB 2 32 1 C1931 SIR466DP-T1-GE3 2 ISP_0 2 1 CPU_VDD_RUN 1 1 + 2 CPU_VDD_RUN 2 R266 2 6.81K_1% C356 1000P 1 X7R 16V 1 C360 0.1U X7R 16V R131 4.02K_1% 2 NC_PH3 R134 NC_10K_5% 2 1 1 2 1 ISP_1 R130 16.2K_1% C48 22uF_0805_6.3V 1 2 NC_100K_0402_1%_TH11-4H104FT PQ37 SIR466DP-T1-GE3 0.22U X7R 25V 2 100K_0402_1%_TH11-4H104FT ISN_1 +1.8V R170 10K_1% 2 1 RTN_1 2 2 1 2 C277 4700P 1 X7R 16V 1 R128 1K_1% 1 R127 255 2 B C344 1200P X7R 16V 2 C345 180P X7R 16V Fou Uni-plane: G16,G17,R39:Assembly R38:Not Assembly R129 54.9K_1% 1 Parallel 2 2R120 0R 1 R109 100 PQ35 LGATE_0 4 4 2 ISN_1 C276 0.1U X7R 16V R113 NC_0R 2 1 1 0.22U X7R 25V RTN_1 1 1 CPU_VDD_RUN 1 2.2 2 Update on rev:1.1 16 CPU_VDD1_RUN_FB_H 2 3 2 1 R93 4.02K_1% 1 Close to CPU socket C362 2 0.36UH_PCMC104T-R36MN1R17_30A_20% LS2_1040 1 2 PL15 CPU_VDD_RUN 1 2 2 16 CPU_VDD1_RUN_FB_L R257 LGATE_1 Parallel 2 Updata on rev:1.1 B BOOT_1 2 R99 PHASE_0 Panasonic ETQP4LR36WFC 2 ISN_0 UGATE_1 VW_0 13 16.2K_1%R91 16.2K_1%R91 PH2 R139 NC_10K_1% 2 1 1 R111 0R 2 1 R112 0R 2 1 16 CPU_VDD0_RUN_FB_L 48 COMP_0 to 16.5k 1 Close to CPU socket 2 16 CPU_VDD0_RUN_FB_H UGATE_0 C379 0.01u X7R 25V 1 12 2 100 34 33 2 C45 22uF_0805_6.3V 1 2 1 change from 16.2k 2 1 ISP_0 R98 1 1 C378 2200P X7R 25V SIR462DP-T1-GE3 2 2 6.81K_1%R90 6.81K_1% R90 C275 1000P 1 2 X7R 16V CPU_VDD_RUN 35 ISN_1 11 X7R 216V PHASE_1 ISP_1 C233 1 180P X7R 16V 36 PQ31 4 24 1 PGND_1 FB_0 VW_1 C189 1200P 1 2 VDIFF_0 ISP_0 2 54.9K_1%R89 54.9K_1%R89 10 23 9 1K_1% R88 LGATE_1 COMP_1 2 OCSET 22 8 21 R86 82.5K_1% PVCC 2 R47 34.8K_1% X7R 16V 1 LGATE_0 RBIAS FB_1 7 VDIFF_1 1 20 2 PGND_0 ISL6265_QFN_48 6x6 ENABLE 19 1 SVC VSEN_1 2 PHASE_0 18 6 UGATE_0 1 2 2 2 1 255 R87 BOOT_NB UGATE_0 Pin 49 is GND Pin SVD 2 C371 0.22U X7R 25V R256 2.2 BOOT_0 PWROK RTN_1 5 0R 1 PGOOD 17 0R 1 2 2 R248 R2890 0RDNI C180 4700P 1 2 4 RTN_0 R247 3 0R 1 16 CPU_SVC 16,17 VDDA_PWRGD 0R 1 VSEN_0 16 2 ISN_0 CPU_SVD 15 16 14 2 R246 2 OFS/VFIXEN U2 2 R223 49 VRM_RUN_EC 1 2 16 CPU_PWRGD_SVID_REG C 49 100K 1 FB_NB R142 2 VIN 1 2 GND 0R 1 1 1 2 R251 10K 10,51 VRM_PWRGD 1 VIN1 PHASE_NB +5V R199 0R 1 2 LGATE_NB UGATE_NB R250 C62 10U_1210_25V CPU_VDD_RUN R137 11.5K_1% 44.2K_1% 680P_50V8J 2 5 C377 0.1U X7R 25V 1 2 PAD-OPEN 4x4m C374 1000P X7R 25V PR2272.2_5% 1 1 1 0.8 1 3 2 1 2 C26 0.22uF_6.3V 1 2 2 2 R186 10 2 PJP35 1 PAD-OPEN 4x4m2 Parallel 1 R144 22K_1% 1 +VIN PJP34 1 5 1.0 D +VIN VIN1 16 3 2 1 0 CPU_VDDNB_RUN_FB_L 5 1.2 1 CPU_VDD_RUN VIN2 0R 1 3 2 1 1.4 1 R270 5 Output 0 2 LGATE_NB 5 SVD 0 0 +3.3V G S 1 2 3 8 7 6 5 D + 2 1 2 C372 1U X7R 10V 1 2 1 PQ55 AO4468 SO8_50_150 Updata on rev:1.1 1 1 1 2 PAD-OPEN 4x4m 2 VFIXEN VID Codes SVC 2.2UH +-20% 8A 20mo 47 1 R253 47 +5V 1 UGATE_NB C44 22uF_0805_6.3V 0 0 1 2 4 PHASE_NB C50 22uF_0805_6.3V 0 2 JUMP_43X118 R252 0R 1 2 C52 22uF_0805_6.3V 1 2 Output PL8 3 2 1 D 2 16 CPU_VDDNB_RUN_FB_H SVD 1 5 SVC 1 G R249 Metal VID Codes VDD_NB PJ2 2 PJP36 S 4A 1 +VIN PQ59 AO4468 SO8_50_150 CPU_VDDNB_RUN 2 VIN3 1 2 3 X 1 O O 2 X X C73 10U_0805_10V X X +5V PC215 330U_2.5V_R9mOHM O +3.3V GND 3 VFIX SVI PR228 2.2_5% 1 Offset & Droop O OFS/VFIXEN 8 7 6 5 5 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 3 2 http://pc-120.taobao.com/ CPU CORE PWR Size D Document Number Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 8 of 54 5 4 3 2 +VIN PJ7 1 D 1 4 G PC77 0.1U_25V_M 0603_X5R 1 2 49 S Place these CAPS close to FETs 1 1 CPU_VDDIO_SUS PJ9 1 DDR_OUT1 +5VDual PC84 4.7U_10V_K 0805_X5R PC82 1000P_50V_M 0603_X7R Iocp=19.6A 1 1 + 2 1 2 S + 2 PC80 0.1U_6.3V_K 0402_X5R DDR_DL 4 G PC81 330U_2V_7.3x4.3 1 S 12A 2 jump_gap_open_161x54 PR91 3.3_J 0603 PC79 330U_2V_7.3x4.3 4 G 2 jump_gap_open_161x54 2 5 5 PR112 0R0603 2 1 2 3 1 PQ36 SIR466DP-T1-GE3 2 1 2 TPS51218DSCR null DDR_BST DDR_DH DDR_LX D 1 2 3 11 10 9 8 7 6 PGOOD GND TRIP VBST EN DRVH VFB SW RF V5IN DRVL D PQ30 SIR466DP-T1-GE3 PR90 0R 0603 2 PU3 D PJ8 NC_1UH +-20% FDV0630-1R0M=P3 12A PL9 1 2 PL12 1.0UH_11.5x10.4 1 VDRAM_PWRGD 1 1 2 PR94 100K_F 0402 1 2 PC78 NC_100P_50V_K 0402_NPO 2 PR92 1K_F 0402 1 DDR_TRIP 2 DDR_S5 3 DDR_VFB 4 DDR_RF 5 PR93 120K_F 0402 1 49 VDDIO_SUS_EN_EC 11,27,46,49 SLP_S5# PR143 NC_10K_J 0402 PR97 NC_1K_F 0402 1 2 1 2 PC83 NC_1U_10V_K 0603_X5R 2 1 1 2 1 PR103 NC_0_F 0402 2 2 +3.3VDual 1 2 3 PR89 10K_J 0402 3A 2 jump_gap_open_161x54 1206_X5R 10U_25V_M PC76 2 1 2 5 D PQ29 SIR462DP-T1-GE3 +3.3VDual 1206_X5R 10U_25V_M PC75 2 1 0.1U_25V_M 0603_X5R PC74 2 1 DDR_DCBATOUT 1 update on rev:1.1 R2853 200R PR98 2 2 16 CPU_VDDIO_SUS_FB_H R2860 200R 0402 C 1 C 1 11.5K_F PR96 10K 0402 B B CPU_VDDIO_SUS +3.3VDual 2 PC199 4.7U_6.3V_K 0603_X5R 3 R576 4 100K_F 0402 MEM_VTT_EN PR268 1 2 NC_0 0402 NC1 REFEN NC2 VOUT NC3 5 7 8 9 100K_F 0402 +0_75VRUN 2 1 PC86 0.1U_6.3V_K 0402_X5R 2 1 PC87 10U_6.3V_Y 0805_Y5V 2 1 PC88 10U_6.3V_Y 0805_Y5V R577 PC194 1U_10V_K 0603_X5R 2 1 1 3 4 Q50B 2N7002DW-7-F S Q50A 2N7002DW-7-F S 6 D 2 G 2 GND2 6 2A PJ10 1 MEM_VTT 2 jump_gap_open_161x54 A 1 1 D 5 G 2 1 49 SLP_S3# PC197 NC_1U_10V_K 0603_X5R 2 1 7,11,27,40,49,51 A VCNTL RT9199GSP_SO8 PR82 100K_J 0402 PR267 0R 0402 VIN GND1 2 2 1 +3.3VDual PU4 PC98 1U_10V_K 0603_X5R 2 1 1 1 2 2A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title CPU MEM PWR Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 9 of 54 5 4 3 2 1 1 R3028 NB_VOL_DET 3 1 NC_33K NC_2N7002E PC69 0.1U_0603_25V7K R2972 NC_56K +5V 3 PR110 10_0603_1% 2 1 8 R2966 47K ISL6228_B+ VIN2 FB1 6228_VCC_NBO1 2 23 STRP_DATA R2953 0 PGOOD2 参数待定 29 1 28 R1822 0_0402_5% 2 PR99 3.3K_0402_5% 2 1 1V1DUAL_PWRGD 49,51 PR101 56K_0402_1% update on rev:1.1 8,51 VRM_PWRGD 1 1 LG_VCC_NB 2 2 update on rev:1.1 +1.1VP 1 1 1 1 D4 D3 D2 D1 + + PC170 CAP_7343 DCR 6m ohm(max) During Power Up 0 < 3.3v - 1.8v < 2.1v 2 PC172 CAP_7343 220UF/6.3V/18M 6R3ME221M 220UF/6.3V/18M 6R3ME221M LG_+1.1V VCC_NB_EN 2 PJ13 JUMP_43X118 2 PC93 1U_0402_6.3V6K C +1.1VP 2 @ PC94 @PC94 680P_0402_50V7K G S3 S2 S1 PC100 1U_0402_6.3V6K @ PR178 10K_0402_5% 1 2 4 1 PR117 PC96 0_0603_5% 0.1U_0402_16V7K 2 1 2 BST_+1.1V1 1.25V 1 1 1 1 MHCI06030 2 2 +5VDUAL PL4 1uH/12A10mOHM @ PR109 @PR109 4.7_1206_5% 5 6 7 8 VCC_NBP 21 20 19 18 17 +5VDUAL +1.05VSP Vo=Vref*((PR80+PR82)/PR80) Ipeak=14.02A, Imax=9.81A Iocp=19A Csen=L/(Rocset*DCR) 0.015U=1U/(Rocset*6m) Rocset=11.111K~11.8K Iocp=(Rocset*10uA)/DCR Iocp=(11K*10uA)/(3.3m ohm*1.3) =15.1A 0.95V N/A PR105 15K_0402_1% 3 2 1 Cout ESR=15m ohm 16 15 DCR 3.3m ohm(max) PQ24 SI4168DY-T1-GE3 PWM +1.1VDUAL S3 S2 S1 3 2 1 S_LX_+1.1V 0 1.1V When JU2903 is installed with a jumper 2 G 1 1 4 UG_+1.1V BOOT2 PVCC2 PC101 0.1U_0402_16V7K 22 1 0.95V 2 UGATE2 PQ25 SI4172DY-T1-GE3 Power Shift @PC92 @ PC92 @ PC123 nc_0.1u_0402_50V7K nc_2200P_0402_50V7K 2 BOOT1 23 2 PHASE2 LGATE2 PR116 0_0603_5% 1 2 1BST_VCC_NB 14 PC90 4.7U_1206_25V6K 2 1 UGATE1 4 2 RS880M VCC_NB PC102 68nf_0603_50V7K 1 2 ISL6228_B+ 2 +1.1VDUAL_EN @PC89 @ PC89 R2954 0R nc_0.01U_0402_25V7K 1 2 PC99 4.7U_1206_25V6K 24 +5VDUAL EN2 PGND2 2 OCSET_+1.1V 5 6 7 8 S1 S2 S3 G 25 PQ22 SI4168DY-T1-GE3 UG_VCC_NB 13 PR113 @ 4.7_1206_5% 6228_+1.1VO2 ISL6228HRTZ-T_QFN28_4X4 PHASE1 PGND1 PC33 PC97 220U_6.3V_3528 6TPC47MB @ 680P_0402_50V7K OCSET2 PU6 LGATE1 + 2 2 220U_6.3V_3528 6TPC47MB 26 STRP_DATA FB_+1.1V PR100 20K_0402_1% 1 2 RS880M VCC_NB LX_VCC_NB 12 D1 D2 D3 D4 1 1 PC34 + FB_+1.1V-1 GPIO Mode Vref=0.6V EN1 PVCC1 2 PL17 LS2_1040 VO2 27 D4 D3 D2 D1 8 7 6 5 D1 D2 D3 D4 PC105 4.7U_1206_25V6K 2 1UH_18A_20% 1 1 S1 S2 S3 1 1 2 3 2 JUMP_43X118 OCSET1 11 VCC_NB_EN 8 7 1 6 2 5 3 VCC_NBP PJ11 G 9.1K_0402_1% FB2 PQ23 SI4172DY-T1-GE3 4 1 2 12A 10 OCSET_VCC_NB 1 C 0.95V--1.1V PR102 1 2 VCC_NB PC104 2 1 4.7U_1206_25V6K 1 2 PC85 0.033U_0603_50V7K 1 2 VO1 PC91 1000P_0402_50V7K 1 2 PR114 51K_0402_1% 1 2 1 9 ISL6228_B++ 2N7002E R2958 2K 1 GND_T 2N7002E Q2917 2 PR115 18.2K_0402_1% D Q2908 1 C2946 100nF DNI 1 2 2 3 VCC2 VCC1 4 5 VIN1 FSET1 FSET2 1 FB_VCC_NB-1 PR111 8.2K_0402_1% 1 2 6 7 PR95 35K_0402_1% 2 1 FB_VCC_NB 2 PR107 60.4K_0402_1% PC73 1000P_0402_50V7K 2 1 1 1 2 PR104 3.3K_0402_5% 2 PGOOD1 1 1 PC72 1000P_0402_50V7K 2 1 PR108 22K_0402_1% 2 PR188 0_0402_5% 2 +1.2V_PWRGD 1 PC71 1000P_0402_50V7K R2965 133K Q2912 2 1 2 2 PR106 10_0603_1% 2 1 ISL6228_B++ R3020 NC_4.7K 2 ISL6228_B+ NB_VOL_DET: 0: 0.95V / 1.1V 1:0.95V / 1.25V PR88 2.2_0603_1% 1 2 1 1 PC70 0.1U_0603_25V7K R3027 NC_56.2K 3 D +5VDUAL +5V 2 PJ12 JUMP_43X118 2 1 2 1 Updated on Rev2.0 49 ISL6228_B++ @ PC124 @ PC139 nc_0.1u_0402_50V7K nc_2200P_0402_50V7K 2 2 1 PJ15 JUMP_43X118 2 1 2 1 PC68 1U_0402_6.3V6K 2 +VIN 1 FB_VCC_NB-1 PC67 1U_0402_6.3V6K +5VDUAL PR87 2.2_0603_1% 2 1 Cout ESR=15m ohm Vo=0.6*((PR87+PR83)/PR83)=1.8V 1.8VP Ipeak=11.93A, Imax=8.351A Csen=L/(Rocset*DCR)=1uF/(Rocset*6m ohm)=0.022uF =>Rocset=7.575K, Choose 10K because of thermal factor Iocp=(Rocset*10uA)/DCR=(10K*10uA)/(0.006*1.3)=12.82A B @PC112 @PC113 NC_10U_0805_16V7K NC_10U_0805_16V7K 2 2 0.1U_0402_16V7K 1 1 1 @PC110 @ PC110 @PC103 @PC103 0.1U_0402_16V7K 2 @PC109 NC_10U_0805_16V7K 2 2 2 @PC95 @ PC95 NC_0.1U_0402_16V7K 1 1 1 +3.3V B R2996 47K +5VDUAL RB751V-40 1 8,51 VRM_PWRGD 49 D2910 2 +1.1V_EN R2987 10k 0R DNI R2924 1V1_EN_EC +5VDUAL 2A +1.2V_PWRGD 51 3 VLDT 1.1V 2 VLDT R1794 100K_0402_5% +1.1V 1 2 PJ20 2 1 C2147 1 1 2N7002E C2144 1 1 Q2941 MMBT3904 2 3 R2981 1k 10U_0805_10V4Z 2 2 1U_0603_10V4Z VLDT_GATE 1 3 6 2 1 R1802 200K_0402_5% C2145 2N7002DW-T/R7_SOT363-6 1 Q3638B 0.1U_0603_25V7K 2 2N7002DW-T/R7_SOT363-6 VLDT_PWRGD#5 2 4 R1801 100K_0402_5% 1 3 2 1 1 C2146 10U_0805_10V4Z SI4168_SO8 2 2 10U_0805_10V4Z +VSB Q3638A 2 1 @ PR189 1K_0402_5% 1 2 C2177 U64 Q2909 JUMP_43X118 VLDT_PWRGD# +1.1V_EN 1 5 6 7 8 R2982 10k 2 +5VDUAL +1.1V 4 +1.1VDUAL A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title 1V1DUAL/VLDT/VCC_NB/+1.1V Size Document Number Custom Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 10 of 54 5 4 3 2 1 +5VDUAL 10 1 R2975 2 @PC164 @ PC164 1U_0402_16V7K 1 +3.3VDUAL D 1 D 6 2 9 1 1 2 1 2 15K_0402_5% @PC187 @ PC187 @ NC_0.1U_0402_16V7K 22U_1206_6.3V PC162 1 R1809 12K_0402_5% PJ25 2 1 +1.8V 1 JUMP_43X118 2 68P_0402_16V7K @ 2 2 update rev:1.1 PC190 1 2 R1810 2 PC189 1U_0402_16V7K 1A +1.8VP 3 4 2 R1827 @ 10K_0402_5% GND 8 1 VIN APL5912 VOUT1 VOUT EN FB 1K @PC188 22U_1206_6.3V 2 POK 5 1 7,9,27,40,49,51 SLP_S3#R2983 VCNTL 7 vin1 2 0R 2 51 1V8_PWRGD U2904 1 R2974 1 R1819 R1811 10K_0402_5% NC_1K_0402_5% update rev:1.1 +5VDUAL R2988 10k R2989 +5VDUAL 0 1V5_PWRGD 51 3 update on rev:1.1 2 C2138 1 13,49 V3V5DUAL_PWRGD PR34 0_0402_5% 2 @ C 1 Q3049 1 2 @ 2 Updata on rev:1.3 1 4 +1.5VDUAL 1V8_PWRGD# +3.3VDUAL APL5312-15B_+1.5V 5 VOUT 2 1 FOR SB820M 15MA PJ17 2 4 2 1 1 2 VIN JUMP_43X118 PC122 NC_1UF/16V,X7R_+1.5V C518 C0402 NC_0.01uF/10V,X7R+1.5V C0603 D47 NC_1N5819 SOD123 1 2 2 5V/3.3V_GATE PU10 2 3 PC121 1 SHDN# BP NC_10uF/6.3V,X5R_+1.5V GND PR151 C0805 NC_10K,5%_+1.5V 2 R0402 C525 NC_0.01uF/10V,X7R_+1.5V C0603 1 1 2N7002DW-T/R7_SOT363-6 R1797 100K_0402_5% 2 2 1V8_PWRGD 2 51 Q30A 1 1 6 C2140 10U_0805_10V4Z 2 2 1U_0603_10V4Z SI4800BDY-T1-E3_SO8 1 10U_0805_10V4Z 2 2 10U_0805_10V4Z 3 2 1 1 C2139 1 C2142 U63 1 JUMP_43X118 R1792 100K_0402_5% 1 C2141 5 6 7 8 2 1 2N7002E +5VDUAL 1 PJ14 3 1 Q30B 0.1U_0603_25V7K 2 2N7002DW-T/R7_SOT363-6 +3VDUALTO +3.3V +3.3VDUAL +3.3V 1 @ 2 PR31 22K_0402_1% 1 2 10U_0805_10V4Z 2 2 1U_0603_10V4Z 2 2 PR29 100K_0402_1% +1.5V_GATE 1V8_PWRGD# 5 PC16 nc_0.22U_1206_25V7K 1 Q2940 MMBT3904 1 1 2 C2134 2 3 1 R2976 1k 3 2 1 1 C2136 1 2 2 1 R1796 200K_0402_5% C2137 1 U62 3 2N7002E 1 C2143 1 +VSBP +VIN 1 PC19 0.22U_0402_16V7K +VSB 1 1 10U_0805_10V4Z SI4800BDY-T1-E3_SO8 2 2 10U_0805_10V4Z Q31A NC_0.1U_0603_25V7K 2 2N7002DW-T/R7_SOT363-6 2 SUSP 10U_0805_10V4Z 2 2 1U_0603_10V4Z 5V/3.3V_GATE 6 +VSB 2 1 R1795 200K_0402_5% 5 6 7 8 1 C2135 10U_0805_10V4Z SI4800BDY-T1-E3_SO8 2 2 10U_0805_10V4Z C C2133 +VSB PQ3 TP0610K-T1-E3_SOT23-3 Q3048 2 3 2 1 1 C2132 R2977 10k 4 U61 +1.5V 3 C2131 5 6 7 8 1 CPU_VDDIO_SUS 4 C2130 1 +5V 4 +5VDUAL PC17 nc_0.1U_0603_25V7K +5DUAL TO +5V DEL +1.5V 与LDO之间的切换 B B Q3033 1 1 R3062 100R Q3034 CPU_VDDIO_SUS 1 2N7002E 2N7002E 2N7002E R3057 100R Q3041 R3056 100K 1 7,9,27,40,49,51 SLP_S3# 3 3 2 +5VDUAL Q3037 1 2N7002E 2 2N7002E 2 R3061 100R Q3032 2 1 SUSP R3064 100R MEM_VTT 2 Q3040 R3055 100K +5V 3 3 R3040 100R 3 R3058 100R +3.3VDUAL +3.3V 3 CPU_VDDNB_RUN 3 CPU_VDD_RUN Q3035 1 VLDT +1.5V +1.8V CPU_VDDR +1.1V 2N7002E 2 VCC_NB 3 2 2N7002E Q3036 2 2 0R1 C3011 100nF 2N7002E 3 2 R3066 100R 3 Q3031 1 Q3029 1 2N7002E R3063 Q3042 1 2N7002E 2N7002E 2N7002E 2 Q3038 1 2N7002E R3050 100R 3 3 Q3039 1 2N7002E R3065 100R 2 Q3030 1 2 R3060 100R 3 R3059 100R 2 R3053 100R 3 C3013 100nF 9,27,46,49 SLP_S5# A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 http://pc-120.taobao.com/ 3 2 1.5V/1.5VDUAL/1.8V/3.3V/5V Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 11 of 54 5 4 3 2 1 D D C C B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title // Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 12 of 54 4 3 2 1 +3.3VALW REF ;Vo2=3.3V +3VALWP R0402 R543 13K,1% R0402 R539 0R R0402 C731 220pF/50V,X7R C0402 C656 220pF/50V,X7R C0402 VFB2 ADD RESISTOR TO GET -5% LOWER FOR +3.3V(3.1626V) PR24 147K R0402 C186 PR26 1uF/25V,X5R 147K C0805 R0402 . REF +VIN PJ26 PGOOD VBST2 U31 DRVH2 VBST1 UP6182AQAG/TPS51125 S PL1 DRVL1 R542 10K R0402 19 PQ51 AO4468 SO8_50_150 Iocp=9.7A PL2 4.7uH/5.5A/15mOHM 1 MHCI06030 C185 1uF/25V,X5R C0805 . PJ3 2 1 1 2 PD14 NC_1N4148WS SOD323 1 2 C187 10uF/25V,X5R C0805 . 1 R521 NC_10K R0402 REF R505 0R 2 + 1 4 PQ52 AO4468 SO8_50_150 R522 NC_620K R0402 +5VDUAL +5VALWP 2 PR43 4.7,1% 0603 18 17 16 14 13 D S 1 1 2 3 PC39 680P_50V_M_B 0402 C 11,49 5 6 7 8 VCLK VREG5 VIN GND EN0 8 7 6 5 1 20 +5VALW PQ38 AO4468 SO8_50_150 PC111 10uF/25V,X7R C1206 JUMP_43X118 4 1 2 PC156 220UF/6.3V/18M 6R3ME221M CAP_7343 . C184 0.1uF/25V,X7R C0603 4 C363 0.1uF/25V,X5R . C0402 S 2 PD16 NC_1N4148WS SOD323 2 G + 21 V3V5DUAL_PWRGD 1 PR45 0F 0603 D 1 PR42 4.7F 0603 22 G 共Lay C366 1000PF/50V,NPO . C0402 DRVL2 1 2 4.7uH/5.5A/15mOHM MHCI06030 2 JUMP_43X118 LL1 15 +3VALWP 12 DRVH1 23 LLS SKIPSEL +3VALWP 1 1 R541 10K R0402 R504 100K R0402 VREG3 S 1 2 3 11 25 24 G Iocp=10.8A 1 1 VFB1 ENTRIP1 3 2 4 5 6 10 G 4 1 9 VO1 2 2 C657 PR44 0.1uF/25V,X7R0R C0603 0603 GND1 VO2 D PQ50 AO4468 SO8_50_150 8 27 VDC_TPS51125 5 6 7 8 . D . C659 4.7uF/10V,Y5V C0805 C663 1000PF/50V,NPO C0402 SMARTVOLT2 C2979 NC_100nF 3 2 1 C +3.3VDUAL PJ4 2 2 NC_2N7002E 3 2 1 C691 0.1uF/25V,X5R C0402 8 7 6 5 2 1 7 PC125 10uF/25V,X7R C1206 VREF JUMP_43X118 R1813 0R R0402 TONSEL +3.3VALW VFB2 2 2 R3024 1 +3.3VDUAL 1 ENTRIP2 1 NC_0R Q2931 改变PR25取值，EN V5AL的网络名R520 20K,1% R0402 2 EN_V3AL_TPS51125 VDC_TPS51125 R525 R527 NC_220K,1% NC_10K ,5% R0402 R0402 R540 30.1K,1% R0402 VFB1 改变PR24取值，EN V3AL的网络名 R518 20K,1% R0402 D EN_V5AL_TPS51125 R526 NC_110K,1% NOTE: H---> 5v L---> 4.65V +5VALWP R538 NC_0 R0402 1 D 3 参数设定：Vo1=5.01V Update on rev:1.1 2 5 PC37 680P_50V_NPO 0402 PC157 220UF/6.3V/18M 6R3ME221M CAP_7343 共Lay +VIN +5VALWP B B +3VALWP C730 0.1uF/25V,X5R C0402 . C367 0.1uF/25V,X5R C0402 . C364 0.1uF/25V,X5R C0402 . C365 0.1uF/25V,X5R C0402 . C370 0.1uF/25V,X5R C0402 C729 0.1uF/25V,X5R C0402 . C368 0.1uF/25V,X5R C0402 . C369 0.1uF/25V,X5R C0402 . C761 C665 0.1uF/25V,X5R 0.1uF/25V,X5R C0402 C0402 . . . +5VALW +5VALW PQ62 2N7002 SOT23 1N4148WS 2 A EN_V3AL PC29 1000pF/50V,X7R C0402 PR33 100K PJ1 JOPEN R0402 RESISTOR_1 ns PC28 NC C0402 3 1 PC20 NC C0402 2 PQ60 2N7002 SOT23 3 PR46 R0402 10 EN_V5AL 2 1 1N4148WS PR38 100k R0402 EN_V5AL 1 PQ63 2N7002 SOT23 1EN_V3AL A 2 PD10 1 SOD323 PQ56 2N7002 SOT23 2 7 ALW_EN PD9 1 SOD323 1 49 VDD_DUAL_EN EN_V3AL_TPS51125 3 PR30 100k R0402 3 EN_V5AL_TPS51125 Add Enable/OCP Circuit 090918 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title SYSTEM PWR Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 13 of 54 5 4 CPU_VLDT 1.1V D D1 D2 D3 D4 C 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15 21 21 21 21 HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1 21 21 21 21 HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 J3 J2 J5 K5 N1 P1 P3 P4 VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 2 1 1.5A U100A CPU_VLDT 3 D CPU_VLDT HT LINK L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 AE2 AE3 AE4 AE5 AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15 Y1 W1 Y4 Y3 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 DEL HTPA Soft-Touch Duo Connectors C HT_CPU_NB_CLK_H0 21 HT_CPU_NB_CLK_L0 21 HT_CPU_NB_CLK_H1 21 HT_CPU_NB_CLK_L1 21 R2 R3 T5 R5 HT_CPU_NB_CTL_H0 21 HT_CPU_NB_CTL_L0 21 HT_CPU_NB_CTL_H1 21 HT_CPU_NB_CTL_L1 21 SOCKET_638_PIN B B VLDT CPU_VLDT R183 0.001R_1W C335 10uF C101 4.7uF C102 22uF C103 220nF C104 220nF C105 180pF C106 180pF Place close to socket B25 A24 A23 * If VLDT is connected only on one side, one 4.7uF cap should be added to the island side A B24 B23 C26 D26 E26 C25 F26 D25 E25 C24 D24 E24 C23 D23 E23 C22 D22 E22 D21 E21 D20 E20 F20 F25 H23 H22 G21 H21 H20 H19 H18 C20 A19 B19 C19 D19 E19 F19 A18 B18 C18 D18 E18 F18 B17 B16 B15 A14 B14 C17 C16 C15 C14 C13 E17 F17 D16 E16 F16 D15 E15 D17 D14 D13 F15 K26 K25 J24 A9 B9 C9 B8 C8 D8 E8 C7 D7 E7 F7 C6 D6 E6 F6 E9 B7 B6 A5 B5 C5 D5 E5 A4 B4 C4 D4 A3 B3 F9 AA26 Y25 AA25 W24 Y24 W23 Y23 W22 Y22 AA22 W21 Y21 AA21 AB21 Y20 AA20 AB20 AC20 V22 V21 U20 V20 J19 K19 L19 M19 N19 P19 R19 T19 U19 V19 J18 K18 L18 M18 N18 P18 R18 T18 U18 V18 L17 M17 N17 P17 L22 AA12 W10 Y10 AA10 AB10 U11 L10 M10 N10 P10 R10 T10 U10 V10 G9 F8 G6 T14 T13 U17 U16 U15 U14 U13 V12 V11 H9 J9 L9 M9 N9 P9 H8 J8 L8 M8 N8 P8 H7 J7 K7 L7 M7 N7 P7 R7 T7 H6 J6 K6 L6 M6 N6 P6 R6 T6 T5 U5 K9 K8 R9 T9 U9 V9 R8 T8 U8 V8 U7 V7 W7 U6 V6 W6 N5 P5 M4 N4 P4 R4 N3 P3 R3 AD11 AC10 AD10 Y9 W8 Y6 AA9 AB9 AC9 AB8 AC8 AB7 AC7 AD7 AE7 AF7 AA6 AB6 AC6 AD6 AE6 AF6 G5 H5 G4 H4 G3 H3 J3 T3 U3 V3 W3 Y3 F2 G2 H2 J2 K2 L2 M2 N2 P2 R2 T2 U2 V2 W2 Y2 AA2 AB2 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 V5 V4 W5 W4 Y5 Y4 AF15 AA7 F4 U4 AC17 AC16 AA8 F5 T4 AF10 AC11 F3 R5 AF11 AE10 AC12 E3 M5 AF12 AE11 AC13 AB12 AB11 E1 L4 AF14 AF13 AE12 AB13 E2 L3 AE14 AE13 AB14 AA13 E4 K4 AF16 AE15 AD13 AD12 AB15 AA14 D3 K5 AF17 AE16 AD14 AB16 AA15 D2 K3 AE17 AD15 AC14 AA16 Y14 D1 J5 AD17 AD16 AC15 AA17 Y15 C2 J4 M3 W9 AB17 Y17 Y16 Y13 C1 C3 L5 AF18 AA11 T11 T15 AF19 AE18 Y11 R11 AF23 AF22 AE19 AD18 Y12 P11 AF24 AF21 AF20 AD19 W17 N11 AE20 AE23 AC19 AC18 W11 U12 M11 AE22 AE21 AD20 AB19 W12 T12 L11 AE24 AD21 AB18 W13 T16 L12 AE25 AD23 AD22 AA19 W14 R16 L13 K12 AD25 AD24 AC22 AA18 W15 P16 L14 K13 K11 AD26 AC24 AC23 Y19 W16 N16 K14 AC26 AC25 AC21 Y18 V14 T17 M16 K15 J14 H13 L15 AB22 V15 R17 K16 J15 H14 L16 AB23 V16 K17 J16 H15 G14 J13 AB24 AA23 V17 J17 H16 G15 G17 W18 AB26 AB25 AA24 V13 H17 G16 G13 K10 A6 Y26 W25 V24 V23 U23 J10 A7 W26 V25 U24 H10 A8 V26 U25 U21 T20 G10 F10 U26 U22 T21 R20 J12 E10 T24 T23 T22 R21 J11 D10 T26 T25 R24 R22 P20 H11 C10 R25 R23 P22 P21 N20 H12 B10 R26 P24 P23 N21 M20 G11 A10 P26 P25 N22 M21 L20 G12 E11 N26 N25 N24 N23 M22 L21 K20 F12 E12 D11 M25 M23 K21 F11 D12 C11 M26 M24 L23 K22 J21 F14 C12 B11 L25 L24 K23 J22 F13 B12 A11 L26 K24 J23 E14 B13 A12 A1 G18 J26 J25 J20 E13 A13 D9 H24 G22 C21 B20 A16 H25 G24 G23 F22 B21 A20 A15 H26 G25 F23 B22 A21 A17 G26 F24 F21 A22 AA5 AA4 AA3 AB5 AB4 AB3 AD9 AE9 AD8 AE8 A AF9 AF8 AC5 AD5 AE5 AF5 AC4 AD4 AE4 AF4 AC3 AD3 AE3 AC2 AD2 AE2 AC1 AD1 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division BGA638_50_26SQ_S1G3_OEM Title 5 http://pc-120.taobao.com/ 4 3 2 S1G4 HT I/F Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 14 of 54 A B C D E Processor Memory Interface U100C 4 CPU_VDDR PLACE THEM CLOSE TO CPU WITHIN 1" R105 R106 0R C190 10uF DNI H16 18 MEM_MA_RST# 18 MEM_MA0_ODT0 18 MEM_MA0_ODT1 TP46 TP47 Updated on Rev2.0 18 MEM_MA0_CS#0 18 MEM_MA0_CS#1 MEM_MA1_ODT0 MEM_MA1_ODT1 TP48 TP49 3 TP50 TP51 TP52 TP53 18 MEM_MA_CLK2_P 18 MEM_MA_CLK2_N 18 MEM_MA_ADD[0..15] MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 18 MEM_MA_BANK[0..2] MA_RESET_L T19 V22 U21 V19 MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 T20 U19 U20 V20 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 MEM_MA_BANK0 R20 MEM_MA_BANK1 R23 MEM_MA_BANK2 J21 R19 T22 T24 18 MEM_MA_RAS# 18 MEM_MA_CAS# 18 MEM_MA_WE# MB0_ODT0 MB0_ODT1 MB1_ODT0 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 MA_CKE0 MA_CKE1 N19 N20 E16 F16 Y16 AA16 P19 P20 MEMVREF MB_RESET_L MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 J22 J20 18 MEM_MA_CKE0 18 MEM_MA_CKE1 18 MEM_MA_CLK1_P 18 MEM_MA_CLK1_N CPU_VDDR VDDR1 MEM:CMD/CTRL/CLKVDDR5 VDDR2 VDDR6 VDDR3 VDDR7 VDDR4 VDDR8 VDDR9 MEMZP MEMZN VDDR_SENSE AF10 AE10 M_ZP M_ZN 39.2R 39.2R 1.75A U100B D10 C10 B10 AD10 CPU_VDDIO_SUS R100 1.05V MB_CKE0 MB_CKE1 MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L W10 AC10 AB10 AA10 A10 Y10 CPU_VDDR_SENSE 17 CPU_M_VREF_SUS W17 B18 MEM_MB_RST# 18 W26 W23 Y26 MEM_MB1_ODT0 MEM_MB0_ODT0 18 MEM_MB0_ODT1 18 V26 W25 U22 MEM_MB0_CS#0 18 MEM_MB0_CS#1 18 TP7 TP13 J25 H26 MEM_MB_CKE0 18 MEM_MB_CKE1 18 P22 R22 A17 A18 AF18 AF17 R26 R25 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24 To reverse SODIMM socket VDDR MEM_MB_CLK1_P 18 MEM_MB_CLK1_N 18 TP14 TP15 TP16 TP45 MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MB_CLK2_P 18 MEM_MB_CLK2_N 18 MEM_MB_ADD[0..15] 18 R24 MEM_MB_BANK0 U26 MEM_MB_BANK1 J26 MEM_MB_BANK2 U25 U24 U23 MEM_MB_BANK[0..2] 18 MEM_MB_RAS# 18 MEM_MB_CAS# 18 MEM_MB_WE# 18 18 MEM_MB_DM[0..7] SOCKET_638_PIN CPU_VDDIO_SUS 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 R107 1.00K 2 CPU_M_VREF_SUS DEL ACE (margining tool) header R108 1.00K C109 C111 470nF_6.3V 10nF C112 1nF sensing point for op-amp feedback routed near CPU PLACE CLOSE TO CPU MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 A12 B16 A22 E25 AB26 AE22 AC16 AD12 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 MEM_MB_DQS0_P MEM_MB_DQS0_N MEM_MB_DQS1_P MEM_MB_DQS1_N MEM_MB_DQS2_P MEM_MB_DQS2_N MEM_MB_DQS3_P MEM_MB_DQS3_N MEM_MB_DQS4_P MEM_MB_DQS4_N MEM_MB_DQS5_P MEM_MB_DQS5_N MEM_MB_DQS6_P MEM_MB_DQS6_N MEM_MB_DQS7_P MEM_MB_DQS7_N MEM:DATA MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12 E12 C15 E19 F24 AC24 Y19 AB16 Y13 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13 MEM_MA_DATA[0..63] 18 4 To normal SODIMM socket 18 MEM_MB_DATA[0..63] 3 MEM_MA_DM[0..7] 18 MEM_MA_DQS0_P MEM_MA_DQS0_N MEM_MA_DQS1_P MEM_MA_DQS1_N MEM_MA_DQS2_P MEM_MA_DQS2_N MEM_MA_DQS3_P MEM_MA_DQS3_N MEM_MA_DQS4_P MEM_MA_DQS4_N MEM_MA_DQS5_P MEM_MA_DQS5_N MEM_MA_DQS6_P MEM_MA_DQS6_N MEM_MA_DQS7_P MEM_MA_DQS7_N 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 2 SOCKET_638_PIN CPU_VDDR Place close to socket C113 4.7uF C114 4.7uF C115 4.7uF C116 4.7uF C117 220nF C118 220nF C119 220nF C120 220nF C121 1nF C122 1nF C123 1nF C124 1nF C125 180pF C126 180pF C127 180pF C128 180pF 1 1 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title A B http://pc-120.taobao.com/ C D S1G4 DDRIII MEMORY I/F Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 E Sheet 15 of 54 5 4 3 2 1 +5VDUAL R2990 10 D D 2 1U_0402_16V7K Updata on rev:1.2 R1830 1K_0402_5% 2 @C130 @ C130 3 VIN POK VOUT NC FB CPU_VDDA_2.5_RUN 8,17 28 SB_PROCHOT# LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG. +2.5V_LDO 800MA 7 + PC168 1 R1824 10K_0402_5% 2 49 EC_PROCHOT# AEP Head 26R_600mA C183 180pF C132 4.7UF C133 220nF C134 3.3NF C135 20 CPU_CLKP 20 CPU_CLKN 27P_0402_16V7K @ 3.9NF CPU_VDDA_RUN Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2" CPU_CLKIN_SC_P CPU_CLKIN_SC_N R173 169R C136 3.9NF Note. LDTREQ_L may be left unconnected as its function is not supported by the s1g4 +3.3V +1.8V +1.5V +1.5V C138 R193 300R PWRGD 26 CPU_PWRGD C176 180pF DNI C337 180pF DNI AF4 AF5 AE6 8 CPU_VDD1_RUN_FB_H 8 CPU_VDD1_RUN_FB_L CPU_VDDIO_SUS Update on rev:1.1 TP4 R258 510R TP17 TP19 LDT_STOP# TP39 TP40 DEL R254 510R PLL bypass debug option supports AC couple & DC bias TP22 TP20 R6 P6 F6 E6 TP35 Y6 TP36 AB6 CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI G10 AA9 AC9 AD9 AF9 CPU_TEST23_TSTUPD AD7 CPU_TEST18_PLLTEST1 CPU_TEST19_PLLTEST0 CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L TP21 TP11 TP9 TP10 TP12 TP18 A9 A8 TP41 B7 TP42 A7 TP43 F10 TP87 C6 CPU_HTREF0 CPU_HTREF1 8 CPU_VDD0_RUN_FB_H 8 CPU_VDD0_RUN_FB_L CPU_LDT_RST_HTPA# R191 300R 23,26 CPU_LDT_STOP# TP33 TP34 LDT_RST# PWRGD LDT_STOP# CPU_LDT_REQ#_CPU 44.2R 44.2R NC_TC7SZ07F +1.5V C R115 R116 R126 NC_4.7K U4503 1 NC VCC 5 2 INA 3 GND 4 OUT Y LDT_RST# 26 CPU_LDT_RST# CPU_VLDT NC_100nF F8 F9 CPU_SIC CPU_SID CPU_ALERT place them to CPU within 1.5" Keep net PWRGD, LDT_STOP#, LDT_RST# no stub R187 300R NC_0R R146 0R R169 H10 G9 E9 E8 CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN AB8 AF7 AE7 AE8 AC8 AF8 CPU_TEST9_ANALOGIN CPU_TEST6_DIECRACKMON C2 AA6 R138 0R A3 A5 B3 B5 C1 CPU_PROCHOT#_VDDIO Update on rev:1.1 R142 and Q110 is DNI, S1G4 does not support MEMHOT_L U100D FB26 R1825 22K_0402_5% 1 2 2 2 8 PC207 @ 22U_1206_6.3V VDDA_PWRGD UP7717ASU8_PSOP_8 6 1 1 5 EN R293 R1829 NC_10K_0402_5% 2 1 100_J 0R 1 1 PC106 100u 2 2 1 GND1 PR237 GND 2 VCNTL U2911 +3.3V 4 1 NC_100_J 9 2 1 PR238 49 VDDA_EN_EC VDDA1 VDDA2 VSS RSVD11 CLKIN_H CLKIN_L SVC SVD RESET_L PWROK LDTSTOP_L LDTREQ_L SIC SID ALERT_L THERMTRIP_L PROCHOT_L MEMHOT_L THERMDC THERMDA CPU_VDDIO_SUS M11 W18 CPU_VDDIO_SUS A6 A4 CPU_SVC_R CPU_SVD_R AF6 AC7 AA8 CPU_THERMTRIP#_VDDIO CPU_PROCHOT#_VDDIO W7 W8 CPU_THERMDC CPU_THERMDA R140 1K 300R VDDIO_FB_H VDDIO_FB_L VDD1_FB_H VDD1_FB_L VDDNB_FB_H VDDNB_FB_L DBRDY TMS TCK TRST_L TDI DBREQ_L TDO TEST23 TEST28_H TEST28_L TEST18 TEST19 TEST17 TEST16 TEST15 TEST14 TEST25_H TEST25_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 TEST7 TEST10 TEST8 TEST29_H TEST29_L TEST9 TEST6 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 2 place them under CPU Q108 MMBT3904 3 TP37 NC_0R NC_0R W9 Y9 TP44 TP55 H6 G6 TP54 TP56 E10 CPU_THERMTRIP# 27 CPU_PROCHOT#_VDDIO 26 DEL SB_CPU_THRMDA/ SB_CPU_THRMDC HT_REF0 HT_REF1 VDD0_FB_H VDD0_FB_L R143 10K R141 1 1 +3.3V R171 R172 H_THRMDC H_THRMDA CPU_VDDIO_SUS_FB_H 9 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L 8 8 Update on rev:1.1 Thermdc and Thermda should be routed away to VRM, crystal, etc. Customer should follow the MBDG. However, Guam is using TSI so this does not applies to Guam. CPU_DBREQ# route as differential as short as possible testpoint under package AE9 CPU_TDO J7 H8 CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N TP6 TP8 TP61 TP62 TP63 TP64 D7 E7 F7 C7 CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0 C3 K8 CPU_TEST7_ANALOG_T CPU_TEST10_ANALOGOUT TP25 TP26 C4 CPU_TEST8_DIG_T TP27 C CPU_VDDIO_SUS CPU_DBREQ# CPU_TEST27_SINGLECHAIN C9 C8 CPU_TEST29_H_FBCLKOUT_P TP23 H18 H19 AA7 D5 C5 CPU_TEST29_L_FBCLKOUT_N R184 80.6R TP24 Route as 80ohm, diff R184's value is TBD. SOCKET_638_PIN R198 R147 300R NC_1K R185 DNI 300R CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0 R148 R149 R150 R151 R152 R153 DNI R154 DNI 1K 1K 1K 1K NC_1K 300R 300R CPU_TEST18_PLLTEST1 CPU_TEST19_PLLTEST0 CPU_TEST23_TSTUPD CPU_DBRDY R155 R156 R162 DNI R166 DNI 1K 1K 1K 300R CPU_VDDIO_SUS CPU_TEST10_ANALOGOUT C336 DNI 220pF NC_0R NC_0R 1 DNI 220pF R298 1K D106 2 B R301 0R 49 49 SCLK2 SDATA2 49 SMBALERT# DNI R132 8 0R DNI R133 7 6 5 +1.5V CPU_ALERT R314 U103 SCLK VDD SDATA D+ ALERT D- 4 NC_ADM1032ARMZ 0R 0R 0R Note: To override VID, Remove R192, R194, R196, install R165 set VID via SW100 H_THRMDC C182 2.2nF_50V DNI TP31 TP28 CPU_SVC 8 CPU_SVD 8 CPU_PWRGD_SVID_REG R194 R196 R192 H_THRMDA 3 1K R160 VID Override Circuit 8 TP29 TP30 N$325219 THERM 2 DEL AEP HEAD C139 NC_100nF 1K R159 R158 1K DNI N$325218 GND 1 CPU_SVC_R CPU_SVD_R PWRGD R163 R157 1K DNI R161 0R DNI 49 0R 1.5V DEL SB-TSI HEADER +3.3VDUAL 49 TSI_DAT R325 1K CPU_SID 0R Q117 2 MMBT3904 3 CPU_VLDT R294 Q119 2 MMBT3904 3 1 RB501V-40 TSI_CLK R295 1K CPU_SIC 0R B 300R CPU_VDDIO_SUS SCLK3 27 SDATA3 27 R197NC_220R 1 RB501V-40 1 3.3V DEL SB-TSI HEADER R327 R309 Q118 2 MMBT3904 D107 2 1 3 R215 DNI R147, R152 is installed ONLY when SCAN is enabled R215, R185 internal ONLY R162 is TBD R298, R295's value is TBD. 2.2K C179 DNI 220pF R268 2.2K R165 DNI220R C110 R220 2.2K R164NC_220R R221 2.2K Tek differential probing point U103 is not used; CPU thermal control is based on TSI by default. for normal operation open all switches BOOT VOLTAGE(VDD) SVC SVD 0 0 1 1 0 1 0 1 (CPUVRM_PRO# = VCC/GND) 1.1 1.0 0.9 0.8 (CPUVRM_PRO# = OPEN) 1.1 1.2 1.0 0.8 VID OVERIDE TABLE (VDD) DEL SCAN Connector HDT pin24 can be VDDIO Level if only Purple Possum is used. For old HDT tool, 3.3v level shift is required. However, Purple Possum can tolerance 3.3v. CPU_VDDIO_SUS A A TP84 CPU_DBREQ# TP32 CPU_DBRDYTP59 CPU_TCK TP60 CPU_TMS TP76 CPU_TDI TP77 CPU_TRST# TP81 CPU_TDO TP82 TP83 CPU_LDT_RST_HTPA# TP85 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title HDT Connector 5 4 3 2 http://pc-120.taobao.com/ S1G4 CTRL & DEBUG Size D Document Number Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 16 of 54 5 4 3 2 CPU_VDD_RUN 1 BOTTOM SIDE DECOUPLING C140 22uF C141 22uF C142 22uF C143 22uF C144 220nF C145 10nF C146 180pF CPU_VDD_RUN D C147 22uF D C148 22uF C149 22uF C150 22uF C151 220nF C152 10nF C153 180pF U100F DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE CPU_VDDIO_SUS C334 0.22uF C177 0.22uF C162 4.7uF C163 4.7uF C164 4.7uF C165 4.7uF C166 220nF C167 220nF C168 220nF C169 220nF C170 100nF C171 10nF C172 180pF C161 180pF C C4505 100nF IF VDDIO plane is split, add two 0.22uf caps R2980 +5VDUAL 10 @PC152 @ PC152 R529 0R C526 2.2nF DNI U2910 CPU_VDDIO_SUS 2 3 EN VIN NC POK VOUT 8 2 5 @PC201 22U_1206_6.3V VDDR_1.2_EN: 1 : VDDR =1.05V 1.75A 0: VDDR = 0.9V 1.25 A (Default) R1807 FB 1 1 10K_0402_5% 2 UP7717ASU8_PSOP_8 6 + @PC153 @ PC153 NC_0.1U_0402_16V7K 7 R1806 1 PC151 1 2 1.27K_0402_5% 2 1 1 JUMP_43X118 B R532 100R Updata on rev:1.1 0R R531 CPU_VDDR_SENSE 15 1 27P_0402_16V7K @ R1805 10K_0402_5% 2 +3.3V R535 6.81K 3 100nF R536 NC_10k R534 33R C531 150PF VDDR_1.2_EN: 1 : VDDR =1.05V 1.75A 0: VDDR = 0.9V 1.25 A (Default) Q501 2N7002E 1 2 C532 26 VDDR_1.2_EN CPU_VDDR CPU_VDDRP PJ18 2 2 1 8,16 VDDA_PWRGD Note.. VDDR must be 1.05v nominal to support ddr3-1333. VDDR can be droped to 0.9v for DDR3-800 and DDR3-1066 to reduce power consumption 2 1U_0402_16V7K SOCKET_638_PIN B C160 180pF 1 3A C159 220nF 1 cpu_vddio_sus C158 220nF PC154 100u SOCKET_638_PIN C157 22uF 2 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 CPU_VDDIO_SUS Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 C156 22uF VCNTL H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 C155 22uF GND1 4A CPU_VDDIO_SUS VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 C154 22uF GND CPU_VDDNB_RUN K16 M16 P16 T16 V16 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 C175 22uF CPU_VDDIO_SUS 9 CPU_VDDNB_RUN CPU_VDD_RUN VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 CPU_VDDNB_RUN 1 C VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 2 G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 4 U100E CPU_VDD_RUN AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title S1G4 PWR & GND Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 17 of 54 5 4 3 2 MEM_MA_DQS0_N MEM_MA_DQS1_N MEM_MA_DQS2_N MEM_MA_DQS3_N MEM_MA_DQS4_N MEM_MA_DQS5_N MEM_MA_DQS6_N MEM_MA_DQS7_N 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 15 MEM_MA_CLK1_P 15 MEM_MA_CLK1_N 15 MEM_MA_CLK2_P 15 MEM_MA_CLK2_N 15 MEM_MA_CKE0 15 MEM_MA_CKE1 15 MEM_MA_RAS# 15 MEM_MA_CAS# 15 MEM_MA_WE# 15 MEM_MA0_CS#0 15 MEM_MA0_CS#1 15 MEM_MA0_ODT0 15 MEM_MA0_ODT1 101 103 102 104 TP400 73 TP401 74 110 115 113 114 121 116 120 197 201 B 20,27 20,27 200 202 SDATA0 SCLK0 199 +3.3V 30 15 MEM_MA_RST# 198 19 MEM_MA_EVENT# 1 MEM_M_VREF_SUS 126 MEM_M_VREFCA C407C400 C408C401 0.01uf 1nF 0.01uf 1nF Reverse Connector MEM_VTT 2 1 2 3 4 5 6 7 8 9 1 10 11 12 13 14 15 16 17 19 18 20 21 22 23 24 25 26 27 28 +3.3V 29 30 33 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 A 73 CON_SODIMM200_RVS_V1 31 35 37 32 34 36 38 40 42 44 46 48 50 52 54 56 CKE0 CKE1 RAS# CAS# WE# S0# S1# ODT0 ODT1 SA0 SA1 SDA SCL VDDspd RST# EVENT# VREF VrefCA VTT1 VTT2 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 GND2 NC1 NC2 TEST NC NC3 GND1 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 208 77 122 125 205 206 207 196 195 190 189 185 184 179 178 173 172 168 167 162 161 156 155 151 150 145 144 139 138 134 133 128 72 74 76 78 80 82 C404 1uF 84 86 88 90 92 93 94 96 98 99 100 101 102 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 MEM_MB_DQS0_P MEM_MB_DQS1_P MEM_MB_DQS2_P MEM_MB_DQS3_P MEM_MB_DQS4_P MEM_MB_DQS5_P MEM_MB_DQS6_P MEM_MB_DQS7_P 15 15 15 15 15 15 15 15 MEM_MB_DQS0_N MEM_MB_DQS1_N MEM_MB_DQS2_N MEM_MB_DQS3_N MEM_MB_DQS4_N MEM_MB_DQS5_N MEM_MB_DQS6_N MEM_MB_DQS7_N MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 109 108 79 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 11 28 46 63 136 153 170 187 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 101 103 102 104 TP402 73 TP403 74 15 MEM_MB_CKE0 15 MEM_MB_CKE1 110 115 113 114 121 15 MEM_MB_RAS# 15 MEM_MB_CAS# 15 MEM_MB_WE# 15 MEM_MB0_CS#0 15 MEM_MB0_CS#1 116 120 15 MEM_MB0_ODT0 15 MEM_MB0_ODT1 R401 +3.3V MEM_MA_TEST 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 15 MEM_MB_CLK1_P 15 MEM_MB_CLK1_N 15 MEM_MB_CLK2_P 15 MEM_MB_CLK2_N TP57 20,27 20,27 SDATA0 SCLK0 4.7K 197 201 200 202 199 +3.3V 30 15 MEM_MB_RST# 198 19 MEM_MB_EVENT# 1 MEM_M_VREF_SUS 126 MEM_M_VREFCA C409C402 0.01uf 1nF C418C403 0.01uf 1nF MEM_VTT +3.3V 203 204 2 3 8 9 13 14 19 20 25 26 31 32 C405 1uF 66 70 85 89 15 15 15 15 15 15 15 15 MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 DDR3_SO-DIMM_SOCKET_1.5V_REVERSE 103 105 107 108 109 110 111 112 117 FOXCONN_AS0A626_U2SN_7F-2 114 116 118 119 120 121 122 123 124 A0 A1 A2 A3/A4 A4/A3 A5/A6 A6/A5 A7/A8 A8/A7 A9 A10/AP A11 A12_BC# A13 A14 A15/BA3 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC3 NC4 NC1 NC2 TEST BA0/BA1 BA1/BA0 BA2 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# CK0 CK0# CK1 CK1# CKE0 CKE1 RAS# CAS# WE# S0# S1# ODT0 ODT1 SA0 SA1 SDA SCL VDDspd RST# EVENT# VREF VrefCA VTT1 VTT2 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 GND2 GND1 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 MEM_MB_DATA[0..63] 15 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 G1 G2 77 122 125 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 D C MEM_MB_TEST TP58 B 208 207 196 195 190 189 185 184 179 178 173 172 168 167 162 161 156 155 151 150 145 144 139 138 134 133 128 Standard Connector 1 1 2 3 5 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 24 23 25 26 27 2 28 29 30 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 77 78 79 80 81 82 84 83 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 103 102 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 120 119 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 139 138 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 157 156 158 159 160 161 162 200 163 199 164 165 166 167 168 169 170 171 172 173 175 174 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 194 193 195 196 197 198 199 200 A DDR3_SO-DIMM_SOCKET_1.5V_REVERSE FOXCONN_AS0A626_UASN_7F-2 104 106 113 115 J401 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 CK0 CK0# CK1 CK1# 64 68 81 83 91 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# 15 MEM_MB_DM[0..7] 58 60 87 95 97 2 3 8 9 13 14 19 20 25 26 31 32 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 15 MEM_MB_ADD[0..15] 15 MEM_MB_BANK[0..2] 62 75 77 79 203 204 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 CON_SODIMM200_STD_V1 15 15 15 15 15 15 15 15 11 28 46 63 136 153 170 187 MEM_MA_DATA[0..63] 15 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 DDR3 SO-DIMM (Reverse) MEM_MA_DQS0_P MEM_MA_DQS1_P MEM_MA_DQS2_P MEM_MA_DQS3_P MEM_MA_DQS4_P MEM_MA_DQS5_P MEM_MA_DQS6_P MEM_MA_DQS7_P MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 BA0/BA1 BA1/BA0 BA2 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 C 15 15 15 15 15 15 15 15 109 108 79 J402 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 15 MEM_MA_DM[0..7] MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 A0 A1 A2 A3/A4 A4/A3 A5/A6 A6/A5 A7/A8 A8/A7 A9 A10/AP A11 A12_BC# A13 A14 A15/BA3 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 15 MEM_MA_BANK[0..2] 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 DDR3 SO-DIMM (Reverse) D MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 15 MEM_MA_ADD[0..15] 1 CPU_VDDIO_SUS 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 CPU_VDDIO_SUS 125 126 127 128 129 131 133 135 130 132 134 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 136 137 138 139 140 141 142 143 144 145 146 147 148 149 151 150 152 153 154 155 156 157 158 159 160 161 162 163 199 164 165 166 Title 167 169 171 168 170 172 173 174 175 176 177 178 179 180 181 182 183 185 187 184 186 188 200 189 190 191 192 193 194 195 197 196 198 199 200 5 http://pc-120.taobao.com/ 4 3 2 DDR3 SODIMMS: A/B CHANNEL Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 18 of 54 5 4 3 MEM_VTT 2 1 MEM_VTT D D C415 DNI C414 100nF C430 CPU_VDDIO_SUS 100nF C431 DE-COUPLING FOR CHANNEL A SODIMM DNI 100nF CPU_VDDIO_SUS 100nF DE-COUPLING FOR CHANNEL B SODIMM CPU_VDDIO_SUS CPU_VDDIO_SUS C450 100nF C451 100nF C452 100nF C453 100nF C454 100nF C455 100nF C594 C634 C640 C641 C642 C643 C480 NC_100nF NC_100nF NC_100nF NC_100nF NC_100nF NC_100nF 100nF C595 C596 C597 C598 C628 C633 NC_100nF NC_100nF NC_100nF NC_100nF NC_100nF NC_100nF C481 100nF C482 100nF C483 100nF C484 100nF C485 100nF DE-COUPLING FOR CHANNEL B SODIMM (ONE CAP PER POWER PIN) DE-COUPLING FOR CHANNEL A SODIMM (ONE CAP PER POWER PIN) C C CPU_VDDIO_SUS C500 100uF_6.3V CPU_VDDIO_SUS MEM_VTT C501 100uF_6.3V C502 100uF_6.3V C505 4.7uF MEM_VTT C503 100uF_6.3V C506 4.7uF LAYOUT: PLACE CLOSE TO DIMMs CPU_VDDIO_SUS R420 1.00K MEM_M_VREFCA B B MEM_VREF_SUS CPU_VDDIO_SUS R421 1.00K MEM_M_VREF_SUS R409 1.00K CPU_VDDIO_SUS CPU_VDDIO_SUS 1 R410 1.00K R405 2.2K R402 2.2K 3 2 Q401 MMBT3904 R403 2.2K MEM_MA_EVENT# 18 1 27 CPU_MEMHOT# R404 2.2K 3 2 Q402 MMBT3904 A 1 R408 2.2K 3 5 LAYOUT: PLACE CLOSE TO DIMMs MEM_MB_EVENT# 18 A +3.3V Bitland Information Techonogy Co.,Ltd. Notebook R&D Division R416 2.2K 2 Q403 MMBT3904 Title SB800_MEMHOT# 26 http://pc-120.taobao.com/ 4 3 2 DDR3 SODIMM DECOUPLING Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 19 of 54 5 +3.3V 4 3 2 1 CLK_VDD FB1 1 2 Steward HZ0805E601R-00 C1 10uF C7 0.1u C3 0.1u C4 0.1u C5 0.1u C6 0.1u C8 01.u C10 0.1u C9 0.1u C11 0.1u C19 0.1u 0.1uF near the every power pin. D D Place within 0.5" of CLKGEN U1A CLK_VDD 11 14 21 28 33 36 40 48 52 56 3 10 15 20 24 27 34 35 39 45 53 CPU_K8_0 CPU_K8_0# CPU_K8_1 CPU_K8_1# ATIGCLK_0 ATIGCLK_0# ATIGCLK_1 ATIGCLK_1# ATIGCLK_2 ATIGCLK_2# VSS_48 VSS_SRC_1 VSS_SRC_2 VSS_SB_SRC VSS_ATIGCLK_1 VSS_ATIGCLK_2 VSS VSS_A VSS_CPU VSS_HTT VSS_REF SB_SRC_0 SB_SRC_0# SB_SRC_1 SB_SRC_1# SRC_0 SRC_0# SRC_1 SRC_1# SRC_2 SRC_2# SRC_3 SRC_3# 22pF 4 1 C819 VDD_SRC_1 VDD_SRC_2 VDD_SB_SRC VDD_ATIGCLK_1 VDD VDD_A VDD_CPU VDD_HTT VDD_REF VDD_48 Y3 14.318MHz Y_SMD3225 C820 18,27 SCLK0 32 31 30 29 26 25 NBGFX_CLKP_R NBGFX_CLKN_R GFX_CLKP GFX_CLKN R865 R886 R864 R884 EXT EXT EXT EXT 23 22 19 18 NBSLINK_CLKP_R NBSLINK_CLKN_R SBSRC_CLKP_R SBSRC_CLKN_R R888 EXT R882 EXT R890 EXT R883 EXT PCIE_LAN_CLKP_R PCIE_LAN_CLKN_R R889 R880 EXT EXT PCIE_PE2_CLKP_R PCIE_PE2_CLKN_R R833 R874 EXT EXT 17 16 13 12 8 9 7 6 R861 261R 0R DNI 0R CPU_CLKP CPU_CLKN 0R 0R 0R 0R 16 16 NB_GFX_REFCLKP 23 NB_GFX_REFCLKN 23 PCIE_REFCLKP 31 PCIE_REFCLKN 31 0R 0R 0R 0R Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose. NBLINK_RCLKP 23 NBLINK_RCLKN 23 SBSRC_CLKP 26 SBSRC_CLKN 26 0R 0R 0R 0R PCIE_LAN_CLKP PCIE_LAN_CLKN 48 48 PCIE_PE2_CLKP PCIE_PE2_CLKN 47 47 NB CLOCK INPUT TABLE NB CLOCKS RS740 44 4 5 RX780 RS780 HT_REFCLKP NC 100M DIFF 100M DIFF 100M DIFF 100M DIFF REFCLK_N 14M SE (3.3V) NC 14M SE (1.8V) NC 14M SE (1.1V) vref GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)* GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF C REFCLK_P HTT_0/66M_0 HTT_0#/66M_1 8.2K EXT CLK_CLK CLK_SDATA 0R EXT EXT XTAL_IN XTAL_OUT R872 43 R877 R814 R875 HT_REFCLKN 54 55 22pF CLK_VDD CPU_CLKP_R CPU_CLKN_R 66M SE(SINGLE END) 2 3 XTAL 14.31818MHz 20pF / 30ppm C 42 41 38 37 PD# 48MHz_0 48MHz_1 RESTORE# REF_0/SEL_HTT66 REF_1 REF_2 SCL SDA 47 46 2 1 51 50 49 NBHTREF_CLKP_R NBHTREF_CLKN_R R835 R847 EXT EXT 0R 0R HT_REFCLKP HT_REFCLKN 23 23 Update on rev:1.2 48M_USB_1 SEL_HT66 REF1 NB_OSC_R TP623 R869 R34 EXT NC_33R 158R SB_OSC NB_OSC CLK_CLK SLG8LP625 27 23 SB_OSC - 3.3v NB_OSC - 1.1V 158R/90.9R R35 90.9R * RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode. R34/R35 (value may change) OSC_14M_NB 18,27 SDATA0 R876 0R CLK_SDATA RS740 3.3V 33R serial RX780 1.8V 33R/43R RS780 1.1V 200R/100R CLK_VDD NB_OSC_R REF1 C14 10pF C15 10pF R870 NC_8.2K EXT 1 B 66 MHz 3.3V single ended HTT clock SEL_HTT66 100 MHz differential HTT clock 0* SEL_HT66 1* 100 MHz non-spreading differential SRC clock 0 100 MHz spreading differential SRC clock B SEL_SATA 48M_USB_1 C18 NC_10pF SEL_HT66 C20 10pF R871 8.2K EXT * default EMI Capacitor A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title EXTERNAL CLOCK GENERATOR Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 20 of 54 D C 4 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15 14 14 14 14 HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1 14 14 14 14 HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1 3 Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25 AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W21 W20 V21 V20 U20 U21 U19 U18 T22 T23 AB23 AA22 M22 M23 R21 R20 R200 301R BOM 为300 HT_RXCALP HT_RXCALN C23 A24 2 U200A HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N PART 1 OF 6 HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N HYPER TRANSPORT CPU I/F 5 HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22 F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18 H24 H25 L21 L20 HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 D HT_NB_CPU_CLK_H0 14 HT_NB_CPU_CLK_L0 14 HT_NB_CPU_CLK_H1 14 HT_NB_CPU_CLK_L1 14 M24 M25 P19 R18 B24 B25 1 C HT_NB_CPU_CTL_H0 14 HT_NB_CPU_CTL_L0 14 HT_NB_CPU_CTL_H1 14 HT_NB_CPU_CTL_L1 14 HT_TXCALP HT_TXCALN R201 301R RS880M A11 HF MVD B B DEL HTPA PROBE CONNECTOR FOR DEBUG( NB SIDE) A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 RS880M-HT LINK I/F Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 21 of 54 5 4 3 TP254 TP255 TP264 TP265 AE3 AD4 AE2 AD3 AD1 AD2 V5 W6 U5 U6 U8 U7 TP258 TP259 TP260 TP261 TP256 TP257 TP262 TP263 AA8 Y8 AA7 Y7 AA5 AA6 W5 Y5 C PROBE PROBE 48 PCIE_LAN_NB_RXP 48 PCIE_LAN_NB_RXN 26 26 26 26 26 26 26 26 PCIE_SB_NB_RX0P PCIE_SB_NB_RX0N PCIE_SB_NB_RX1P PCIE_SB_NB_RX1N PCIE_SB_NB_RX2P PCIE_SB_NB_RX2N PCIE_SB_NB_RX3P PCIE_SB_NB_RX3N U200B GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N PART 2 OF 6 PCIE I/F GFX D D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3 GFX_RX0P_C GFX_RX0N_C GFX_RX1P_C GFX_RX1N_C GFX_RX2P_C GFX_RX2N_C GFX_RX3P_C GFX_RX3N_C GFX_RX4P_C GFX_RX4N_C GFX_RX5P_C GFX_RX5N_C GFX_RX6P_C GFX_RX6N_C GFX_RX7P_C GFX_RX7N_C GFX_RX8P_C GFX_RX8N_C GFX_RX9P_C GFX_RX9N_C GFX_RX10P_C GFX_RX10N_C GFX_RX11P_C GFX_RX11N_C GFX_RX12P_C GFX_RX12N_C GFX_RX13P_C GFX_RX13N_C GFX_RX14P_C GFX_RX14N_C GFX_RX15P_C GFX_RX15N_C 1 MXM3.0 need put the CAP on the motherboard. Close to the MXM Slot MXM3.0 need put the CAP on the motherboard. Close to the MXM Slot 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 2 PCIE I/F GPP PCIE I/F SB GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN) A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2 AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2 C202 C204 C206 C208 C210 C212 C214 C216 C218 C220 C222 C224 C226 C228 C230 C232 100nF_6.3V C203 100nF_6.3V C205 100nF_6.3V C207 100nF_6.3V C209 100nF_6.3V C211 100nF_6.3V C213 100nF_6.3V C215 100nF_6.3V C373 100nF_6.3V C217 100nF_6.3V C219 100nF_6.3V C221 100nF_6.3V C223 100nF_6.3V C225 100nF_6.3V C227 100nF_6.3V C229 100nF_6.3V C231 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V GFX_TX0P_C GFX_TX0N_C GFX_TX1P_C GFX_TX1N_C GFX_TX2P_C GFX_TX2N_C GFX_TX3P_C GFX_TX3N_C GFX_TX4P_C GFX_TX4N_C GFX_TX5P_C GFX_TX5N_C GFX_TX6P_C GFX_TX6N_C GFX_TX7P_C GFX_TX7N_C GFX_TX8P_C GFX_TX8N_C GFX_TX9P_C GFX_TX9N_C GFX_TX10P_C GFX_TX10N_C GFX_TX11P_C GFX_TX11N_C GFX_TX12P_C GFX_TX12N_C GFX_TX13P_C GFX_TX13N_C GFX_TX14P_C GFX_TX14N_C GFX_TX15P_C GFX_TX15N_C 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 D C GPP_TX3P_C GPP_TX3N_C C240 100nF_6.3V C241 AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5 A_TX0P_C A_TX0N_C A_TX1P_C A_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C C246 100nF_6.3V C247 100nF_6.3V C249 100nF_6.3V C251 100nF_6.3V C253 AC8 AB8 R208 R209 C248 C250 C252 1.27K 2.0K 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V 100nF_6.3V PCIE_NB_LAN_TXP 48 PCIE_NB_LAN_TXN 48 PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N DEL header_1x3 26 26 26 26 26 26 26 26 +1.1V RS880M A11 HF MVD Keep the impendance of PCIE lane to 85ohm +/-15% Including the A-link All PCIe lane shou route 8" max for Gen2 connector and max 12" for Gen2 on board devices Guam has the Lasso lane over 8" due to the large board, should use shorter lasso calbe for Guam. Customer need to follow the MBDG. B B RS880M Display Port Support (muxed on GFX) GFX_TX0,TX1,TX2 and TX3 DP0 AUX0 and HPD0 DEL PCIE MIDDLE BUS PROBE FOR DEBUG GFX_TX4,TX5,TX6 and TX7 DP1 AUX1 and HPD1 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 RS880M-PCIE I/F Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 22 of 54 5 4 +3.3V Note:Regarding LDT_STOP# signal,It's required within 40ns skew for both assertion and de-assertion between NB and CPU. +1.8V B200 +1.8V U4504 1 NC VCC 5 2 INA 3 GND 4 OUT Y 16,26 CPU_LDT_STOP# R240 2.2K B201 Termination resstors < 1 inch trace 0R 1 R261 NC_1K+1.5V 2 3 Q3641 NC_3904 Update on rev:1.1 4MA AVDDQ C257 2.2uF_4V 220R NB_LDT_STOP# 44 44 44 NB_VGA_R 44 NB_VGA_G 44 NB_VGA_B R219 140R 1% ** R217 150R 1% R218 150R 1% +1.8V C HSYNC# VSYNC# DAC_SCL DAC_SDAT TP223 B206 220R B208 220R C261 2.2uF_4V 20MA C262 2.2uF_4V 120MA C268 2.2uF_4V HT 100MHZ reference clock 0R R238 I2C_DATA 0R R239 I2C_CLK Clock dif pair for external graphics 20 Clock dif pair for SB and pcie devices GFX_REFCLKP GFX_REFCLKN B R340 R341 NC_4.7K NC_4.7K 10 C25 C24 SYSRESETb POWERGOOD LDTSTOPb ALLOW_LDTSTOP U1 U2 NBLINK_RCLKP NBLINK_RCLKN V4 V3 I2C_CLK I2C_DATA B9 A9 A8 B8 B7 A7 REFCLK_P/OSCIN(OSCIN) REFCLK_N(PWM_GPIO3) GFX_REFCLKP GFX_REFCLKN GPP_REFCLKP GPP_REFCLKN RS880_AUX_CAL I2C_CLK I2C_DATA DDC_CLK0/AUX0P(NC) DDC_DATA0/AUX0N(NC) DDC_CLK1/AUX1P(NC) DDC_DATA1/AUX1N(NC) R241 0R 51 NB_PWRGD_IN R242 1K VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS) LVDS_DIGON(PCE_TCALRP) LVDS_BLON(PCE_RCALRP) LVDS_ENA_BL(PWM_GPIO2) NB_LVDS_TX_L0P NB_LVDS_TX_L0N NB_LVDS_TX_L1P NB_LVDS_TX_L1N NB_LVDS_TX_L2P NB_LVDS_TX_L2N TP200 43 43 43 43 43 43 D DEL THERMAL SENSOR TP203 B18 A18 A17 B17 D20 D21 D18 D19 B16 A16 D16 D17 TP206 TP207 NB_LVDS_TX_CLKLP 43 NB_LVDS_TX_CLKLN 43 +1.8V A13 B13 15MA B202 220R 300MA B205 220R_2A +1.8V A15 B15 A14 B14 C264 100nF C14 D15 C16 C18 C20 E20 C22 C265 4.7UF E9 F7 G12 C259 2.2uF_4V R280 R281 R282 R226 4.7K MIS. STRP_DATA G11 RSVD C8 TMDS_HPD(NC) HPD(NC) SUS_STAT#(PWM_GPIO5) THERMALDIODE_P THERMALDIODE_N TESTMODE D9 D10 R225 4.7K R228 4.7K D12 R243 0R 0R 0R NB_LCD_PWR_EN 43 NB_LCD_BKL_PWM 43 NB_LCD_BKL_EN 43 R231 NC_4.7K 0R AE8 AD8 C +3.3V TP221 TP230 0R 0R R229 NC_4.7K SUS_STAT# 27 SUS_STAT#_R 24 SB_NB_THRMDA 28 SB_NB_THRMDC 28 R230 R232 B D13 TEST_EN R235 1.8K AUX_CAL(NC) +1.8V 26 ALLOW_LDTSTOP VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC) A22 B22 A21 B21 B20 A20 A19 B19 GPPSB_REFCLKP(SB_REFCLKP) GPPSB_REFCLKN(SB_REFCLKN) B10 STRP_DATA VDDLTP18(NC) VSSLTP18(NC) HT_REFCLKP HT_REFCLKN E11 F11 GPP_REFCLKP GPP_REFCLKN 150R VDDA18PCIEPLL1 VDDA18PCIEPLL2 T2 T1 GFX_REFCLKP GFX_REFCLKN TP208 R259 VDDA18HTPLL D7 E7 HT_REFCLKP HT_REFCLKN TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1) DAC_RSET(PWM_GPIO1) PLLVDD(NC) PLLVDD18(NC) PLLVSS(NC) TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC) TXOUT_L2N(DBG_GPIO0) TXOUT_L3P(NC) TXOUT_L3N(DBG_GPIO2) TXOUT_U0P(NC) TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2) TXOUT_U2P(NC) TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5) TXOUT_U3N(NC) DAC_HSYNC(PWM_GPIO4) DAC_VSYNC(PWM_GPIO6) DAC_SCL(PCE_RCALRN) DAC_SDA(PCE_TCALRN) G14 D8 A10 C10 C12 NB_OSC R244 4.7K Clock dif pair for general TP228 EXT purpose pcie devices TP229 RED(DFT_GPIO0) REDb(NC) GREEN(DFT_GPIO1) GREENb(NC) BLUE(DFT_GPIO3) BLUEb(NC) A11 B11 F8 E8 NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP PART 3 OF 6 C_Pr(DFT_GPIO5) Y(DFT_GPIO2) COMP_Pb(DFT_GPIO4) H17 NB_REFCLK_P NB_REFCLK_N NB_GFX_REFCLKP R311 EXT 0R NB_GFX_REFCLKN R312 EXT 0R AVDD1(NC) AVDD2(NC) AVDDDI(NC) AVSSDI(NC) AVDDQ(NC) AVSSQ(NC) A12 D14 B12 PLLVDD PLLVDD18 VDDA18PCIEPLL C266 2.2uF_4V R245 4.7K EXT R236 4.7K 715R VDDA18HTPLL +1.1V 43 NB_LCD_DDC_CLK G18 G17 E18 F18 E19 F19 TP219 PUT R330 ON TRACE DIRECTLY +3.3V 43 NB_LCD_DDC_DATA TP201 TP205 24,44 24,44 65MA 20MA 220R 200R Change B204 to Resistor 3.9R(315003R900G) R237 4.7K E17 F17 F15 R222 B203 B204 C263 22uF TP225 TP204 TP224 TP202 +1.1V U200C F12 E12 F14 G15 H15 H14 +1.8V TC7SZ07F R214 DNI 20MA AVDDDI C255 100nF 0R CRT/TVOUT C4506 100nF PLL PWR LVTM R213 DNI R277 300R AVDD12 110MA 220R C254 2.2uF_4V +1.8V D 1 NB_RST#_IN PM 0R 2 CLOCKs R210 24,26,31,49 A_RST# 3 RS880M A11 HF MVD 20 NBLINK_RCLKP NB_ALLOW_LDTSTOP 20 NBLINK_RCLKN NB_PWRGD_IN 20 HT_REFCLKP 20 HT_REFCLKN PLACE R291, R292 CLOSE TO NB(R291, R292 IS FOR A11 SB800 ONLY) 20 NB_GFX_REFCLKP 20 NB_GFX_REFCLKN DEL A RS880M UVD DEBUG HEAD RS880M JTAG A 8BIT DEBUG HEADER Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 RS880M-SYSTEM I/F Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 23 of 54 5 4 3 2 1 U200D D AD16 AE17 AD17 W12 Y12 AD18 AB13 AB18 V14 V15 W14 AE12 AD12 PAR 4 OF 6 MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC) MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC) SBD_MEM/DVO_I/F AB12 AE16 V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14 Y14 MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC) MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC) MEM_DQ12(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC) MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS1P(NC) MEM_DQS1N(NC) MEM_CKP(NC) MEM_CKN(NC) MEM_COMPP(NC) MEM_COMPN(NC) MEM_DM0(NC) MEM_DM1/DVO_D8(NC) IOPLLVDD18(NC) IOPLLVDD(NC) IOPLLVSS(NC) MEM_VREF(NC) AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21 D DEL U202 Y17 W18 AD20 AE21 W17 AE19 15mA AE23 AE24 +1.8V +1.1V AD23 AE18 SPM_VREF STRAP_DEBUG_BUS_GPIO_ENABLEb RS880M A11 HF MVD R255 0R 23,44 R260 VSYNC# 3K R273 DNI +3.3V Enables the Test Debug Bus using GPIO. 3K 1% C RS880M 1 Disable 0 Enable C DFT_GPIO1: LOAD_EEPROM_STRAPS Selects Loading of STRAPS from EPROM D201 RB501V-40 23 SUS_STAT#_R 2 R279 DNI DNI 1 A_RST# 23,26,31,49 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected 3K DEL SDRAM DDR3 B B RS880M: Enables Side port memory 23,44 HSYNC# R275 3K R276 NC_3K +3.3V RS880M:HSYNC# Selects if Memory SIDE PORT is available or not 1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 RS880M-SPMEM/STRAPS Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 24 of 54 3 RS880M POWER TABLE U200F RS880M A11 HF MVD VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8 VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40 PART 6/6 1 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 U200E 600MA 120R 2 A 100MHz J17 K16 L16 M16 P16 R16 T16 VDDHT C296 4.7UF +1.1V R271 120R 2 A 100MHz C297 100nF C301 100nF 700MA C302 100nF VDDHTRX C310 10uF_6.3V C312 100nF C299 100nF C313 100nF VLDT R263 120R 2 A 100MHz 400MA C314 4.7UF VDDHTTX 1.2V / 1.1V C317 100nF C318 100nF C319 100nF C341 100nF +1.8V B216 700MA 220R_2A VDDA18PCIE B C348 4.7UF C329 4.7UF C330 100nF C331 100nF C332 100nF C333 100nF +1.8V R265 0R C339 1uF H18 G19 F20 E21 D22 B23 A23 AE25 AD24 AC23 AB22 AA21 Y20 W19 V18 U17 T17 R17 P17 M17 J10 P10 K10 M10 L10 W9 H9 T10 R10 Y9 AA9 AB9 AD9 AE9 U10 F9 G9 AE11 AD11 10MA 25MA VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7 PART 5/6 VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7 VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13 VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15 VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC) POWER R262 C RS880M PIN NAME RS880M VDDHT +1.1V IOPLLVDD +1.1V VDDHTRX +1.1V AVDD +3.3V VDDHTTX +1.2V AVDDDI +1.8V VDDA18PCIE +1.8V AVDDQ +1.8V VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC) VDD33_1(NC) VDD33_2(NC) A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9 VDDG18 +1.8V PLLVDD +1.1V VDD18_MEM +1.8V PLLVDD18 +1.8V VDDPCIE +1.1V VDDA18PCIEPLL +1.8V VDDC +1.1V VDDA18HTPLL +1.8V VDDLTP18 +1.8V VDD_MEM L12 M14 N13 P12 P15 R11 R14 T12 U14 U11 U15 V12 W11 W15 AC12 AA14 Y18 AB11 AB15 AB17 AB19 AE20 AB21 K11 VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27 A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25 +1.1V PIN NAME D GROUND D 2 AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15 4 A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2 5 100R 100MHZ 3A R264 2.5A VDD_PCIE +1.8V/1.5V VDDG33 +3.3V VDDLT18 +1.8V IOPLLVDD18 +1.8V VDDLT33 NC +1.1V C C304 100nF C305 100nF C298 1uF_6.3V C303 1uF_6.3V C309 4.7UF VCC_NB K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16 C320 100nF C321 100nF C322 100nF C323 100nF C324 100nF C325 100nF C326 100nF C327 C328 10uF_6.3V 10uF_6.3V B AE10 AA11 Y11 AD10 AB10 AC10 +3.3V 60MA H11 H12 C342 100nF RS880M A11 HF MVD R269 0R C343 100nF A A DEL FAN CIRCUIT Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 RS880M-POWER Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 25 of 54 5 4 3 2 1 PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U600 U600A 100nF_6.3V R601 R602 PCIE_VDDR 47 PCIE_SB_PE2_TXP 47 PCIE_SB_PE2_TXN PROBE TP670 PROBE TP671 590R 2.0K AA22 Y21 AA25 AA24 W23 V24 W24 W25 TP662 TP663 TP660 TP661 NOTE: SB8XX ONLY SUPPORTS 2 GPP PORT 2 AND 3 IS NOT SUPPORTED. M23 P23 20 SBSRC_CLKP 20 SBSRC_CLKN NOTE: The 0R serial resistor on SB CLK pair must share Pad with the serial resistor close to U800 AD29 AD28 100nF_6.3V C709 47 PCIE_PE2_SB_RXP 47 PCIE_PE2_SB_RXN B 1% 1% AA28 100nF_6.3V AA29 Y29 PROBE TP668 Y28 PROBE TP669 Y26 Y27 W28 W29 C708 J613 CLOSE TO U600 C AE24 AE23 AD25 AD24 AC24 AC25 AB25 AB24 TP650 TP651 TP652 TP653 TP654 TP655 TP656 TP657 U29 U28 T26 T27 V21 T21 V23 T23 FOR EXT GRAPHICS L29 L28 N29 N28 FOR WIFI M29 M28 FOR LAN T25 V25 L24 L23 P25 M25 P29 P28 N26 N27 T29 T28 Updated on Rev2.0 Updata on rev:1.2 C694 PLACE THESE COMPONENTS CLOSE TO U600, AND USE GROUND GUARD FOR 32K_X1 AND 32K_X2 C695 27pF Y15 25MHz 2 3 1 4 R774 DNI 0R R763 0R TP606 L25 PCIE_CALRP PCIE_CALRN GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N PCIE_RCLKP/NB_LNK_CLKP PCIE_RCLKN/NB_LNK_CLKN NB_DISP_CLKP NB_DISP_CLKN NB_HT_CLKP NB_HT_CLKN CPU_HT_CLKP CPU_HT_CLKN SLT_GFX_CLKP SLT_GFX_CLKN GPP_CLK0P GPP_CLK0N AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK# INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35 GPP_CLK1P GPP_CLK1N GPP_CLK2P GPP_CLK2N GPP_CLK3P GPP_CLK3N GPP_CLK4P GPP_CLK4N GPP_CLK5P GPP_CLK5N GPP_CLK6P GPP_CLK6N LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48 GPP_CLK7P GPP_CLK7N GPP_CLK8P GPP_CLK8N L26 R651 1M 25M_X2 L27 V2 AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7 AJ6 AG6 AG4 AJ4 47 30 30 30 30 TP2816 D +3.3V R3614 R3615 NC_100K NC_100K +3.3VDUAL MXM_PRESENT2# MXM_PRESENT1# C3122 DNI R3612 100K 25M_X2 4 2 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 R796 TP2814 0R VDDR_1.2_EN 17 TP2815 R617 33R PCIE_RST# 27,31,36,47,48 C749 150PF 0R PCI_AD[27..23] 30 Updated on Rev2.0 TP2811 TP2812 TP2813 0R SB800_MEMHOT# 19 R614 R797 U3104 NC7SZ08M5 DNI Update on rev:1.1 ALLOW_LDTSTOP R798 NC_0R CPU_LDT_STOP# R799 NC_0R C TEST PURPOSE ONLY TP274 INTRUDER_ALERT# R804 PROBE R771 0R PE_GPIO1 40 PCI_CLKRUN# +3.3V R809 20K GUAM GPIO33 H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19 PE_GPIO1 PE_GPIO0 TP278 R773 0R R661 R662 22R 22R NC_0R 49 PE_GPIO0 31 LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# 30,49 30,47 47,49 47,49 47,49 47,49 47,49 SERIRQ 49 R1821 10K_0402_5% +3.3V 2 1 R1823 10K_0402_5% 2 1 R808 20K BIMINI B FOR BIOS AUTO DETECTION(GUAM V.S. BIMINI) +3.3VALW R1808 0_0402_5% ALLOW_LDTSTP/DMA_ACTIVE# PROCHOT# LDT_PG LDT_STP# LDT_RST# G21 H21 K19 G22 J24 0R R648 ALLOW_LDTSTOP 23 CPU_PROCHOT#_VDDIO CPU_PWRGD 16 CPU_LDT_STOP# 16,23 CPU_LDT_RST# 16 LBAT54CLT1G D1 16 1 32K_X2 RTCCLK INTRUDER_ALERT# VDDBT_RTC_G C1 32K_X1 C2 32K_X2 4 + 1 2 3 +RTCVCC D2 B2 B1 INTRUDER_ALERT# VBAT_IN R619 +RTCVCC 3 RTCBAT1 14M_25M_48M_OSC 25M_X1 100nF 1 27 SB_GPIO_PCIE_RST# R3613 PCIE_RST#_C 100K TP2817 PROBE 32K_X1 25M_X1 27pFY_5938 A_RX0P A_RX0N A_RX1P A_RX1N A_RX2P A_RX2N A_RX3P A_RX3N PCIRST# C847 NC_10PF PCI_CLK0 SMSC_CLK PCI_CLK2 PCI_CLK3 PCI_CLK4 22R 22R 22R 22R 22R 5 100nF_6.3V A_TX0P A_TX0N A_TX1P A_TX1N A_TX2P A_TX2N A_TX3P A_TX3N R609 R610 R611 R612 R613 3 C606 100nF_6.3V PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R 2 PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N C604 100nF_6.3V W2 W1 W3 W4 Y1 1 22 22 22 22 22 22 22 22 C602 AD26 AD27 AC28 AC29 AB29 AB28 AB26 AB27 PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39 PCI INTERFACE PCIE_SB_NB_RX0P PCIE_SB_NB_RX0N PCIE_SB_NB_RX1P PCIE_SB_NB_RX1N PCIE_SB_NB_RX2P PCIE_SB_NB_RX2N PCIE_SB_NB_RX3P PCIE_SB_NB_RX3N A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C PCI CLKS 22 22 22 22 22 22 22 22 100nF_6.3V C601 100nF_6.3V C603 100nF_6.3V C605 100nF_6.3V C607 Part 1 of 5 SB800 LPC D C600 PCIE_RST# A_RST# RTC 23,24,31,49 A_RST# P1 L1 CPU PCIE_RST#_C R600 33R PCI EXPRESS INTERFACES 150PF CLOCK GENERATOR C750 2 R1789 2 - Update on rev:1.1 CONN2_R BM05_MIC_WAFER_2P 510R +RTCVCC_EC R1828 NC_0_0603_5% NC_0_0603_5% 1 2 1 Resered for EC and charger battery 32K_X1 A 20M 32K_X2 1 4 4 1 R605 Y4 32.7680KHZ C617 BM05_CLK_32_768M 22pF Y9 NC_32.7680KHZ XS4_8038 3 2 2 3 C616 22pF Update on rev:1.1 5 SB_GPP GFX_CLK 0 1 2 3 4 5 6 7 8 DEVICE MXM3.0 // PE0 PE2 LAN PE1 // PE3 // // CLKREQ# CLK_REQG# 0 1 2 3 4 5 6 7 8 SB800 A11 C645 C618 NC_0.1uF 1uF R623 NC_100K A FOR CMOS CLEAR POWER EXPRESS SUPPORT PE_GPIO0 MXM RESET H: Enable PE_GPIO1 MXM POWER ENABLE H: Enable PE_GPIO2 MODE SWITCH(BY NB) H:MXM Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title L:NB http://pc-120.taobao.com/ 4 TMDS_HPD0 MXM HOT PLUG 3 2 SB8X0-PCIE/PCI/CPU/LPC/CLK Size Document Number Custom Date: Rev 1.0 BM5016 Thursday, August 05, 2010 1 Sheet 26 of 54 4 3 16 CPU_THERMTRIP# 51 NB_PWRGD G1 RSMRST# 26 SB_GPIO_PCIE_RST# 1 26,31,36,47,48 PCIE_RST# 2 3 C732 Q603 1uF 2N7002E R682 NC_0R CPU_THERMTRIP# 42 18,20 18,20 47 47 change to NC SB_SPKR SCLK0 SDATA0 SCLK1 SDATA1 3 R110 40 MXM_PWR_EN 1 36 MB_THERMB 49 KBC_LOW_BAT# 13 SMARTVOLT2 2 2.2K Q3637 2021390400 C +3.3V R625 R626 R701 AD19 AA16 AB21 R795 0R AC18 R784 NC_0R AF20 AE19 AF19 R772 0R AD22 AE22 F5 SCLK1 F4 SDATA1 AH21 TP619 AB18 TP611 E1 AJ21 H4 D5 D7 G5 K3 CLKREQG# AA20 SCLK0 SDATA0 SUS_STAT# 2.2K 2.2K 4.7K TP620 +3.3VDual 46 R5088 R627 R741 R5107 R5108 R5109 R5110 R5111 R695 DNI R710 DNI 10K USB_OCP0#_P SCLK1 10K SDATA1 10K GBE_MDIO 10K 10K GBE_PHY_INTR NC_10KUSB_OC2# 10K USB_OCP1# 10K USB_OCP3# 10K R737 0R 46 USB_OCP1# R734 0R 46 R684 0R USB_OCP0# AZ_BIT_CLK TP617 USB_OCP0#_P TP618 USB_OC2# TP616 TP615 M3 N1 L2 M2 M1 M4 N2 P2 AZ_BIT_CLK JTAG MAPPING: TCK = GEVENT14# TDI = GEVENT13# TDO = GEVENT15# TMS = TEST1 RST# = GEVENT12# AZ_SDATA_IN0 10K USB_OCP3# 30 AZ_SDATA_OUT 42 AZ_SDATA_IN0 AZ_SYNC AZ_RST# C751 1 B 42 2 0402_NPO NC_22P_50V_K_N R2115 AZ_RST#_CD 33R 42 AZ_BIT_CLK_CD R2105 33R AZ_BIT_CLK 42 AZ_SDATA_OUT_CD R2118 33R 42 AZ_SYNC_CD R2111 33R GBE_MDIO AZ_SDATA_OUT 30 AZ_SYNC +3.3V GBE_RXERR R2115 ,R2105 ,R2118,R2111 are placed close to SB800 20 T1 T4 L6 L5 T9 U1 U3 T2 U2 T5 V5 P5 M5 P9 T7 P7 M7 P4 M9 V7 GBE_COL GBE_CRS AZ_RST# R769 NC_10K CLKREQG# SB_OSC R770 NC_10K TP605 +3.3VDual GBE_PHY_INTR R639 NC_22K RSMRST# 49 TP613 TP614 C621 NC_2.2uF_6.3V H3 D1 E4 D4 E8 F7 E7 F8 TP610 E23 E24 F21 G29 D27 F28 F29 E27 USB 1.1 USB MISC USB_FSD1P/GPIO186 USB_FSD1N USB_FSD0P/GPIO185 USB_FSD0N USB_HSD13P USB_HSD13N USB_HSD12P USB_HSD12N USB_HSD11P USB_HSD11N RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51 DDR3_RST#/GEVENT7# GBE_LED0/GPIO183 GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/TRST#/GEVENT12# AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST# GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR PS2_DAT/SDA4/GPIO187 PS2_CLK/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 FC_RST#/GPO160 PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192 USB_HSD10P USB_HSD10N USB_HSD9P USB_HSD9N USB_HSD8P USB_HSD8N USB 2.0 TP612 TP621 Update on rev:1.1 USB_RCOMP ACPI / WAKE UP EVENTS EC_SCI# EC_SMI# SB800 USBCLK/14M_25M_48M_OSC GPIO 49 49 0R 0R PCI_PME#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD SUS_STAT# Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/GEVENT23# GEVENT5# SYS_RESET#/GEVENT19# WAKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# NB_PWRGD USB_HSD7P USB_HSD7N USB_HSD6P USB_HSD6N USB_HSD5P USB_HSD5N USB_HSD4P USB_HSD4N USB_HSD3P USB_HSD3N USB_HSD2P USB_HSD2N USB OC D U600D USB_HSD1P USB_HSD1N USB_HSD0P USB_HSD0N SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200 KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208 EMBEDDED CTRL 7,9,11,40,49,51 SLP_S3# 9,11,46,49 SLP_S5# 0R PWR_BTN# 49 PWR_BTN#_EC R702 EC 49,51 SB_PWRGD 23 SUS_STAT# SB_TEST0 SB_TEST1 TP607 SB_TEST2 R642 49 EC_A20M# R764 49 EC_KB_RST# DEL WIRELESS RADIO SWITCH J2 K1 D3 F1 H1 F2 H5 G6 B3 C4 F6 AD21 AE21 K2 J29 H2 J1 H6 F3 J6 AC19 EMBEDDED CTRL 0R HD AUDIO R641 19 CPU_MEMHOT# 2 GBE LAN 5 KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226 A10 G19 1 TP622 R643 J10 H11 H9 J8 B12 A12 F11 E11 E14 E12 J12 J14 A13 B13 D13 C13 G12 G14 G16 G18 D16 C16 B14 A14 E18 E16 USBP8 USBN8 47 47 USBP7 USBN7 45 45 USBP6 USBN6 45 45 USBP5 USBN5 43 43 USBP4 USBN4 47 47 USBP3 USBN3 46 46 USBP1 USBN1 46 46 USBP0 USBN0 46 46 FOR IMC DEBUG USB15 NA USB14 NA USB13 USB12 USB11 USB10 NA NA NA NA USB9 USB8 USB7 USB6 USB5 NA 3G PCIE Mini Slot Blue Tooth Finger Print CAM USB4 USB3 USB2 USB1 USB0 WIFI PCIE MINI SLOT USB PORT3 NC USB PORT1 USB PORT0 C B17 A17 A16 B16 D25 F23 B26 E26 F25 E22 F22 E21 Update on rev:1.1 SCLK3 SDATA3 GPIO199 GPIO200 G24 G25 E28 E29 D29 D28 C29 C28 30 30 10K R706 2.2K R694 STRAP pin to define use LPC or SPI ROM B TEST2 TEST1 TEST0 TEST MODE DESCRIPTION B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22 0 0 0 0 0 1 Reserved Reserved for ASIC debug 0 1 X Test mode Enable Test Mode 1 X X Reserved Reserved for ASIC debug None Nomal operation SB_TEST0 R686 SB_TEST1 R711 +3.3VDual NC_2.2K NC_2.2K change to NC SB_TEST2 R700 NC_2.2K SB800 SB_TEST0,SB_TEST1,SB_TEST2 has internal 10K PD. R807 R806 R803 10K 10K 10K GBE_RXERR GBE_CRS GBE_COL Bitland Information Techonogy Co.,Ltd. Notebook R&D Division http://pc-120.taobao.com/ 4 16 162.2K R705 10K R698 Title 5 D J16 J18 SB800 A11 A Updata on rev:1.2 11.8K 1% 3 2 SB8X0-GPIO/USB/AZ/RGMII Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 27 of 54 A 5 4 3 2 1 SATA trace should use only 1via on the trace. customers can use 2vias with GND via within 150mils of signal via as long as they can ensure that their platform meets SATA logo requirements. Return loss is expected to get affected with 2 vias. AMD platforms are validated with one via only U600B 41 SATA_RX0-_C 41 SATA_RX0+_C FOR SATA ODD 41 41 C636 C637 SATA_TX1+_C SATA_TX1-_C 10nF 10nF 41 SATA_RX1-_C 41 SATA_RX1+_C SATA_TX0+ SATA_TX0- AH9 AJ9 SATA_RX0SATA_RX0+ AJ8 AH8 SATA_TX1+ SATA_TX1- AH10 AJ10 SATA_RX1SATA_RX1+ AG10 AF10 AG12 AF12 AJ12 AH12 SATA PORTS DISTRIBUTION: 0, - 2.5 INCH DISK DRIVER 1, SATA ODD 2,NOT USED 3, NOT USED 4 & 5, NOT USED AH14 AJ14 AG14 AF14 AG17 AF17 PLACE SATA_CAL RES VERY CLOSE TO BALL OF U600 C AJ17 AH17 AJ18 AH18 AH19 AJ19 D SB800 SATA_TX0P SATA_TX0N FC_CLK FC_FBCLKOUT FC_FBCLKIN Part 2 of 5 SATA_RX0N SATA_RX0P FC_OE#/GPIOD145 FC_AVD#/GPIOD146 FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150 FC_INT1/GPIOD144 FC_INT2/GPIOD147 SATA_TX1P SATA_TX1N SATA_RX1N SATA_RX1P SATA_TX2P SATA_TX2N FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136 FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143 SATA_RX2N SATA_RX2P SATA_TX3P SATA_TX3N SATA_RX3N SATA_RX3P SATA_TX4P SATA_TX4N SATA_RX4N SATA_RX4P SATA_TX5P SATA_TX5N SATA_RX5N SATA_RX5P FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58 SATA_ACT# 22pF DNI 22pF DNI C647 SATA_X1 Y6 NC_25MHz 2 1 3 4 C648 R660 1M DNI Y_5938 SATA_X2 AC16 SATA_ACT#/GPIO67 SATA_X1 SATA_X2 AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26 VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182 W5 W6 Y9 Connect C7 and D8, then go to GND directly. SB_PROCHOT#_C W7 V9 W8 DEL SB_CPU_THRMDA/SB_CPU_THRMDC B6 A6 A5 B5 C7 A3 B4 A4 C5 A7 B7 B8 A8 TEMPIN0 TEMPIN1 MB_THRMDA_SB TEMPIN3 TEMP_COMM J5 E2 K4 K9 G2 R666 0R SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/GPIO161 NC1 NC2 R759 10K R644 R729 0R 0R C700 390pF C697 390pF TEMP_COMM GPIO180 10k R777 10K Q600 CMPT3904 MB_THRMDC_SB R723 R676 0R DNI R699 SB_NB_THRMDA 23 1 C662 390pF R775 10K SPI_DATAIN SPI_DATAOUT SPI_CLK SPI_CS# B AD16 TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174 TEMP_COMM HW MONITOR To meet SB800 SCL1.02: DNI SATA XTAL circuit's parts AD11 SATA_CALRP SATA_CALRN SPI ROM 51 SATA_CALP AB14 SATA_CALN AA14 1.0K 931R AF28 AG29 AG26 AF27 AE29 AF29 AH27 C FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 AVDD_SATA R650 1% R649 1% AH28 AG28 AF26 3 10nF 10nF FLASH C631 C632 SATA_TX0+_C SATA_TX0-_C SERIAL ATA FOR SATA HD 41 41 2 D R709 0R 0R SB_NB_THRMDC 23 R738R740R758R751R739 10K 10K 10K 10K 10K NOTE: ROUTE TEMP_COMM AS A 10MIL TRACE G27 Y2 B +3.3VDual SB800 A11 R726 20K TEMPIN3 2 D604 SD103AWS 1 R685: Normal R666: EXT Programmer SPI_CS# R685 0R R780 R672 1K 10K SPI_CS#_SEL SPI_DATAIN +3.3V 3.3V_SPI 1 2 3 4 C669 100nF U601 CE# SO WP# GND VDD HOLD# SCK SI 8 7 6 5 R665 10K R766 10K Q604 SPI_CLK SPI_DATAOUT 16 SB_PROCHOT# 3 1 +3.3VDual R783 10K 2 MMBT3904 SB_PROCHOT#_C SST25VF016B-50-4C-S2AF A A SST SPI ROM change to SPI mode Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 SB8X0-SATA/IDE/HWM/SPI Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 28 of 54 5 4 3 2 1 PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE. D C670 22uF C671 100nF C672 100nF C673 100nF Part 3 of 5 SB800 VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12 CORE S0 AH1 V6 Y19 AE5 AC21 AA2 AB4 AC8 AA7 AA9 AF7 AA19 +1.1V C609 100nF DNI PCIE_VDDR B601 C C610 22uF +3.3V B608 C613 1uF DNI WIDTH>=50MIL C614 1uF C615 100nF C699 100nF 15mA 220R C704 100nF DNI +1.1V U26 V22 V26 V27 V28 V29 W22 W26 690mA VDDAN_11_PCIE 42R_4A VDDPL_3.3V_SATA C649 2.2uF 1350mA 42R_4A C651 22uF +3.3VDUAL C652 1uF C653 1uF C654 100nF C655 100nF A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19 AVDD_USB 658mA B602 220R_2A C624 1uF B +1.1VDUAL B604 C623 1uF C622 C702 10uF_6.3V 10uF_6.3V at least 20mils wide 220R 88MA VDDAN_1.1V_USB C703 100nF AD14 AJ20 AF18 AH20 AG19 AE18 AD18 AE16 AVDD_SATA B606 AE28 C11 D11 VDDIO_33_GBE_S VDDPL_33_PCIE VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8 VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2 VDDIO_GBE_S_1 VDDIO_GBE_S_2 VDDPL_33_SATA VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12 3.3V_S5 I/O C608 2.2uF POWER VDDPL_3.3V_PCIE CORE S5 11mA 220R VDDRF_GBE_S GBE LAN B600 CLKGEN I/O C718 NC_100nF +3.3V PLL C716 100nF VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4 PCI EXPRESS C715 100nF AF22 AE25 AF24 AC22 SERIAL ATA C714 4.7uF VDDIO_18_FC FLASH I/O 71mA USB I/O WIDTH>=15MIL R779 VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9 VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8 +1.8V 0R VDDAN_11_USB_S_1 VDDAN_11_USB_S_2 VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 VDDCR_11_S_1 VDDCR_11_S_2 VDDIO_AZ_S VDDCR_11_USB_S_1 VDDCR_11_USB_S_2 VDDPL_33_SYS VDDPL_11_SYS_S VDDPL_33_USB_S VDDAN_33_HWM_S VDDXL_33_S C701 2.2uF +1.1V VCC_SB_R U600C 78mA 120R 100MHZ 2A PCI/GPIO I/O R800 WIDTH>=100MIL 790mA N13 R15 N17 U13 U17 V12 V18 W12 W18 R762 C686 1uF C685 1uF C684 10uF C679 100nF 0R +1.1V 42R_4A C724 1uF V1 C680 100nF +1.1V_CKVDD 382mA K28 K29 J28 K26 J21 J20 K21 J22 120R 100MHZ 2A C723 100nF C627 100nF C676 1uF B611 C688 22uF Internal clock generator at least 30mil and with ferrite bead External clock generator thick trace and ferrite bead not requied R592 M10 L7 L9 M6 P8 +3.3VDUAL R677 C683 100nF DNI F26 G26 M8 +3.3VALW_R WIDTH>=20MIL 49mA A21 D21 B21 K10 L10 J9 T6 T8 C682 2.2uF C681 2.2uF 115mA VDDCR_1.1V 15mAWIDTH>=20MIL M21 VDDCR_1.1V_USB 47mA L22 62mA F19 17mA D6 5mA L20 WIDTH>=15MIL 0R C678 1uF VDDIO_AZ A11 B11 +1.1VDUAL R781 C625 10uF_6.3V +1.1VDUAL C692 100nF C626 100nF VDDPL_3.3V_USB +3.3VDUAL VDDAN_3.3V_HWM VDDXL_3.3V 5mA SB800 A11 B610 C611 100nF DNI A9 B10 K11 B9 D10 D12 D14 D17 E9 F9 F12 F14 F16 C9 G11 F18 D9 H12 H14 H16 H18 J11 J19 K12 K14 K16 K18 H19 VSSIO_USB_1 VSSIO_USB_2 VSSIO_USB_3 VSSIO_USB_4 VSSIO_USB_5 VSSIO_USB_6 VSSIO_USB_7 VSSIO_USB_8 VSSIO_USB_9 VSSIO_USB_10 VSSIO_USB_11 VSSIO_USB_12 VSSIO_USB_13 VSSIO_USB_14 VSSIO_USB_15 VSSIO_USB_16 VSSIO_USB_17 VSSIO_USB_18 VSSIO_USB_19 VSSIO_USB_20 VSSIO_USB_21 VSSIO_USB_22 VSSIO_USB_23 VSSIO_USB_24 VSSIO_USB_25 VSSIO_USB_26 VSSIO_USB_27 VSSIO_USB_28 220R C689 2.2uF_6.3V VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 EFUSE VSSAN_HWM M19 VSSXL 220R VDDPL_3.3V VDDPL_1.1V VSSIO_SATA_1 VSSIO_SATA_2 VSSIO_SATA_3 VSSIO_SATA_4 VSSIO_SATA_5 VSSIO_SATA_6 VSSIO_SATA_7 VSSIO_SATA_8 VSSIO_SATA_9 VSSIO_SATA_10 VSSIO_SATA_11 VSSIO_SATA_12 VSSIO_SATA_13 VSSIO_SATA_14 VSSIO_SATA_15 VSSIO_SATA_16 VSSIO_SATA_17 VSSIO_SATA_18 VSSIO_SATA_19 D8 B613 D SB800 Y14 Y16 AB16 AC14 AE12 AE14 AF9 AF11 AF13 AF16 AG8 AH7 AH11 AH13 AH16 AJ7 AJ11 AJ13 AJ16 Y4 C677 1uF WIDTH>=15MIL 58mA WIDTH>=15MIL 0R U600E GROUND +3.3V_SB_R +3.3V P21 P20 M22 M24 M26 P22 P24 P26 T20 T22 T24 V20 J23 VSSPL_SYS VSSIO_PCIECLK_1 VSSIO_PCIECLK_2 VSSIO_PCIECLK_3 VSSIO_PCIECLK_4 VSSIO_PCIECLK_5 VSSIO_PCIECLK_6 VSSIO_PCIECLK_7 VSSIO_PCIECLK_8 VSSIO_PCIECLK_9 VSSIO_PCIECLK_10 VSSIO_PCIECLK_11 VSSIO_PCIECLK_12 VSSIO_PCIECLK_13 VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27 AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8 C M20 H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20 B Part 5 of 5 +1.5VDUAL To meet SB800 SCL1.02: Separate ferrite bead is not required for VDDPL_33_USB_S, Del B603/600ohm bead. +3.3VDUAL VDDIO_AZ VDDPL_3.3V 0R R589 0R NC_R588 A +3.3V B612 C748 2.2uF C674 2.2uF C675 100nF DNI VDDPL_1.1V +1.1VDUAL WIDTH>=15MIL B609 220R C690 2.2uF_6.3V C696 100nF DNI VDDPL_3.3V_USB +3.3VDUAL SB800 A11 VDDAN_3.3V_HWM 220R B607 C629 100nF C630 2.2uF_6.3V C664 100nF +3.3VDUAL 220R C668 2.2uF_6.3V A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 SB8X0-POWER & DECOUPLING Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 29 of 54 5 4 VDDIO_AZ OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS. +3.3V R752 10K DNI 3 +3.3V +3.3V R744 10K DNI R742 10K +3.3VDual +3.3V R746 10K DNI +3.3VDual R782 R720 10K NC_10K change to installed 2 +3.3VDual R748 NC_10K INT +3.3VDual R754 10K 10K R756 27 AZ_SDATA_OUT 26 SMSC_CLK 26 PCI_CLK2 26 PCI_CLK3 26 PCI_CLK4 26,49 LPC_CLK0 26,47 LPC_CLK1 D 27 27 GPIO200 GPIO199 R743 NC_10K R745 10K R747 10K R719 NC_10K R721 10K AZ_SDOUT SMSC_CLK PCI_CLK2 LOW POWER ALLOW MODE PCIE Gen2 PULL HIGH DEFAULT PULL LOW PERFORMANCE FORCE MODE PCIE Gen1 DEFAULT PCI_CLK3 Watchdog Timer Enabled USE DEBUG STRAP Watchdog Timer Disabled IGNORE DEBUG STRAP DEFAULT DEFAULT PCI_CLK4 LPC_CLK0 non_Fusion CLOCK MODE EC ENABLED DEFAULT EC DISABLED R757 2.2K change to SPI mode LPC_CLK1 GPIO200 CLKGEN ENABLED H,H = Reserved DEFAULT FUSION CLOCK MODE R755 NC_2.2K R749 10K EXT change to NC C D DEL JTAG HEADER R753 10K REQUIRED STRAPS 1 CLKGEN DISABLED GPIO199 H,L = SPI ROM C L,H = LPC ROM (Default) L,L = FWH ROM DEFAULT DEBUG STRAPS SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23] B B 26 PCI_AD[27..23] PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 Use 2.2K PD. PULL HIGH A PULL LOW R793 2.2K DNI R791 2.2K DNI R789 2.2K DNI R787 2.2K DNI R785 2.2K DNI PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 USE PCI PLL DISABLE ILA AUTORUN USE FC PLL USE DEFAULT PCIE STRAPS DISABLE PCI MEM BOOT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT BYPASS PCI PLL ENABLE ILA AUTORUN BYPASS FC PLL USE EEPROM PCIE STRAPS A ENABLE PCI MEM BOOT Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 SB8X0-STRAPS Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 30 of 54 5 4 3 2 1 COMPONENTS SHOWN ARE EXAMPLES ONLY AND NOT NECESSARILY QUALIFIED U4502A TP1 AF30 AE31 22 GFX_TX0P_C 22 GFX_TX0N_C D 22 GFX_TX1P_C 22 GFX_TX1N_C AE29 AD28 TP2 AD30 AC31 22 GFX_TX3P_C 22 GFX_TX3N_C AC29 AB28 22 GFX_TX4P_C 22 GFX_TX4N_C AB30 AA31 22 GFX_TX5P_C 22 GFX_TX5N_C AA29 Y28 22 GFX_TX6P_C 22 GFX_TX6N_C Y30 W31 TP3 W29 V28 22 GFX_TX7P_C 22 GFX_TX7N_C 22 GFX_TX8P_C 22 GFX_TX8N_C V30 U31 TP5 22 GFX_TX9P_C 22 GFX_TX9N_C U29 T28 22 GFX_TX10P_C 22 GFX_TX10N_C T30 R31 22 GFX_TX11P_C 22 GFX_TX11N_C R29 P28 22 GFX_TX12P_C 22 GFX_TX12N_C P30 N31 22 GFX_TX13P_C 22 GFX_TX13N_C N29 M28 22 GFX_TX14P_C 22 GFX_TX14N_C M30 L31 PCIE_TX0P PCIE_TX0N PCIE_RX1P PCIE_RX1N PCIE_TX1P PCIE_TX1N PCIE_RX2P PCIE_RX2N PCIE_TX2P PCIE_TX2N PCIE_RX3P PCIE_RX3N PCIE_TX3P PCIE_TX3N PCIE_RX4P PCIE_RX4N PCIE_TX4P PCIE_TX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N C TP66 L29 K30 22 GFX_TX15P_C 22 GFX_TX15N_C TP65 PCIE_REFCLKP PCIE_REFCLKN 20 PCIE_REFCLKP 20 the PCIE_REFCLKN For Park-S3: PWRGOOD pin must need to pull down to GND AK30 AK32 PCIE_RX13P PCIE_RX13N PCI EXPRESS INTERFACE 22 GFX_TX2P_C 22 GFX_TX2N_C PCIE_RX0P PCIE_RX0N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX14P PCIE_TX14N PCIE_RX15P PCIE_RX15N PCIE_TX15P PCIE_TX15N N10 100nF_6.3V C269 100nF_6.3V GFX_RX0P_C 22 GFX_RX0N_C 22 C238 100nF_6.3V C239 100nF_6.3V GFX_RX1P_C 22 GFX_RX1N_C 22 AF27 AF26 PCIE_TXP2 PCIE_TXN2 C242 100nF_6.3V C243 100nF_6.3V GFX_RX2P_C 22 GFX_RX2N_C 22 AD27 AD26 PCIE_TXP3 PCIE_TXN3 C244 100nF_6.3V C245 100nF_6.3V GFX_RX3P_C 22 GFX_RX3N_C 22 AC25 AB25 PCIE_TXP4 PCIE_TXN4 C256 100nF_6.3V C258 100nF_6.3V GFX_RX4P_C 22 GFX_RX4N_C 22 Y23 Y24 PCIE_TXP5 PCIE_TXN5 C270 100nF_6.3V C271 100nF_6.3V GFX_RX5P_C 22 GFX_RX5N_C 22 AB27 AB26 PCIE_TXP6 PCIE_TXN6 C272 100nF_6.3V C273 100nF_6.3V GFX_RX6P_C 22 GFX_RX6N_C 22 Y27 Y26 PCIE_TXP7 PCIE_TXN7 C274 100nF_6.3V C279 100nF_6.3V GFX_RX7P_C 22 GFX_RX7N_C 22 W24 W23 PCIE_TXP8 PCIE_TXN8 C280 100nF_6.3V C281 100nF_6.3V GFX_RX8P_C 22 GFX_RX8N_C 22 V27 U26 PCIE_TXP9 PCIE_TXN9 C282 100nF_6.3V C283 100nF_6.3V GFX_RX9P_C 22 GFX_RX9N_C 22 U24 U23 PCIE_TXP10 PCIE_TXN10 C284 100nF_6.3V C287 100nF_6.3V GFX_RX10P_C 22 GFX_RX10N_C 22 T26 T27 PCIE_TXP11 PCIE_TXN11 C289 100nF_6.3V C288 100nF_6.3V GFX_RX11P_C 22 GFX_RX11N_C 22 T24 T23 PCIE_TXP12 PCIE_TXN12 C290 100nF_6.3V C291 100nF_6.3V GFX_RX12P_C 22 GFX_RX12N_C 22 P27 P26 PCIE_TXP13 PCIE_TXN13 C292 100nF_6.3V C293 100nF_6.3V GFX_RX13P_C 22 GFX_RX13N_C 22 P24 P23 PCIE_TXP14 PCIE_TXN14 C295 100nF_6.3V C294 100nF_6.3V GFX_RX14P_C 22 GFX_RX14N_C 22 M27 N26 PCIE_TXP15 PCIE_TXN15 C300 100nF_6.3V C306 100nF_6.3V GFX_RX15P_C 22 GFX_RX15N_C 22 D COMPONENTS SHOWN ARE EXAMPLES ONLY AND NOT NECESSARILY QUALIFIED PCIE_REFCLKP PCIE_REFCLKN PCIE_CALRP AL27 C267 PCIE_TXP1 PCIE_TXN1 CLOCK CALIBRATION PERST#_buf PCIE_TXP0 PCIE_TXN0 AG29 AF28 C PCIE_TX13P PCIE_TX13N PCIE_RX14P PCIE_RX14N For M9X-S2/S3: This PWRGOOD pin is not connected R8185 10K AH30 AG31 PWRGOOD PCIE_CALRN Y22 AA22 R75 1.27K R74 2.0K 1.1V_1.0V_PWR PERSTB M9X-S2/S3 + Park-S3 +3VRUN 26,27,36,47,48 PCIE_RST# 26 PE_GPIO0 23,24,26,49 A_RST# D3613 1 NC_RB501V-40 2 D3614 1 NC_RB501V-40 2 D3615 1 RB501V-40 2 R3669 10K 0R Updata on rev:1.1 B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title Park-XT(PCI-E) Size D Document Number 4 3 2 http://pc-120.taobao.com/ Rev 1.0 BM5016 Date: 5 1 Thursday, August 05, 2010 Sheet 31 of 54 5 4 3 2 1 Updata on rev:1.1 U4502B 1.8V_REG MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3 R645 R640 AE9 L9 N9 AE8 AD9 AC10 AD7 AC8 AC7 AB9 AB8 AB7 AB4 AB2 Y8 Y7 R646 10K NC_10K NC_10K 10K R690 D DVDATA_0 DVDATA_1 DVDATA_2 H5TQ1G43BFR_12C 1 0 0 K4W1G646E_HC12 0 1 0 10K R689 NC_10K R691 For M93-S3: Install All components in this Box EXCEPT Decoupling caps and Bead connecting to DPC_VDD18# (B10095,C6136,C6137,C6140,R6268) M93-S3/M92-S2 DVCNTL_0/ DVPDATA_18 DVCNTL_1 / NC DVCNTL_2 / NC DVDATA_12 / DVPDATA_16 DVDATA_11 / DVPDATA_20 DVDATA_10 / DVPDATA_22 DVDATA_9 / DVPDATA_12 DVDATA_8 / DVPDATA_14 DVDATA_7 / DVPCNTL_0 DVDATA_6 / DVPDATA_8 DVDATA_5 / DVPDATA_6 DVDATA_4 DVPDATA_4 DVDATA_3 / DVPDATA_19 DVDATA_2 / DVPDATA_21 DVDATA_1 / DVPDATA_2 DVDATA_0 / DVPDATA_0 TXCAP_DPA3P TXCAM_DPA3N TX0P_DPA2P TX0M_DPA2N DPA TX1P_DPA1P TX1M_DPA1N TX2P_DPA0P TX2M_DPA0N TXCBP_DPB3P TXCBM_DPB3N TX3P_DPB2P TX3M_DPB2N DPB TX4P_DPB1P TX4M_DPB1N DVO 1.8V_REG B2701 BLM15BD121SN1 C7337 TX5P_DPB0P TX5M_DPB0N C7338 C7339 10uF 1uF W6 V6 100nF 1.8V_REG For PARK-S3: Install All components in this Box INCLUDING Decoupling caps and Bead connecting to DPC_VDD18# (B10095,C6136,C6137,C6140,R6268) AC6 AC5 B2702 BLM15BD121SN1 C7341 C7342 C7340 1.1V_1.0V_PWR AA5 AA6 10uF 1uF 100nF B2703 BLM15BD121SN1 C7343 For M92-S2: DO NOT Install any Component in this Box. U1 W1 U3 Y6 AA1 C7344 C7345 10uF 1uF 100nF COMPONENTS SHOWN ARE EXAMPLES ONLY AND NOT NECESSARILY QUALIFIED AF2 AF4 AG3 AG5 AH3 AH1 AK3 AK1 D AK5 AM3 AK6 AM5 AJ7 AH6 AK8 AL7 M93-S3/M92-S2 DPC_PVDD / DVPDATA_11 DPC_PVSS / GND DPC_VDD18#1/DVPDAT10 DPC_VDD18#2/DVPDAT23 DPC_VDD10#1/DVPDAT15 DPC_VDD10#2/DVPDAT17 DPC_VSSR#1 / DVPCLK DPC_VSSR#2 / DVPDAT5 DPC_VSSR#3 / GND DPC_VSSR#4 / GND DPC_VSSR#5/ DVPCNTL_MV0 M92-S2/M93-S3 DVPDATA_3/TXCCP_DPC3P DVPCNTL_2/TXCCM_DPC3N DVPDATA_7 / TX0P_DPC2P DVPDATA_1 / TX0M_DPC2N DVPCNTL_MV1 / TX1P_DPC1P DVPDATA_9 / TX1M_DPC1N DVPDATA_13 / TX2P_DPC0P DVPCNTL_1 / TX2M_DPC0N VDDR4 / DPCD_CALR FOR MXM DESIGN: PLACE RGB 150 Ohm TERMINATION RESISTORS CLOSE TO ASIC V4 U5 R_DAC1 W3 V2 G_DAC1 Y4 W5 AA12 B_DAC1 Update on rev:1.1 AA3 Y2 1.8V_REG R1265 R1266 R1267 R1268 150R 150R 150R 150R B1 BLM15BD121SN1 DPC 43 43 R1 R3 SCL SDA SCL SDA SCL SDA R81 NC_10K R78 4.7K GPIO7_BLON R85 10K ADD update on rev:1.1 +3VRUN C R RB GENERAL PURPOSE I/O R8191 4.7K +3VRUN 36 GPIO0 36 GPIO1 R1130 36 GPIO2 AC (Performance mode) = 3.3 V 10K 36 PBAT_SMBDAT Battery saving mode = 0.0 V 36 PBAT_SMBCLK NC_0 49 AC_BAT# TP231 36 R1263 10K R1261 R1262 R1264 +3VRUN GPIO26_TCK 10K 10K GPIO24_TRSTB GPIO25_TDI 10K GPIO27_TMS GPIO5 R528 100K 36,49 0 ThermINT 43 GPIO7_BLON TP235 36 GPIO9 TP236 36 36 36 GPIO11 GPIO12 GPIO13 TP238 40 GPIO15 TP240 R8214 R8215 R1287 TP241 49 R1288 NC_0 CTF 40 GPIO20 TP237 36 GPIO22 TP239 GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS GPIO28_TDO JTAG DEBUG PORT TP69 35mil R6219 10K R6220 NC_10K +3VRUN 36 38 TEST_EN_park GENERICC C79 10uF C76 1uF R83 110R DPLL_PVDD AB13 W8 W9 W7 AD10 GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN AC16 C83 10uF (1.0V@125mA DPLL_VDDC) (1.1V@150mA DPLL_VDDC) C85 1uF AD14 AM28 AK28 XTALIN XTALOUT XO_IN and XO_IN2 Pins are NC, can be gronded 36 GPU_DPLUS 36 GPU_DMINUS T4 T2 R5 AD17 AC17 TSVDD C55 1uF G2 / NC G2B / NC B2 / NC B2B / NC DAC2 C54 100nF C / NC Y / NC COMP / NC H2SYNC V2SYNC A2VDDQ / NC VREFG A2VSSQ M92-S2/M93-S3 DDC1CLK DDC1DATA PLL/CLOCK DPLL_PVDD DPLL_PVSS DPLL_VDDC AUX1P AUX1N DDC2CLK DDC2DATA XTALIN XTALOUT AUX2P AUX2N NC#2/XO_IN NC#1/XO_IN2 THERMAL 1.8V_REG (1.8V@20mA TSVDD) R2 / NC R2B / NC VDD2DI / NC VSS2DI / NC See note:1 For Park-S3: XO_IN and XO_IN2 can be use as 3.3V CLK Input. These poins can be grounded if not in use. B8 BLM15BD121SN1 C56 10uF M92-S2/M93-S3 R2SET / NC AC22 AB22 Note:1 For M9x-S2/S3 AVDD AVSSQ VDD1DI VSS1DI DDC/AUX DPLL_VDDC C84 100nF RSET HPD1 M92-S2/M93-S3 AF14 AE14 B7 470R_1000mA HSYNC VSYNC GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 DPLL_PVDD 1.1V_1.0V_PWR B BB DAC1 C70 100nF C72 100nF B G GB A2VDD / NC R82 220R (1.8V@75mA DPLL_PVDD) L6 L5 L3 L1 K4 AF24 AC14 1.8V_REG 1.8V_REG B6 470R_1000mA U6 U10 T10 U8 NC_0R NC_0R U7 T9 T8 T7 P10 P4 P2 N6 N5 N3 Y9 N1 M4 R6 W10 M2 P8 P7 N8 N7 C91 10uF I2C +3VRUN +3VRUN DDCCLK_AUX5P DDCDATA_AUX5N DDC6CLK DDC6DATA NC/DDCCLK_AUX3P NC/DDCDATA_AUX3N MUST NOT be connected to AVSSQ AM26 AK26 RB_DAC1 AL25 AJ25 GB_DAC1 AH24 AG25 BB_DAC1 AH26 AJ27 TP232 TP233 R_DAC1 44 G_DAC1 44 B_DAC1 44 HSYNC_DAC1 VSYNC_DAC1 AD22 AVDD AG24 AE22 RB_DAC1 B2 BLM15BD121SN1 AVDD (1.8V@70mA AVDD) C94 100nF C96 1uF (1.8V@45mA VDD1DI) C95 10uF GB_DAC1 C93 1uF VDD1DI C92 100nF BB_DAC1 DO NOT INSTALL for M93-S3 (Use Only for M92-S2/ Park-S3) 44 44 B3 BLM15BD121SN1 R84 499R (1.8V@2mA A2VDDQ) C97 10uF C90 100nF C A2VDDQ C89 1uF VDD1DI AE23 AD23 B4 BLM15BD121SN1 AM12 AK12 (1.8V@40mA VDD2DI) C86 10uF AL11 AJ11 C87 100nF VDD2DI C88 1uF AK10 AL9 +3VRUN AH12 AM10 AJ9 B5 BLM15BD121SN1 (3.3V@65mA A2VDD) C82 10uF C81 1uF A2VDD C80 100nF AL13 AJ13 VDD2DI AD19 AC19 AE20 AE17 NOTE: Designs that do not include an EEPROM must still provide access to the ROM interface signals for debug purposes A2VDD A2VDDQ NOTE: A 1MBits Serial EEPROM is required on Prototype GDDR5 Designs. AE19 AG13 R76 715R AE6 AE5 AD2 AD4 DDC1 AND AUX1 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION REFER THE DATABOOK FOR DETAIL B AC11 AC13 DDC2 AND AUX2 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION REFER THE DATABOOK FOR DETAIL AD13 AD11 GPIO22 AE16 AD16 AC1 AC3 DDC6CLK DDC6DATA AD20 AC20 44 44 For M92-S2 these Pins are NC For M93-S3/Park-S3: these Pins can be use as DDC_Aux DPLUS DMINUS SERIAL EEPROM 512K/1M TS_FDO TSVDD TSVSS M9X-S2/S3 + Park-S3 Note:2 This is an example circuit for clock divider to supply 1.8V Clock input with 3.3V Clock Oscillator XTALIN 1 22pF 2Y2 27_MHZ 1M 3 4 XTALOUT 22pF Y2 A A y_27m_3225 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title Park-XT(Main IO) Size D Document Number 4 3 2 http://pc-120.taobao.com/ Rev 1.0 BM5016 Date: 5 1 Thursday, August 05, 2010 Sheet 32 of 54 3 2 1 U4502E AA27 AB24 AB32 AC24 AC26 AC27 AD25 AD32 AE27 AF32 AG27 AH32 K28 K32 L27 M32 N25 N27 P25 P32 R27 T25 T32 U25 U27 V32 W25 W26 W27 Y25 Y32 C M6 N11 N12 N13 N16 N18 N21 P6 P9 R12 R15 R17 R20 T13 T16 T18 T21 T6 U15 U17 U20 U9 V13 V16 V18 Y10 Y15 Y17 Y20 B PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#1 GND#2 GND#3 / EVDDQ#2 GND#4 GND#5 GND#6 / EVDDQ#3 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#85 GND#86 GND VSS_MECH#1 VSS_MECH#2 VSS_MECH#3 A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6 T11 R11 C B A32 AM1 AM32 A A M9X-S2/S3 + Park-S3 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 3 2 http://pc-120.taobao.com/ PARK-XT(Core_GND) Size B Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 33 of 54 5 MVDDQ 4 3 (For DDR3, MVDDQ = [email protected]) ( for DDR2 and GDDR3: [email protected] VDDR1) C5995 1uF C6003 1uF D C6004 1uF C6012 10uF C5992 10uF C5996 1uF C6015 1uF C6005 1uF C6006 1uF C6013 10uF C5998 100nF C6007 1uF C5993 10uF C5999 100nF C6008 1uF C6009 1uF H13 H16 H19 J10 J23 J24 J9 K10 K23 K24 K9 L11 L12 L13 L20 L21 L22 C6002 100nF C6010 1uF C6011 1uF C6014 10uF VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 1.8V_REG LEVEL TRANSLATION VDDC_CT (1.8V@17mA VDD_CT) B13 BLM15BD121SN1 C508 10uF +3VRUN C509 1uF C359 1uF C504 100nF AA20 AA21 AB20 AB21 C507 1uF VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4 C521 1uF C522 1uF VDDR4 C519 1uF AA17 AA18 AB17 AB18 VDDR5 V12 Y12 U12 VDDR4 B14 BLM15BD121SN1 C178 10uF C C513 1uF C536 100nF AA11 Y11 For M9X-S3/ Park-S3: REMOVE R6274, R6402,R6284 and INSTALL R8210 V11 U11 VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4 I/O VDDR4#1 / VDDR5 VDDR4#2 VDDR4#3 / VDDR5 NC#1 / VDDR4 DVCLK / VDDR4 NC#3 / VDDR5 NC / VDDR5 VDDR5 B16 BLM15BD121SN1 MEM CLK C188 10uF C537 1uF L17 C535 100nF L16 PCIE_PVDD (1.8V@40mA PCIE_PVDD) C191 10uF C311 1uF C308 100nF MPV18 SPV10 SPV18 1.1V_1.0V_PWR B2710 BLM15BD121SN1 C541 10uF SPV10 C543 1uF PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8 PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#20 VDDC#21 VDDC#22 VDDC#23 /BIF_VDDC VDDC#19/BIF_VDDC CORE L8 H7 H8 C542 100nF J7 PCIE_VDDR_PARK AB23 AC23 AD24 AE24 C529 AE25 100nF AE26 AF25 AG26 L1 (1.8V@500mA PCIE_VDDR) C528 100nF C316 1uF C315 1uF C193 1uF 220R_2A C194 1uF C195 1uF C192 10uF D 1.1V_1.0V_PWR (1.1V@2A PCIE_VDDC) L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22 C524 1uF C527 1uF C514 1uF C511 1uF C545 1uF C544 1uF C512 1uF C520 10uF VDDC SEE DATABOOK FOR REQUIRED EDP AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 R21 U21 C173 1uF_6.3V C108 1uF_6.3V C137 1uF_6.3V C129 1uF_6.3V C358 1uF_6.3V C98 1uF_6.3V C510 1uF_6.3V C534 1uF_6.3V C107 1uF_6.3V C565 1uF_6.3V C567 1uF_6.3V C566 1uF_6.3V C568 1uF_6.3V C556 1uF_6.3V C557 1uF_6.3V C558 1uF_6.3V C559 1uF_6.3V C564 1uF_6.3V C549 1uF_6.3V C548 1uF_6.3V C551 1uF_6.3V C550 1uF_6.3V C547 1uF_6.3V C553 1uF_6.3V C561 10uF_X6S C560 10uF_X6S C555 10uF_X6S C552 10uF_X6S C554 10uF_X6S C563 1uF_6.3V C546 10uF_X6S C VDDRHA VSSRHA ISOLATED CORE I/O VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 PLL AM30 B20 BLM15BD121SN1 1.8V_REG PCIE POWER M93-S3/M92-S2 C523 10uF 1 U4502D MEM I/O C5994 1uF 2 PCIE_PVDD MPV18 SPV18 SPV10 M13 M15 M16 M17 M18 M20 M21 N20 VDDCI (0.95V-1.1V@(2-??)A VDDCI) C7409 10uF_X6S C7410 C538 10uF_X6S 1uF B23 C533 C539 1uF C540 1uF 10uF_X6S 0.9-1.1V @2A (DDR3) ??(GDDR5) Warning:Select the correct Bead to support expected VDDCI current. See databook for details. SPVSS 1.0V @100mA For Park-S3: Connect 1.1V_1.0V_PWR to SPV10 ONLY For M9X-S2/S3: Connect VDDC to SPV10 ONLY BACK BIAS +BBP R8213 0R C181 1uF VDDC M11 M12 BBP#1 BBP#2 C174 100nF (DNI For M9X-S2/S3) M9X-S2/S3 + Park-S3 (For PARK-S3) For PARK-S3:BAckBias(BBP#1 and #2) is not supported, Connect to VDDC Rail (1.8V@90mA SPV18) B B2711 BLM15BD121SN1 SPV18 C1361 1uF B2712 470R_1000mA B C1362 100nF (1.8V@75mA MPV18) MPV18 C1363 C1364 1uF 100nF A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title Park_XT(Power_and_NC) Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 34 of 54 5 4 3 2 1 See Databook and Application note table for Voltage and Current requirements for each individual rail. 1.8V_REG B2713 (1.8V@130mA ) DPA_VDD18 D NOTE:4 B2715 C7411 10uF C7412 1uF C7413 100nF U4502G For M9X-S2/S3 , DPx_VDD10 = 1.1V For Park-S3, DPx_VDD10 = 1.0V DP E/F POWER (1.8V@20mA ) DPE_VDD18 AG15 AG16 DPE_VDD10 AG20 AG21 COMPONENTS SHOWN ARE EXAMPLES ONLY AND NOT NECESSARILY QUALIFIED DPE_VDD18#1 DPE_VDD18#2 DPA_VDD18#1 DPA_VDD18#2 DPE_VDD10#1 DPE_VDD10#2 DPA_VDD10#1 DPA_VDD10#2 DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5 DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5 AE11 AF11 DPA_VDD18 DPA_VDD10 DPA_PVDD C7414 10uF C7415 1uF C7416 100nF AG14 AH14 AM14 AM16 AM18 AF6 AF7 AF16 AG17 DPF_VDD18#1 DPF_VDD18#2 DPB_VDD18#1 DPB_VDD18#2 AE1 AE3 AG1 AG6 AH5 AE13 AF13 DPA_VDD18 AF22 AG22 AF23 AG23 AM20 AM22 AM24 LVDS Mode:1.8V@200mA (DP Mode:1.8V@130mA) DPF_VDD10#1 DPF_VDD10#2 DPB_VDD10#1 DPB_VDD10#2 DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5 DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5 DPEF_CALR DPAB_CALR AF8 AF9 B2714 C7418 1uF Park-S3:[email protected] M9X-S2/S3:[email protected] C7423 10uF C DPF_VDD10 Park-S3:[email protected] M9X-S2/S3:[email protected] C7417 10uF DPA_VDD10 DPB_VDD10 DPF_VDD18 D 1.1V_1.0V_PWR DP A/B POWER C7424 1uF C7419 100nF B2717 C7425 100nF C DPB_VDD10 Park-S3: TMDS/[email protected] : [email protected] M9X-S2/S3: TMDS/[email protected] [email protected] AF10 AG9 AH8 AM6 AM8 DPE_VDD10 C7429 10uF C7430 1uF B2719 C7431 100nF DPE_VDD18 C7432 10uF C7433 1uF C7434 100nF R6227 150R DPE_PVDD B2721 AF17 AG18 AF19 (1.8V@20mA ) DPE_PVDD DPE_PVSS DP PLL POWER DPA_PVDD DPA_PVSS AE10 R6226 AG8 AG7 150R Park-S3: TMDS/[email protected] : [email protected] M9X-S2/S3: TMDS/[email protected] [email protected] DPA_PVDD DPF_VDD10 C7435 10uF DPE_PVDD B C7438 10uF C7439 1uF DPF_PVDD C7440 100nF AG19 AF20 DPF_PVDD DPF_PVSS DPB_PVDD DPB_PVSS AG10 AG11 C7436 1uF B2720 C7437 100nF B DPA_PVDD M9X-S2/S3 + Park-S3 LVDS Mode:1.8V@200mA (DP Mode:1.8V@130mA) DPF_VDD18 C7441 10uF B2722 (1.8V@20mA C7442 1uF NOTE:1: DPx_VDD18 and DPx_PVDD Rails can be join together and remove Decoupling Capacitors and BEAD for DPx_PVDD if signal integrity for DP lanes are OK. C7443 100nF ) DPF_PVDD C7444 10uF C7445 1uF C7446 100nF NOTE:2: DPA_VDD10 / DPB_VDD10 and DPE_VDD10 / DPF_VDD10 Rails can be join together and remove Decoupling Capacitors and BEAD for one rail of each pair if signal integrity for DP lanes are OK. We also need to Change BEAD to minimum 400mA rating. NOTE:3: DPx_VDD18 Rails can be join together as shown in schematic for Dual -Link DVI or LVDS setting and remove Decoupling Capacitors and BEAD of any one rail of the pair if signal integrity for DP lanes are OK. We need atleast 500mA Bead to support join rails. A A NOTE:4 NOTE:4: Do not Install for M9X-S2/S3. INSTALL ONLY for PARK-S3. Other Notes can be apply as well. Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 3 2 http://pc-120.taobao.com/ Park-XT(DP Power) Size B Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 35 of 54 5 4 3 2 1 D D CONFIGURATION STRAPS Refer to the appropriate GPU Databook for configuration strap settings 32 GPIO0 GPIO0 32 GPIO1 GPIO1 R97 3K 32 GPIO2 GPIO2 R103 NC_10K 32 GPIO9 GPIO9 R72 NC_10K 32 GPIO11 GPIO11 R92 10K 32 GPIO12 GPIO12 R95 NC_10K 32 GPIO13 GPIO13 R94 NC_10K R96 +3VRUN ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET NC_3K 32 GENERICC R102 NC_10K 32 GPIO22 R73 NC_10K STRAPS PIN STRAPS Updata on rev:1.1 PIN 32 GPIO5 GPIO5 R101 NC_10K GPIO0 PCIE FULL TX OUTPUT SWING X TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED X BIF_GEN2_EN_A GPIO2 PCIE GEN2 ENABLED X RSVD BIF_VGA_DIS RSVD GPIO8 GPIO9 GPIO21 VGA ENABLED 0 0 0 GPIO_22_ROMCSB BIOS_ROM_EN GPIO[13:11] VIP_DEVICE_STRAP_ENA V2SYNC RSVD AUD[1] AUD[0] GENERICC HSYNC VSYNC ENABLE EXTERNAL BIOS ROM X X X X SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPS X 0 0 XX AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI C AMD RESERVED CONFIGURATION STRAPS +3VRUN R331 2.2K DESCRIPTION OF DEFAULT SETTINGS TX_PWRS_ENB ROMIDCFG(2:0) C RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE R330 2.2K Provide pull-up pads for these straps - but do not populate. GPIOs functions on these signals must not conflict with the pin strap at Reset C285 100nF H2SYNC +3VRUN GENERICC Provide pull-up pads for these straps - but do not populate. GPIOs functions on these signals must not conflict with the pin strap at Reset 32 PBAT_SMBCLK +3VRUN 32 PBAT_SMBDAT R8218 0R 26,27,31,47,48 PCIE_RST# R274 0R 8 R329 0R 7 6 PCIE_RST# R8219 NC_0R DNI 5 1 49 PARKXT_CLK 3 SDATA D+ ALERT D- GND THERM C286 1 2.2nF_50V GPIO21_BB_EN 2 3 4 Optional External Thermal Sensor R696 nc_10K Q64 2 VDD R323 0R R326 0R GPU_DPLUS 32 GPU_DMINUS 32 MB_THERMB 27 ThermINT 32,49 ADM1032ARMZ +3VRUN B U8 SCLK R324 B R328 2.2K 2.2K PBAT_SMBCLK 2N7002 R697 NC_0R +3VRUN Updata on rev:1.1 +3VRUN 1 DNI 49 PARKXT_DAT 3 Q65 2 R693 nc_10K PBAT_SMBDAT 2N7002 R657 NC_0R Update on rev:1.1 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 5 http://pc-120.taobao.com/ 4 3 2 Title MINI PCIE SLOT 1,2 (SB) Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 36 of 54 3 2 1 LVDS Interface C R652 10K U4502F C R653 10K LVDS CONTROL VARY_BL DIGON TXCLK_UP_DPF3P TXCLK_UN_DPF3N TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N TXOUT_U3P TXOUT_U3N AB11 AB12 BLON_PWM DIGON 43 43 TXCLK_L+ TXCLK_L- 43 43 TXOUT_L0+ TXOUT_L0- 43 43 TXOUT_L1+ TXOUT_L1- 43 43 TXOUT_L2+ TXOUT_L2- 43 43 AH20 AJ19 AL21 AK20 AH22 AJ21 AL23 AK22 AK24 AJ23 LVTMDP TXCLK_LP_DPE3P TXCLK_LN_DPE3N B TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N TXOUT_L3P TXOUT_L3N AL15 AK14 AH16 AJ15 AL17 AK16 AH18 AJ17 B AL19 AK18 M9X-S2/S3 + Park-S3 To MXM LVDS signals A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 3 2 http://pc-120.taobao.com/ Park-XT(DPEF_ LVDS) Size B Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 37 of 54 3 39 MDA[63..0] 39 MAA[13..0] 39 C A_BA0 A_BA1 A_BA2 DQMA#[7..0] DQMA#[7..0] 39 QSA#[7..0] 39 QSA[7..0] QSA[7..0] U4502C 39 39 CLKA1 CLKA1# 39 39 CLKA0 CLKA0# 39 39 RASA0# RASA1# 39 39 CASA0# CASA1# 39 CSA0#_0 39 CSA1#_0 39 39 CKEA0 CKEA1 39 39 WEA0# WEA1# MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 CLKA1 CLKA1# CLKA0 CLKA0# RASA0# RASA1# CASA0# CASA1# CSA0#_0 CSA1#_0 CKEA0 CKEA1 WEA0# WEA1# PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC MVDDQ B Ra R114 40.2R MVREF R122 100R MVDDQ C278 100nF 32 Note: 1 MVDDQ R118 TEST_EN_park NC_0R R117 Note: 1 R125 DDR2/DDR3 GDDR3 MVREF TO 1.8V (Ra) 100R 40.2R MVREF TO GND (Rb) 100R 100R Rb R123 100R J25 K7 Note:3 DRAM_RST_G DIVIDER RESISTORS 243R Note:2 150R R121 R119 40.2R K27 J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11 A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5 K26 J26 Updata on rev:1.1 Rb Ra DDR3 Memory Interface QSA#[7..0] MVDDQ = 1.5V FOR DDR3 Memory For M9X-S2/S3 1 MAA[13..0] A_BA0 A_BA1 A_BA2 243R J8 K25 L10 K8 CLKTESTA CLKTESTB L7 C307 100nF DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63 MEMORY INTERFACE 39 39 39 2 MDA[63..0] MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_12 MAA_13/BA2 MAA_14/BA0 MAA_15/BA1 DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6 DQMA_7 RDQSA_0 RDQSA_1 RDQSA_2 RDQSA_3 RDQSA_4 RDQSA_5 RDQSA_6 RDQSA_7 WDQSA_0 WDQSA_1 WDQSA_2 WDQSA_3 WDQSA_4 WDQSA_5 WDQSA_6 WDQSA_7 ODTA0 ODTA1 CLKA0 CLKA0B CLKA1 CLKA1B RASA0B RASA1B CASA0B CASA1B CSA0B_0 CSA0B_1 CSA1B_0 CSA1B_1 MVREFDA MVREFSA CKEA0 CKEA1 MEM_CALRN0 NC/TESTEN#2 WEA0B WEA1B MEM_CALRP1/DPC_CALR MEM_CALRP0 DRAM_RST PX_EN RSVD#2 CLKTESTA CLKTESTB RSVD#3 K17 J20 H23 G23 G24 H24 J19 K19 J14 K14 J11 J13 H11 G11 J16 L15 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 A_BA2 A_BA0 A_BA1 E32 E30 A21 C21 E13 D12 E3 F4 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 H28 C27 A23 E19 E15 D10 D6 G5 QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7 H27 A27 C23 C19 C15 E9 C5 H4 QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7 L18 K16 C NC NC H26 H25 CLKA0 CLKA0# G9 H9 CLKA1 CLKA1# G22 G17 RASA0# RASA1# G19 G16 CASA0# CASA1# H22 J22 CSA0#_0 ODTA0 ODTA1 ODTA0 ODTA1 39 39 B Note 1 : Do not Install for M9X-S2/S3, Install 240 Ohms 0.5% Resistor for PARK-S3. G13 K13 CSA1#_0 K20 J17 CKEA0 CKEA1 G25 H10 WEA0# WEA1# Note 2 :For M9X-S2/S3,J8 Pin Connect to VSS through 240 Ohms(0.5%) resistor. For Park-S3,J8 Pin Connect to VSS through 150 Ohms(1%) resistor for DPC_CALR Note 3 :For M9X-92/93, K7 Pin (NC_MEM_CALRP1) is Not connected. For PARK-S3, K7 Pin (TESTEN#2) connect to TEST_EN Signal At AF24 AB16 G14 G20 MAA13 For PARK-S3 only For M9X-S2/S3 with DDR3: this pin is not in use. M9X-S2/S3 + Park-S3 MVDDQ DRAM_RST 39 R8229 NC_51.1R For Park-S3 DIVIDER RESISTORS R8226 51R DRAM_RST_G DDR2/DDR3 GDDR3 MVREF TO 1.8V (Ra) 40.2R 40.2R MVREF TO GND (Rb) 100R 100R R8227 0R C7447 68PF DRAM_RST C7370 R8228 10K NC_100nF C7371 NC_100nF R8199 R8200 NC_51.1R 39 QSA#[7..0] 39 QSA[7..0] 39 39 ODTA0 ODTA1 QSA#[7..0] QSA[7..0] ODTA0 ODTA1 39 QSA#[7..0] 39 QSA[7..0] 39 39 ODTA0 ODTA1 QSA#[7..0] QSA[7..0] ODTA0 ODTA1 NC_51.1R route 50ohms single-ended/100ohms diff and keep short A A Use this option ONLY for Park-S3 Differential for testing and DNI component for normal operation. Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 3 http://pc-120.taobao.com/ 2 Title Park-XT(MEM Interface) Size C Document Number Date: Thursday, August 05, 2010 1 Rev 1.0 BM5016 Sheet 38 of 54 5 4 3 2 1 MVDDQ MVDDQ 38 MDA[63..0] 38 MAA[13..0] 38 38 38 38 38 QSA[7..0] R189 4.99K DQMA#[7..0] C346 100nF QSA[7..0] MVDDQ 38 38 CLKA1 CLKA1# 38 38 CLKA0 CLKA0# 38 38 RASA0# RASA1# 38 38 CLKA1 CLKA1# RASA0# RASA1# CSA0#_0 38 CSA1#_0 38 38 CKEA0 CKEA1 38 38 WEA0# WEA1# 38 QSA#[7..0] 38 QSA[7..0] 38 38 R206 4.99K CASA0# CASA1# CASA0# CASA1# 38 R207 4.99K CLKA0 CLKA0# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 QSA#[7..0] D 38 38 38 C349 100nF M2 N8 M3 A_BA0 A_BA1 A_BA2 CSA0#_0 38 38 38 CSA1#_0 38 38 38 38 38 CKEA0 CKEA1 WEA0# WEA1# 38 CLKA0 QSA[7..0] ODTA0 ODTA1 ODTA0 ODTA1 check list Add a series resistor on the ODTA0 and a pull-up resistor on the memory side. 38 Add a series resistor on the ODTA1 and a pull-up resistor on the memory side. 38 K1 L2 J3 K3 L3 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# F3 C7 QSA2 QSA0 R205 56R 402 CLKA0# J7 K7 K9 CLKA0 CLKA0# CKEA0 R233 56R 402 QSA#[7..0] C421 10nF 402 E7 D3 DQMA#2 DQMA#0 G3 B7 QSA#2 QSA#0 120R for dual rank CLKA1 R204 56R 402 38 T2 DRAM_RST L8 38 R212 56R 402 CLKA1# U13 M8 H1 U12 M8 H1 A_BA0 A_BA1 A_BA2 DQMA#[7..0] QSA#[7..0] R224 4.99K MAA[13..0] A_BA0 A_BA1 A_BA2 38 R216 4.99K MDA[63..0] C420 10nF 402 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA19 MDA17 MDA21 MDA20 MDA23 MDA16 MDA22 MDA18 R190 4.99K VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE ODT CS RAS CAS WE VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DQSL DQSU DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 C NC#J1 NC#L1 NC#J9 NC#L9 B2 D9 G7 K2 K8 N1 N9 R1 R9 C347 100nF R195 4.99K R203 4.99K N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MVDDQ MDA3 MDA7 MDA2 MDA5 MDA0 MDA4 MDA1 MDA6 MVDDQ BA0 BA1 BA2 R180 243R J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 C353 100nF MVDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 M2 N8 M3 38 38 38 A_BA0 A_BA1 A_BA2 38 38 38 CLKA0 CLKA0# CKEA0 38 38 38 38 38 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# J7 K7 K9 K1 L2 J3 K3 L3 F3 C7 QSA3 QSA1 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 38 DQMA#3 DQMA#1 E7 D3 QSA#3 QSA#1 G3 B7 T2 DRAM_RST L8 VREFCA VREFDQ B1 B9 D1 D8 E2 E8 F9 G1 G9 J1 L1 J9 L9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE ODT CS RAS CAS WE DQSL DQSU VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ NC#J1 NC#L1 NC#J9 NC#L9 E3 F7 F2 F8 H3 H8 G2 H7 MDA30 MDA24 MDA29 MDA27 MDA25 MDA26 MDA31 MDA28 D7 C3 C8 C2 A7 A2 B8 A3 MDA15 MDA11 MDA14 MDA10 MDA9 MDA12 MDA13 MDA8 D MVDDQ BA0 BA1 BA2 R182 243R Should be 240 Ohms +-1% DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B2 D9 G7 K2 K8 N1 N9 R1 R9 MVDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 C 100-BALL SDRAM DDR3 23E22387MNG8 100-BALL SDRAM DDR3 23E22387MNG8 BGA0_8mm10x16-100 MVDDQ MVDDQ C498 C354 1uF_6.3V 402 C357 1uF_6.3V 402 C355 1uF_6.3V 402 C440 1uF_6.3V 402 C423 1uF_6.3V 402 C439 1uF_6.3V 402 C424 1uF_6.3V 402 C441 1uF_6.3V 402 C442 C7372 1uF_6.3V 402 10uF_6.3V 10uF_6.3V C7373 1uF_6.3V 402 C7374 1uF_6.3V 402 C7375 1uF_6.3V 402 C7376 1uF_6.3V 402 C7377 1uF_6.3V 402 C7378 1uF_6.3V 402 C7380 C7379 1uF_6.3V 10uF_6.3V 402 C7382 10uF_6.3V For PARK-S3 with DDR3: Support MAA13-MAA0 Address or 128KX16 DDR3. RANK1: 256MB/ 512MB DDR3 PARK_XT ENG=750MHZ ,Mem=900MHZ DDR3 MVDDQ MVDDQ R8201 4.99K M8 H1 R8205 4.99K C7383 100nF MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MVDDQ B R8204 4.99K R8207 4.99K R8202 4.99K U15 C7385 100nF 38 38 38 A_BA0 A_BA1 A_BA2 38 38 38 CLKA1 CLKA1# CKEA1 38 38 38 38 38 ODTA1 CSA1#_0 RASA1# CASA1# WEA1# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 M2 N8 M3 J7 K7 K9 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 CK CK CKE E3 F7 F2 F8 H3 H8 G2 H7 MDA34 MDA39 MDA33 MDA37 MDA35 MDA38 MDA32 MDA36 D7 C3 C8 C2 A7 A2 B8 A3 MDA55 MDA50 MDA53 MDA51 MDA52 MDA49 MDA54 MDA48 U16 M8 H1 R8203 4.99K C7384 100nF MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MVDDQ DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 R8206 4.99K MVDDQ VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 R8208 4.99K C7386 100nF 38 38 38 MVDDQ A_BA0 A_BA1 A_BA2 38 38 38 CLKA1 CLKA1# CKEA1 38 38 38 38 38 ODTA1 CSA1#_0 RASA1# CASA1# WEA1# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 M2 N8 M3 J7 K7 K9 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 CK CK CKE DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 MDA46 MDA45 MDA44 MDA40 MDA43 MDA42 MDA47 MDA41 D7 C3 C8 C2 A7 A2 B8 A3 MDA57 MDA60 MDA59 MDA62 MDA56 MDA61 MDA58 MDA63 B MVDDQ VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 B2 D9 G7 K2 K8 N1 N9 R1 R9 MVDDQ qs5/qs6两组对调 38 K1 L2 J3 K3 L3 QSA4 QSA6 F3 C7 DQMA#4 DQMA#6 E7 D3 QSA#4 QSA#6 G3 B7 DRAM_RST T2 L8 Should be 240 Ohms +-1% ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU RESET ZQ R181 243R A J1 L1 J9 L9 NC#J1 NC#L1 NC#J9 NC#L9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 38 K1 L2 J3 K3 L3 QSA5 QSA7 F3 C7 DQMA#5 DQMA#7 E7 D3 QSA#5 QSA#7 G3 B7 DRAM_RST T2 L8 Should be 240 Ohms +-1% B1 B9 D1 D8 E2 E8 F9 G1 G9 DQSL DQSU DML DMU DQSL DQSU RESET ZQ R234 243R J1 L1 J9 L9 100-BALL SDRAM DDR3 23E22387MNG8 NC#J1 NC#L1 NC#J9 NC#L9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 A 100-BALL SDRAM DDR3 23E22387MNG8 MVDDQ C7387 1uF_6.3V 402 ODT CS RAS CAS WE MVDDQ C7388 1uF_6.3V 402 C7389 1uF_6.3V 402 C7390 1uF_6.3V 402 C7391 1uF_6.3V 402 C7392 1uF_6.3V 402 C7393 1uF_6.3V 402 C7395 C7394 1uF_6.3V 10uF_6.3V 402 C7397 C7398 1uF_6.3V 402 10uF_6.3V C7399 1uF_6.3V 402 C7400 1uF_6.3V 402 C7401 1uF_6.3V 402 C7402 1uF_6.3V 402 C7403 1uF_6.3V 402 C7404 1uF_6.3V 402 C7406 C7407 C7408 C7405 1uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 402 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title Park-XT( DDR3 Memory) Size D Document Number 4 3 2 COMPONENTS SHOWN ARE ONLYMAA12-MAA0 AND NOT NECESSARILY QUALIFIED For M9X-S2/S3 withEXAMPLES DDR3: Support Address or 64KX16 DDR3. MAA13 is NC http://pc-120.taobao.com/ Rev 1.0 BM5016 Date: 5 1 Thursday, August 05, 2010 Sheet 39 of 54 5 4 3 2 +VIN 3A PJ16 1 PR134 100K_J 0402 4 G S PC180 0.1U_25V_M 0603_X5R 1 2 PC183 1U_10V_K 0805_X5R 1 1 2 2 VDDC JUMP_43X118 PJ24 1 1206_X5R 10U_25V_M PC182 2 1 10Kohm 35Kohm 0 1 0.95V 10Kohm 35K//140K=28 KOhm x x 1 1 x x 1 1 2 Iocp=22A 2 PC119 0.1U_6.3V_K 0402_X5R PC118 1000P_50V_M 0603_X7R + PC115 330U_2V_7.3x4.3 1 2 + PC114 330U_2V_7.3x4.3 PR129 3.3_J 0603 update on rev:1.1 CPU_VDDIO_SUS MVDDQ +3.3VDUAL C2160 4 6 R3691 100K RUN_EN# Q3639B 2N7002DW-T/R7_SOT363-6 Q3640B Q3640A 5 SLP_S3# 7,9,11,27,49,51 2N7002DW-T/R7_SOT363-6 4 PARK-XT_PGOOD 49 2 2N7002DW-T/R7_SOT363-6 1 R2979 R1815 NC_1K_0402_5% 2 1 1.1V_1.0V_PWR POWER EXPRESS SUPPORT PE_GPIO0 MXM RESET PE_GPIO1 MXM POWER ENABLE 1 B 2 +5VDUAL R2985 10 1 2 1U_0402_16V7K @PC167 @ PC167 2 27P_0402_16V7K @ 1 1 +3.3VDUAL 0 @PC196 @ PC196 BAT54S SOT23 1 0.1U_0603_16V7K R2992 10K R1817 12K_0402_5% 1 1 1 R1816 2 update rev:1.1 +1.8VP_REG 2A PJ28 2 2 1 2 3 4 @PC204 22U_1206_6.3V 2 FB 2 6 VCNTL VOUT1 VOUT vin1 EN 5 1 3 2 APL5912 VIN 2 GPOWER_EN R2993 10K 1 2 2N7002E 2 2N7002E 8 D13 R2984 1 2N7002E 2 MVDDQ Q3045 1 POK GND Q3044 U2905 7 9 Q3043 1 0R 3 3 3 +5VDUAL R2986 49 PARK-XT_PGOOD 1 R3069 100R 2 R3068 100R R1820 R1818 10K_0402_5% NC_1K_0402_5% 1 R3067 100R VDDC 2 +3VRUN 2 MVDDQ R3074 10k H: Enable H: Enable 1.0V @PC205 @ @PC205 @PC206 PC206 JUMP_43X118 @PC195 @ PC195 22U_0402_16V7K NC_22U_0402_16V7K NC_0.1U_0402_16V7K PC165 1 2 2 7 R1814 80.6K_0402_5% PJ27 1 R1812 22K_0402_5% 1 2 2 1 2.6A 2 9 8 2 1.1V_1.0V_PWRP UP7717ASU8_PSOP_8 6 1 FB 1 1 NC 1 2 VOUT PC200 @ 22U_1206_6.3V 5 4 3 1 2 1 2N7002DW-T/R7_SOT363-6 GPOWER_EN +1_5VRUN_GATE 3 1 1 4 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 +5VDUAL R1799 100K_0402_5% 1 BAT54S SOT23 Updata on rev:1.1 4 VIN 1 5 POK GND1 3 VCNTL 2 B EN GND 1 U2909 2 2 3 6 1 Q3636A 2 10 0R @PC198 @ PC198 C D14 +3VRUN_GATE 3 Q3636B 5 Q3639A 2 R1798 100K_0402_5% 2 PR236 2k 0.22U_0402_16V7K CPU_VDDIO_SUS C496 NC_0.1U_50V_K 2 +5VDUAL 2 1U_0402_16V7K updata on rev:1.1 2 10U_0805_10V4Z 0.1U_0603_25V7K 1 2 PC158 0.1U_6.3V_K 0402_X5R 1 @PC166 @ PC166 GPOWER_EN1 1 C2158 2 1 2 PC155 0.1U_6.3V_K 0402_X5R PR146 1K_F 0402 1 2 49 VDDC_EN_EC NC_RB751V-40D2911 1 2 26 PE_GPIO1 NC_RB751V-40D2912 1 2 27 MXM_PWR_EN +5VDUAL R2978 1 C2179 2 1+3VRUN_GATE 2 1+1_5VRUN_GATE R1800 R1803 200K_0402_5% 200K_0402_5% R1793 +VSB 100K_0402_5% R1804 NC_100K_0402_5% 32 1 2 2 PR144 NC_3K 0402 1 2 +3.3VDUAL GPIO15 1 1 G S C2155 10U_0805_10V4Z 2 2 SI4800BDY-T1-E3_SO8 1U_0603_10V4Z 32 PR145 NC_3K 0402 1 1 2 2 3 D PQ65 2N7002-7-F PR141 10K 0402 3 2 1 1 C2162 1 2 2 GPIO20 PC161 51P 0402_X5R C2176 1 10U_0805_10V4Z 2 2 10U_0805_10V4Z +5VDUAL 1 1 1 2 1 1 G 2 S 5 6 7 8 2 2 3 1 PQ64 2N7002-7-F D Updata on rev:1.1 PR139 10K 0402 +3VRUN U68 SI4800BDY-T1-E3_SO8 8 1 7 2 6 3 5 6 2 2 1 C PC160 100P 0402_X5R U67 1 1 2 4.7NF 2 +3VRUN PR138 140K 0402 D 20A 2 0402 10K_F PR137 47K 0402 x 35K//47K//140K=17.5 KOhm 10Kohm 1.12V PC159 1 PR125 0402_X5R 2 PR126 35K 0402 R bot 0.9V jump_gap_open_161x54 1 2 2 +5VDual R top 0 4 1 1 S 1 2 3 2 4 G PQ54 SIR464DP-T1-GE3 2 D vddc GPIO15(n1) 0 PJ29 NC_1UH +-20% FDV0630-1R0M=P3 12A PL18 1 2 5 1 1 1 PR147 3.3R 0603 GPIO20(p8) Place these CAPS close to FETs 0.36UH_PCMC104T-R36MN1R17_30A_20% LS2_1040 1 2 VDDC_OUT1 PL19 VDDC_DL TPS51218DSCR/TPS51217 2 PR127 NC_100K_F 2 0402 PR136 1K_F 0402 2 VDDC_BST VDDC_DH VDDC_PHASE 2 1 2 PR130 0R 0603 11 10 9 8 7 6 PGOOD GND TRIP VBST EN DRVH VFB SW RF V5IN DRVL 1 PR135 30K_F 0402 1 PR128 1K_F 0402 PU7 1 VDDC_TRIP2 VDDC_EN 3 VDDC_VFB4 5 VDDC_RF 2 PC120 NC_1U_10V_K 0603_X5R 2 1 1 PC179 NC_100P_50V_K 0402_NPO 49 PARK-XT_PGOOD GPOWER_EN 1 2 3 1 D 2 jump_gap_open_161x54 1206_X5R 10U_25V_M PC178 2 1 5 2 D PQ46 SIR462DPT1-GE3 +3.3VDual 0.1U_25V_M 0603_X5R PC181 2 1 VDDC_DCBATOUT 1 1.8V_REG 1 JUMP_43X118 PC203 2 @PC202 @ PC202 @ NC_0.1U_0402_16V7K 22U_1206_6.3V PC163 15K_0402_5% 1 2 68P_0402_16V7K @ 3 Power Ctrl in Power Xpress mode Q3050 A GPOWER_EN R2991 0R 1.1V_1.0V_PWR 1.8V_REG A 1 2N7002E 3 R3072 100R 3 2 R3070 100R Q3046 5 Q3047 1 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division 1 2N7002E 2N7002E http://pc-120.taobao.com/ 2 EG discharge 2 FOR 4 3 2 Title Park-XT(VDDC/MVDDQ/18REG) Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 40 of 54 5 4 3 2 1 SATA HDD Conn. JSATA1 28 28 D 1 2 3 4 5 6 7 SATA_TX0+_C SATA_TX0-_C C635 C644 28 SATA_RX0-_C 28 SATA_RX0+_C +3.3V R1727 +5V C1718 NC_10uF C1721 10uF C1720 100nF 10nF 10nF 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 NC_0R C1717 C1719 NC_100nF NC_100nF C1722 100nF R1726 0R * Optional: immdiate spin up disable Need device to support C GND1 HTX+ HTXGND2 HRXHRX+ GND3 VCC3.3_1 VCC3.3_2 VCC3.3_3 GND4 GND5 GND6 VCC5_1 VCC5_2 VCC5_3 GND7 RESERVED GND8 VCC12_1 GND11 VCC12_2 VCC12_3 NC2 D 24 23 C C166D3-12204-L sata_ld2122_srjl6 To support Mobile SATA ODD through cable CONN@ SATA ODD_13P 2 SATA_TX1+_C SATA_TX1-_C 28 SATA_RX1-_C 28 SATA_RX1+_C 10nF 10nF PTH2 P1 P2 P3 P4 P5 P6 B C1727 10uF C1728 100nF C1726 100nF R1729 1K CN23 1 PTH1 NPTH4 +5V B C638 C639 S1 S2 S3 S4 S5 S6 S7 NPTH3 28 28 suyin_127382fb A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 3 2 http://pc-120.taobao.com/ SATA HDD /ODD Size B Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 41 of 54 3 2 MIC1 2 C577 0.1U_6.3V_K A_GND 2 2.2K_J 2 C589 0.1U_6.3V_K 49 SB_SPKR 27 1 1 Q39 2N7002-7-F D G 1 1 2 S update rev:1.1 R1646 0R 0402 R750 1 0R 2 0402 AMP_SHDW 49 2 B 1 2 1 1 2 2 HEADER_4P Updata on rev:1.2 R673 10K_J 0402 update on rev:1.1 1 2 2 2 R1662 R1650 0402 0402 NC_4.7K_J NC_4.7K_J MUTE_AMP# 5 6 2 BEEP# 2 100_J 1 G1 2 G2 3 4 1 2 33_J 0402 R1667 10k 0402 2 0402 1 2 3 4 0603 INT_SPK_R+_CN 0603 INT_SPK_R-_CN 0603 INT_SPK_L+_CN 0603 INT_SPK_L-_CN 1 0R 0R 0R 0R 2 2 2 2 2 VR15 NC_EGA10603V05A1-B 1 2 1 1 1 1 VR18 NC_EGA10603V05A1-B 1 2 R715 R713 R712 R716 3 1 1 1 2 1 R1661 2 JSPK3 INT_SPK_R+ INT_SPK_RINT_SPK_L+ INT_SPK_L- C818 1000P_50V_J 0402_NPO R1660 10 1000P_50V_K SPEAKER C822 1000P_50V_J 0402_NPO 10 D27 2 2 C574 10U_6.3V_M C812 1000P_50V_J 0402_NPO C766 NC_100P_50V_K 0402_X7R D28 2 1 Updata on rev:1.1 1U_10V_K C821 1000P_50V_J 0402_NPO 2 0.1U_6.3V_K A_GND AVEE B 1 Mic PTH1 1 C881 PTH2 R768 MIC_JACKR MIC_DET C831 NPTH1 220R-100MHZ_0603 C 6 1 2 3 5 4 NPTH2 L79 2 2.2K_J 2 INT_SPK_R+ A_GND INT_SPK_RINT_SPK_LINT_SPK_L+ C350 A_GND 8 7 2 100_F 1 1000P_50V_K R8221 R767 MIC_JACKL 1 220R-100MHZ_0603 1 L89 HP_FRONT_R HP_FRONT_L 21 20 19 C592 1 EP_GND 2 100_F 41 RIGHT- RIGHT+ 16 14 13 11 CX20671-11Z LEFT- LEFT+ AVEE FLY_N FLY_P 23 22 R8181 VR13 NC_EGA10603V05A1-B 1 2 PORTA_R PORTA_L DMIC_CLK DMIC_1/2 25 24 2 2.2U_16V_K 2 2.2U_16V_K 2 GPIO0/EAPD# GPIO1/SPK_MUTE# HP FOX_JA9333L_B5S7_7F AUDIO JACK CONN_6P CN20 2 MIC_JACKR_LC824 1 2 10K_F MIC_DET 1000P_50V_K 15 2 1 MIC1_VREFO MIC_JACKR_L MIC_JACKL_L MIC1_VREFO NC_DR NC_DL 40 1 32 31 30 2 39.2K_FHP_DET 1 2 EAPD C_BIAS PORTC_R PORTC_L NC_S MIC_JACKL_LC880 1 1 R1656 1 1 0402 PC_BEEP MIC2_R MIC2_L MIC2-VREFO R1655 NC_EGA10603V05A1-B VR9 0R 38 37 35 34 33 C830 Updata on rev:1.1 SENSE_A VR16 NC_EGA10603V05A1-B 1 2 10 39 R678 2 17 PORTB_R PORTB_L B_BIAS PCBEEP 36 SENSE_A 2 0402_NPO NC_22P_50V_K_N MUTE_AMP# RPWR_5.0 SENSE_A VR11 NC_EGA10603V05A1-B 1 2 BIT_CLK SYNC SDATA_IN SDATA_OUT CLASSDREF 12 28 AVDD_5V LPWR_5.0 29 FILT_1.65 27 2 7 18 26 3 RESET# VR17 NC_EGA10603V05A1-B 1 2 C 5 8 39_J 1 0402 SDATA_IN 6 4 1 R683 2 C763 1 9 1 0402 C882 HP_JACKR HP_DET 2 0R NC_EGA10603V05A1-B VR14 C572 10U_6.3V_M +3.3V 6 1 2 3 5 4 HP_JACKL NPTH2 220R-100MHZ_0603 8 7 220R-100MHZ_0603 L88 VR12 NC_EGA10603V05A1-B 1 2 L87 2 4.9_J 1 2 4.9_J 1 R679 5.11K_F 1 R680 2 27 AZ_BIT_CLK_CD 27 AZ_SYNC_CD 27 AZ_SDATA_IN0 27 AZ_SDATA_OUT_CD AVDD_3.3 2 0402_NPO NC_22P_50V_K_N FILT_1.8 C762 1 VAUX_3.3 VDD_IO DVDD_3.3 AVDD_HP U509 27 AZ_RST#_CD FOX_JA9333L_B5S7_7F AUDIO JACK CONN_6P CN27 1000P_50V_K 1 R727 VR10 NC_EGA10603V05A1-B 1 2 1 C570 10U_6.3V_M R815 HP_FRONT_R 2 1 C584 0.1U_6.3V_K 2 1 2 C585 0.1U_6.3V_K 2 1 1 1 2 C593 0.1U_6.3V_K 2 1 C583 0.1U_6.3V_K A_GND HP_FRONT_L 2 10K_F C576 10U_6.3V_M 2.5A MAX CLASSD_5V FILT_1.8V D 2 Updata on rev:1.1 1 R717 only needed if supply to VAUX_3.3 is removed during system re-start. . 0 C883 R302 0R 0805 2 1 C582 0.1U_6.3V_K 2 2 C578 10U_6.3V_M R717 PCBEEP 1 R688 PTH1 2 2.2U_16V_K 1 2 PTH2 MIC2_L C765 1 220R-100MHZ_0603 INT_MIC L73 NPTH1 2 2.2U_16V_K 1 MIC2_R C764 1 2 1 1 2 C579 0.1U_6.3V_K C351 10U_6.3V_M 2 1 1 2 2 C352 10U_6.3V_M 2 2.2K_J 2 2 1 2 1 C581 0.1U_6.3V_K 1 MIC2-VREFO R671 C575 0.1U_6.3V_K A_GND +5V 2 C591 1U_10V_K 2 2 NC_00805 2 0R 0805 1 1 1 2 NC_00805 2 0R 0805 1 1 R322 C590 1U_10V_K C571 0.1U_6.3V_K Layout Note: Place bypass caps very close to device. 1 1 R321 1 R310 +3.3V 1 R318 C573 0.1U_6.3V_K +3.3V +3.3VDUAL +3.3VDUAL C580 10U_6.3V_M 2 C5193 0.1U_10V_K 2 D 2 0R 0805 2 1 1 R313 1 1 +3.3V 1 0.1UF_50V_K 4 VR4 NC_EGA10603V05A1-B 1 2 5 C848 1 0402_NPO A_GND GP7 CLOSE_JUMP_40X50 1 2 GP6 CLOSE_JUMP_40X50 1 2 GP5 CLOSE_JUMP_40X50 1 2 A 1 0402_NPO 20.1U_50V_J C851 GND 2NC_1000p_50V_J C852 1 0402_NPO 2NC_1000p_50V_J Updata on rev:1.1 Reserved for EMI C853 1 0402_NPO A 2NC_1000p_50V_J A_GND Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 Audio (CODEC HP MIC) Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 42 of 54 4 3 CN5 BOARD SIDE CONN_40P CNS40_LCD_R1 2 C612 33P_50V_J C619 0.1U_50V_K_B L_CLKINL_CLKIN+ L_RXIN0L_RXIN0+ L_RXIN1L_RXIN1+ L_RXIN0+ L_RXIN0- R304 R307 R0402 0R R0402 0R R286 R287 R0402 NC_0R R0402 NC_0R L_RXIN1+ L_RXIN1- R308 R315 R0402 0R R0402 0R R289 R299 R0402 NC_0R R0402 NC_0R L_RXIN2+ L_RXIN2- R316 R317 R0402 0R R0402 0R R300 R303 R0402 NC_0R R0402 NC_0R L_CLKIN+ L_CLKIN- R319 R320 R0402 0R R0402 0R TXOUT_L0+ TXOUT_L0- 37 37 TXOUT_L1+ TXOUT_L1- 37 37 TXOUT_L2+ TXOUT_L2- 37 37 TXCLK_L+ TXCLK_L- 37 37 +V5AL_CAM USB20_CMOS_N6 USB20_CMOS_P6 1.5A C586 0.1U_10V_K R433 0R 2 C587 33P_50V_J 1 LCDVCC 2 LCDVCC_R C588 0.1U_10V_K D +3.3V +3.3V DISPOFF# 1R1632 DDCCLK DDCDATA 1 0_0402_5% 2 NC_0_0402_5% 2 NC_0_0402_5% 2 1R1633 1R1649 EC_LCD_BKL_PWM BLON_PWM 49 2 37 NB_LCD_BKL_PWM C1911 0.1U_0402_16V4Z 23 41 42 23 NB_LVDS_TX_L2P 23 NB_LVDS_TX_L2N 23 NB_LVDS_TX_CLKLP 23 NB_LVDS_TX_CLKLN R0402 NC_0R R0402 NC_0R 2 23 NB_LVDS_TX_L1P 23 NB_LVDS_TX_L1N R278 R283 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 1 23 NB_LVDS_TX_L0P 23 NB_LVDS_TX_L0N L_RXIN2L_RXIN2+ 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 330R-100MHZ_0805 1 32V_1A_0603 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 DCBATOUT_L 2 C620 0.1U_50V_K_B L41 2 1 1 C599 1U_25V_M_B 2 D F2 2 1 1 1 AS BM5959 +VIN 2 +VIN 2 41 42 5 32 32 C R177 R0402 0R R188 R0402 0R SCL SDA 23 NB_LCD_DDC_CLK 23 NB_LCD_DDC_DATA R567 1 R568 1 2 0_EG 2 0_EG DDCCLK DDCDATA R565 1 R566 1 2 0_IG 2 0_IG DDCCLK DDCDATA +3.3V C CHK7 3 2 USB20_CMOS_P6 USB20_CMOS_N6 2 1 D9 D10 nc_90ohm@100MHz,0.5A L4_0805 EGA10603V05A1-B ns ESDPAD_R0603 ns D18 2 1 4 1 USBP5 USBN5 2 27 27 DDCCLK 3 1 EGA10603V05A1-B ESDPAD_R0603 ns BAT54S SOT23 GND D26 DDCDATA +3.3V 2 3 1 BAT54S SOT23 5 U33 1 49 BKOFF# GND 4 DISPOFF# 3 2 0_IG R167 23 NB_LCD_BKL_EN R176 32 GPIO7_BLON EC_LCD_BKL_PWM 1 C1907 1 DISPOFF# C1909 74AHC1G08DBV R0402 0_PARK-S3 R0402 2 2 220P_0402_50V7K 220P_0402_50V7K B B 2 3 R178 47K R0402 +V5AL_CAM SOT23 D 2 R435 1 0R Q20 2307 S R434 NC_0R1 47K R135 500mA R0402 3 G 2 1 CAM_PWRON G R175 100K R0402 A S 2 49 Q11 2N7002 SOT23 C260 0.1uF/10V,X5R C0402 . 23 NB_LCD_PWR_EN 37 DIGON R633 1 R636 1 2 0_IG 2 0_PARK-S3 C201 NC_0.1uF/25V,Y5V C0402 . Q22 2N7002 SOT23 1 R179 100K R0402 Q21 AO6409 TSOP6_0D95_1D6 LCDVCC 500mA 1 Q23 2N7002 SOT23 2 D C235 0.1uF/10V,X5R C0402 . 3 R305 100 R0603 3 R0402 3 10K R174 C237 0.1uF/25V,Y5V C0402 . 5 6 2 1 C200 0.1uF/10V,X5R C0603 . Updata on rev:1.3 2 R168 10K R0402 D 1 G LCDVCC Updata on rev:1.3 S +5VDUAL +5V +3.3V 4 +3.3VDUAL C236 0.1uF/10V,X5R C0402 . A 删除Q21 2N7002DW 增加 Q13 Q14 2N7002 增加 C185 10月22日 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 LVDS CON Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 43 of 54 5 4 3 2 1 D D CRT Connector L900 47nH L904 47nH CRT_B L902 47nH 1 1 1 C1937 1 C1939 C1938 1 C1918 5.6P_0402_50V8J 5.6P_0402_50V8J 5.6P_0402_50V8J 2 2 2 150_0402_1% 2 150_0402_1% 2 1 1 C1919 C1920 3 1 2 47NH_0805 CRT_G_2 1 2 47NH_0805 2 2 6P_0402_50V8J 6P_0402_50V8J 6P_0402_50V8J GM@ GM@ +CRT_VCC 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z R1659 1 GM@ 1 L4 2 27NH_0603_5% 1 L5 2 27NH_0603_5% CRT_VSYNC_2 1 1 C1925 4.7P_0402_50V8J 2 5 CE# 4 2 +CRT_VCC Place closed to chipset +3.3V U47 A VCC GND R1666 IG_0_0402_5% R1658 CE# Y 4 1 CRT_VSYNC_1 74AHCT1G125 2 27_0402_5% 2K_0402_5% R1653 B 2 NC_30.1_0402_1%_IG 33_0402 DSUB_12 R1668 1 GM@ 32 VSYNC_DAC1 32 HSYNC_DAC1 R1651 2K_0402_5% 2 3 2 2 CRT_VSYNC 30.1_0402_1%_N11M R1637 1 GM@ 2 CRT_HSYNC 30.1_0402_1%_N11M Q112 2N7002 SOT23 33_0402 DSUB_15 R1669 1 2 R1664 1 3 GM@ R1638 1 2 0_0402_5%_N11MCRT_B 32 B_DAC1 32 G_DAC1 R1640 1 GM@ 2 0_0402_5%_N11MCRT_G R_DAC1 R1641 1 GM@ 2 0_0402_5%_N11MCRT_R 32 Updata on rev:1.2 NC_0_0402_5%_IG 1 32 B DAC_SDAT 23 DDC6CLK 32 DAC_SCL 23 GM@ 2 210K_0402_5% D GM@ DDC6DATA GM@ R1654 2 GM@ R1635 1 0_0402_1%_N11M 2 R1648 1 R1663 10K_0402_5% 1 R1644 1 GM@ NC_30.1_0402_1%_IG G HSYNC# 2 S 23,24 R1636 1 R1665 EG_0_0402_5% G VSYNC# D 23,24 1 SOT23_5 R1663 AND R1664 pull-up 10k on park xt 2 +CRT_VCC 5 1 3 C1929 100Pf_0402_50V8J 1 1 fox_dz11a9_sb1dd +3VRUN 2 2 2 CRT_VSYNC C change to 12p based on reference video cicuit add two resisitance SOT23_5 GND2 GND3 DSUB_15 C1936 2 100P_0402_50V8J 1 2 27_0402_5% 74AHCT1G125 RGND ID0 Red GGND SDA Green BGND Hsync Blue +5V Vsync res SGND SCL GND1 1 4.7P_0402_50V8J 2 Y DSUB_12 C1926 1 GND 16 17 JCRT1 DZ11A91-SB261-7F CONN@ 2 100P_0402_50V8J R1657 1 CRT_HSYNC_1 1 VCC 2 2 0_0402_5% 1 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 S 3 A 1 1 C1924 CRT_HSYNC_2 2 2 1.1A_6VDC_FUSE 1 C1923 NC_5P_0402_50V8J 2 U48 CRT_HSYNC W=40mils 2 C1914 0.1U_0402_16V4Z 2 C 1 C1934 1 C1928 +CRT_VCC F1 1 C1921 C1922 NC_5P_0402_50V8JNC_5P_0402_50V8J 2 2 2 1 CRT_B_2 1 change to 82nH based on e698 1 1 2 3 1 L65 1 1 CRT_R_2 2 1N5819 SOD123 D12 BAT54S SOT23 2 47NH_0805 L63 R1625 R1626 R1627 D11 BAT54S SOT23 +R_CRT_VCC D38 1 1 L61 CRT_G 2 1 CRT_R 2 D8 BAT54S SOT23 1 1 1 EACH ESD SUPPRESSION COMPONENT IS D C1927 C1930 C1933 decoupled with at least one 100nf to 470nf ceramic capacitor 100NF_0402_50V8J100NF_0402_50V8J100NF_0402_50V8J 2 2 2 Based on ref136 2 3 +3.3V When use IG R1625 140 When use EG R1625 150 140_0402_1% W=40mils +5V Q113 2N7002 SOT23 Place closed to chipset 2 R1652 1 0_0402_5%-N11M NC_0_0402_1%_IG GM@ 2 R1647 1 GM@ +CRT_VCC GM@ D16 23 NB_VGA_B R1639 1 2 NC_0_0402_5%_IG 23 NB_VGA_G R1642 1 GM@ 2 NC_0_0402_5%_IG 23 NB_VGA_R R1643 1 GM@ 2 NC_0_0402_5%_IG DSUB_12 D19 3 2 2 1 1 BAT54S SOT23 GM@ 3CRT_HSYNC_2 BAT54S SOT23 GND GND D17 DSUB_15 D20 2 2 1 1 3 3 A BAT54S SOT23 CRT_VSYNC_2 A BAT54S SOT23 GND GND Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 CRT Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 44 of 54 5 4 3 2 1 +3.3V R491 1 2 C390 C650 2.2U_6.3V_M 1000pF/50V,X7R_BT 0402_X5RC0402 C666 0.1uF/10V,X5R_BT R492 1 C0402 1 2 3 9 4 10 5 6 7 8 0_BT 2 R0603 CHK6 [email protected] l4_0805 4 USBP7 1 USBN7 27 27 BT_ACTIVE 47,49 2 Updata on rev:1.1 3 2 D 0_BT 2 R0603 2 R444 1 0 R0402 BT_LED 47,51 3 2 R445 1 NC_0 R0402 R0402 100K_BT R486 1 1 2 1 C393 680P_50V_K 0603_X7R 2 Updata on rev:1.3 BT_CN1 87213-0800_BT foxconn_hs6208e 1 220R-100MHZ_0603 L74 NC_220R-100MHZ_0603 L75 1 0.5A 2 +3.3V_S4 D 2 2 BLUE TOOTH 1 R442 100k R0402 增加BT En/Disable信号，高电平有效。增加对地电阻。 Q35 2N7002 SOT23 . 1 C C 增加BT Status LED信号，BlueTooth模块输出驱动LED，高电平有效 2010-5-20 update on rev:1.1 +3.3V update on rev:1.1 2 R202 NC_10K R0402 R272 SMDFIX2 HEADER_6P_FP FOXCONN_GB5RF060_1203_7F +3.3V_S4 3 500mA 1 G SMDFIX1 Finger Print 1 C395 NC_0.1uF/10V,X5R C0603 . NC_10K R0402 3 1 CN11 D 9,11,27,46 need to be changed SLP_S5# 2 1 NC_0_J_FP R786 1 G S Q12 NC_2N7002 C391 NC_0.1uF/10V,X5R C0402 . SOT23 2 update on rev:1.1 B ESD9 EGA1-0603-V05 ESDPAD_R0603 2 L77 2 1 0_J_FP ESD10 R778 EGA1-0603-V05 ESDPAD_R0603 6 5 USB_PP6_F 4 USB_PN6_F 3 2 1 R439 0R Q24 SOT23 NC_2307 +3.3VDUAL 1 +3.3V_fp 2 USBP6 USBN6 R438 0R NC_90R-100MHZ_0R35 4 3 1 2 1 27 27 2 . 7 2 0_J_FP 1 R805 2 8 C392 0.1uF/10V,X5R C0402 +3.3V_S4 D R437 2 NC_0R1 S 30mA B C394 R211 NC_0.1uF/10V,X5R NC_100K C0402 R0402 . Updata on rev:1.3 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 FP / BT / CIR Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 45 of 54 5 4 3 2 1 +5VDUAL R728 1 2 0R R735 1 9,11,27,49 SLP_S5# 2 0402 USB_PWR_EN_R 27 27 27 +5VDUAL USBP3 USBN3 USB_OCP3# C843 0402 USB_PP4 USB_PN4 USB_PWR_EN_R 0.1U_16V_Y_Y 1 2 1 2 3 4 5 6 7 8 9 10 11 12 1 2 C844 1U_25V_M_B 0603 SMDFIX1 D SMDFIX2 U27 1 2 3 4 GND OUT_3 IN_1 OUT_2 IN_2 OUT_1 EN(EN#) OC# 8 7 6 5 USB_VCC1 CN37 1 2 NC_0 0402 USB CON. C834 0.1U_16V_Y_Y 0402 14 D C833 0.1U_16V_Y_Y 0402 2 1 13 +5VDUAL FPC_12P USB_VCC1 USB_OCP1# 27 G545B2P8U_1.5A_Low C842 1 2 0402 U28 R736 1 49 USB_PWR_EN 2 1 2 3 4 NC_0 0402 GND OUT_3 IN_1 OUT_2 IN_2 OUT_1 EN(EN#) OC# 0.1U_16V_Y_Y 8 7 6 5 USB_VCC0 USB_OCP0# USB_VCC0 27 G545B2P8U_1.5A_Low C C del R730 2 0603 2 8 NPTH2 PTH2 6 1 GND 020173MR004G565ZR FL-5988 1 6 2 C846 NC_5P_50V_K_B 0402_X7R 5 D30 NPTH1 7 VV+ GND 8 NPTH2 PTH2 020173MR004G565ZR FL-5988 NC2 NC_RSB12JS2 1 C850 NC_5P_50V_K_B 0402_X7R 2 1 2 2 NC1 C840 0.1U_16V_Y 0402_Y5V CN19 PTH1 VCC 6 1 C838 470P_50V_K_B 0402_X7R 2 + 3 CAP13 47U_6.3V_3528 6TPC47MB 4 NC_90R-100MHZ_0R35 1206 2 0603 1 0R R725 1 2 3 4 USB_VCC1_R U_VD1-_F U_VD1+_F 5 3 2 2 4 1 1 USB_PN1 USB_PP1 2 USBN1 USBP1 V+ C841 0.1U_16V_Y 0402_Y5V 2 0603 L78 27 27 7 NPTH1 V- B R724 0R 1 1 CN18 PTH1 VCC NC2 NC_RSB12JS2 C845 NC_5P_50V_K_B 0402_X7R 2 USB_VCC1 B D31 NC1 1 del R733 2 3 1 C837 470P_50V_K_B 0402_X7R 5 1 1 C839 0.1U_16V_Y 0402_Y5V + 4 0603 CAP8 47U_6.3V_3528 6TPC47MB 2 NC_90R-100MHZ_0R35 1206 0R 2 R732 1 1 USB_VD0-_F USB_VD0+_F 2 USBN0 USBP0 1 2 3 4 USB_VCC0_R 2 3 2 27 27 1 4 1 0R L80 USB_PN0 USB_PP0 6 R722 1 5 USB_VCC0 C849 NC_5P_50V_K_B 0402_X7R A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 http://pc-120.taobao.com/ 3 2 USB/PW_SW CONN Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 46 of 54 3 2 1 +3.3VDUAL D23 NC_EGA1-0603-V05 ESDPAD_R0603 +DATA3 1 2 D24 NC_EGA1-0603-V05 ESDPAD_R0603 -DATA3 1 C473 10uF/6.3V,X5R C0805 . +1.5V C470 10uF/6.3V,X5R C0805 . 2 C469 0.1uF/10V,X5R C0402 . C468 0.1uF/10V,X5R C0402 . C472 0.1uF/10V,X5R C0402 . D21 NC_EGA1-0603-V05 ESDPAD_R0603 C465 0.1uF/10V,X5R C0402 . C471 +3.3V 0.1uF/10V,X5R C0402 . C466 10uF/6.3V,X5R C0805 . USB_PP4 1 2 D22 NC_EGA1-0603-V05 ESDPAD_R0603 USB_PN4 1 +1.5V C447 10uF/6.3V,X5R C0805 . 2 C464 0.1uF/10V,X5R C0402 . C467 0.1uF/10V,X5R C0402 . C449 0.1uF/10V,X5R C0402 . C463 0.1uF/10V,X5R C0402 . C462 0.1uF/10V,X5R C0402 . +V3.3S_PCIE C444 10uF/6.3V,X5R C0805 . C C445 0.1uF/10V,X5R C0402 . C +V3.3AL_PCIE MPCIE2 7 9 11 13 15 WAKE# +3.3V_1 RSVD1 GND7 RSVD2 +1.5V_1 CLKREQ# RSVD13 GND1 RSVD14 REFCLK- RSVD15 REFCLK+ RSVD16 GND2 RSVD17 R383 0R MPCIE1 +1.5V 4 R475 NC_0 R0402 48,49 PCIE_WAKE_UP# 6 R476 2K 45,49 BT_ACTIVE R0402 SIM_DATA 12 SIM_CLK 14 SIM_RESET 20 PCIE_PE2_CLKN 11 16 UIM_VPP_R R0402 20 PCIE_PE2_CLKP 13 R385 NC_0 PROBE TP268 9 15 27 29 31 更改网络属性到+V3.3S R289 NC 33 35 26,30 26 37 R391 NC_0 R0603 39 R389 NC_0 R0603 R400 0R R0603 LPC_CLK1 41 R379 NC_0RR0603 PCI_CLK0 26,49 LFRAME# +3.3V B 26,49 LAD0 26,49 LAD1 26,49 LAD2 26,49 LAD3 R285 NC_0RR0402 43 R367 0R R0402 45 R288 0R R0402 47 R378 0R R0402 49 R375 0R R0402 51 W_DISABLE# GND3 PERST# PER_N0 +3.3V_AUX PER_P0 GND9 GND4 +1.5V_2 GND5 SMB_CLK PET_N0 SMB_DATA PET_P0 GND10 GND6 USB_D- RSVD5 USB_D+ RSVD6 GND11 RSVD7 LED_WWAN# RSVD8 LED_WLAN# RSVD9 LED_WPAN# RSVD10 +1.5V_3 RSVD11 GND12 RSVD12 +3.3V_2 GNDM1 GNDM2 55 53 RSVD4 PCIE MINI CARDW Mini_Card_CONN R284 NC_0RR0402 WAKE# +3.3V_1 RSVD1 GND7 RSVD2 +1.5V_1 CLKREQ# RSVD13 GND1 RSVD14 REFCLK- RSVD15 REFCLK+ RSVD16 GND2 RSVD17 20 +3.3VDUAL WP_DISABLE# 49 PROBE TP266 22 PROBE TP267 24 R384 0R 28 30 R412 NC_0 R0402 SCLK1 32 R413 NC_0 R0402 SDATA1 34 36 -DATA3 38 +DATA3 R0603 23 26 PCIE_PE2_SB_RXP 25 27 29 R0402 CHK2 [email protected] L4_0805 4 3 1 2 31 26 PCIE_SB_PE2_TXN 33 26 PCIE_SB_PE2_TXP USBN8 USBP8 27 27 35 40 37 +3.3V R387 0R LED_WIRELESS# 19 26 PCIE_PE2_SB_RXN 27 R386 27 0R 17 21 R388 NC_0 R0603 +3.3V 26 42 R0402 R381 NC_ 44 39 R0603 41 R382 NC_0 R0603 46 R306 NC_0 R0603 43 48 45 50 47 52 2 R374 0R R0603 +1.5V 4 6 8 10 12 14 16 KEY 18 49 +V3.3S_PCIE_3G 54 51 53 +3.3V RSVD3 RSVD4 GND8 W_DISABLE# GND3 PERST# PER_N0 +3.3V_AUX PER_P0 GND9 GND4 +1.5V_2 GND5 SMB_CLK PET_N0 SMB_DATA PET_P0 GND10 GND6 USB_D- RSVD5 USB_D+ RSVD6 GND11 RSVD7 LED_WWAN# RSVD8 LED_WLAN# RSVD9 LED_WPAN# RSVD10 +1.5V_3 RSVD11 GND12 RSVD12 +3.3V_2 GNDM1 GNDM2 55 25 GND8 NC2 23 RSVD3 NC1 21 7 Update on rev:1.1 Change debuge port to 3G slot C446 0.1uF/10V,X5R C0402 . +3.3V 56 19 5 10 KEY 17 1 3 Updata on rev:1.3 VSIM_VBB 8 C448 10uF/6.3V,X5R C0805 . +V3.3S_PCIE R0603 PCIE MINI CARD Mini_Card_CONN NC2 5 +V3.3S_PCIE_3G NC1 3 +3.3V 2 R3735 DNI 20K 18 20 WU_DISABLE# 49 22 2 0 +3.3VDUAL +V3.3AL_PCIE R376 NC_0 R0603 BUF_PLT_RST# 24 +1.5V 26 28 R380 0R 30 R414 NC_0 R0402 SCLK1 R415 nc_0 R0402 R368 0R R0402 SDATA1 27 CHK1 [email protected] L4_0805 36 USB_PN4 38 USB_PP4 PCIE_RST# 26,27,31,36,48 +3.3V 32 34 1D3708 R0603 27 4 1 3 2 USBN4 USBP4 27 27 B 40 R361 0R 42 R0402 44 LED_WIRELESS# 51 46 +1.5V R362 0R R0402 BT_LED 45,51 48 50 +V3.3S_PCIE 52 54 56 1 VSIM_VBB UC1 0.1uF/10V,X5R C0402 . UC2 NC_0.1uF/10V,X5R C0402 . P1 SIM_RESET P2 SIM_CLK UC4 NC_22pF/10V,X5R C0402 . P3 P4 P5 VCC I/O RST NC2 CLK GND2 NC1 GND3 GND1 CD NC4 UC3 NC_22pF/10V,X5R C0402 . USIMCON1 SIM SIM_DATA UC5 NC_22pF/10V,X5R C0402 . UIM_VPP_R 2 P10 CD P11 1 SIM_RESET 3 D15 NC_CM1293 CH1 CH4 VSS VCC CH2 CH3 4 SIM_DATA VSIM_VBB 5 6 SIM_CLK SOT23-6 P12 UIM_VPP_R P6 VPP NC3 UC6 NC_22pF/10V,X5R SIM_CONN_5927 C0402 . P7 P8 P9 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 3 2 http://pc-120.taobao.com/ 1 Park-XT(Straps & Thermal) Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 47 of 54 5 4 3 +3V_LAN 2 1 +3V_LAN Pin#55 4 1 1 R842 LANXOUT DVDD MDI3+ MDI3- C425 20P_50V_K JMC261(10X10) LQFP64-10X10 EEPROM_SOIC-8_2KB 1 REXT R841 12K_J +3V_LAN +3V_LAN Card_3V3 (>20mil) PTXPX PTXNX C4351 C4361 MDIO3 MDIO4 MDIO5X GND MDIO6 +3.3V R11 1 R14 1 TP86 2 NC_0 2 NC_100K 2 0.1U_6.3V_K 2 0.1U_6.3V_K +3V_LAN Pin#8 R12 1 47,49 2 0R R1302 nc_8.2K Updated on Rev1.1 1 D1303 PCIE_RST# 26,27,31,36,47 (>20mil) DVDD 2ARFB12 (>20mil) MHCI06030 (>20mil) update rev:1.2 C433 22U_6.3V_M C434 0.1U_6.3V_K 1 2 2 C429 C432 22U_6.3V_M 0.1U_6.3V_K update rev:1.2 PCIE_WAKE_UP# NC_2N7002E C2 NC_0.1U_6.3V_K PCIE_LAN_NB_RXP 22 PCIE_LAN_NB_RXN 22 PCIE_NB_LAN_TXN 22 PCIE_NB_LAN_TXP 22 1 Q1310 3 2 PCIE_WAKE_UP#_LOM update rev:1.2 2 NC_47K R1361 47K 2 0 REGLX 1 PCIE_LAN_CLKP PCIE_LAN_CLKN MDIO4 MDIO6 MDIO13 R1360 +3.3VDUAL 1 DVDD CR1_CD0N TP38 CR1_CD1N LAN_LED2 PCIE_LAN_CLKREQ# MPD PCIE_WAKE_UP#_LOM 1 XRSTN R63 0R DVDD L2 4.7uH/5.5A/15mOHM 1 20 PCIE_LAN_CLKP 20 PCIE_LAN_CLKN 2 10K_J 2 10K_J 2 1K_J +3V_LAN R810 0R (>20mil) Card_3V3 R836 1 R839 1 R840 1 CR1_LEDN +3V_LAN CR1_CD0N CR1_CD1N 2 C 2 4.7K_J 2 4.7K_J JMC251 JMC261 GND MDIO13 +3V_LAN 2 Card Reader R8441 R8451 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 GND3 MDIO13 MDIO14 SMB_SDA/CR_LEDN TESTN VDDIO2 VDD1 VCC3O CR_CD0N CR_CD1N SMB_SCL/LED2 CREQN MPD WAKEN RSTN AVDDX REXT VDDX33 XIN XOUT GND1 LX FB12 VDDREG CLKN CLKP AVDDH RXP RXN GND2 TXN TXP C417 25MHz 20P_50V_K Y_5938 2 1 4.7K_J LAN_LED2 CR1_LEDN 2 4.7K_J MDI2+ MDI2- NC_1M_J 2 8 7 6 5 2 A0 VCC A1 WP A2 SCL GND SDA 2 1 2 C419 0.1U_6.3V_K 1 2 3 4 U9 2 Y7 3 R812 1 R811 +3V_LAN LANXIN AS BM5960 1 1 +3V_LAN LED0 LED1 VDD GND5 VIP_1 VIN_1 AVDD12 VIP_2 VIN_2 GND6 AVDD33 VIP_3(NC) VIN_3(NC) AVDD12(NC) VIP_4(NC) VIN_4(NC) 1 +3V_LAN MDI1+ MDI1GND D 2 DVDD 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 GND MDI0+ MDI0- 1 DVDD Pin#11 MDIO0 MDIO1 MDIO2 VDDIO1 MDIO3 MDIO4 MDIO5 GND4 MDIO6 MDIO7 VDDIO MDIO8 MDIO9 MDIO10 MDIO11 MDIO12 1 2 Pin#2 C416 0.1U_6.3V_K 1 2 C413 0.1U_6.3V_K 1 2 Pin#59 Function C2 NC Disable D3E NC Enable D3E(1) 0.1u Enable D3E(2) R4 R5 NC NC NC 0 100K NC closed to chip. Pin#8 C 2 Pin#59 C412 0.1U_6.3V_K 1 2 1 2 Pin#27 R3 0 NC NC 2 U7 LANXIN LANXOUT GND REGLX ARFB12 Pin#45 C234 0.1U_6.3V_K 1 2 1 2 Pin#38 C428 NC_10U_6.3V_M Pin#38 C199 0.1U_6.3V_K update rev:1.1 C198 0.1U_6.3V_K 2 R846NC_0R 1206 1 2 MPD connect to Main Power or RSTN for D3E applicaion, to AUX power otherwise. MDIO Single End = 50 Ohm 1 Pin#55 MDIO0 MDIO1 MDIO2 2 1 C197 0.1U_6.3V_K 2 1 1 2 Pin#62 2 22_J MDIO5 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 Pin#51 R61 1 2 3 4 5 6 7 8 PCIE_LAN_CLKN 9 PCIE_LAN_CLKP 10 11 12 PRXP 13 PRXN 14 GND 15 16 Pin#17 C196 0.1U_6.3V_K 2 1 C443 0.1U_6.3V_K 1 2 Pin#17 1 MDIO5X 1206 2 1 0 C426 NC_10U_6.3V_M +3.3V Pin#26 +3V_LAN R832 1 C427 NC_10U_6.3V_M +3.3VDUAL C34 NC_10U_10V_M D C438 0.1U_6.3V_K 2 1 2 1 C437 0.1U_6.3V_K DVDD Pin#7 Pin#7 22 21 20 19 18 17 16 15 14 13 12 MDIO2 MDIO3 CARD_3V3 MDIO5 MDIO4 MDIO3 CR1_CD1N 1 MDIO2 CARD_3V3 CR009 2 NC1 28 GND4 2 NC2 GND3 C411 NC_12P_50V_K_N 0402 26 C753 0.1U_16V_Y SD9# MS10# SD1# MS9# MS8# SD2# MS7# MS6# SD3# MS5# SD4# C410 NC_12P_50V_K_N 0402 2 1 C733 1000pF/2000V C1206 MDIO4 MDIO5 MDIO1 MDIO0 NC_49.9_F NC_49.9_F C754 0.1U_16V_Y GND2 1 1 0402 75_J update rev:1.2 R829 NC_49.9_F NC_49.9_F 1 0402 2 75_J GND1 R830 R817 2 2 R821 CD_SD SD_WP SD8# SD7# SD_WP_GND SD6# MS1# MS2 SD5# MS3# MS4# 25 R813 1 2 3 4 5 6 7 8 9 10 11 23 R826 1 2 0.01U_10V_K CN13 CR1_CD0N MDIO6 MDIO1 MDIO0 24 MDI2+ MDI2MDI3+ MDI3- 1 C747 1 2 0.01U_10V_K 1 75_J 0402 1 1 0402 75_J 1 TX3+ TX3- C757 1 R828 2 2 R823 2 NC_1-1_350UH G2453CG TX0+ TX0RXCT TXCT TX1+ TX1TX2+ TX2- 2 23 22 24 21 20 19 17 16 18 15 14 13 2 DVDD MX1+ MX1MCT1 MCT2 MX2+ MX2MX3+ MX3MCT3 MCT4 MX4+ MX4- 1 MDI3+ MDI3- TD1+ TD1TCT1 TCT2 TD2+ TD2TD3+ TD3TCT3 TCT4 TD4+ TD4- 2 NC_0.1U_10V_K 0402_X5R 1 2 2 C752 1 0.1U_10V_K 0402_X5R L84 1 C756 MDI1+ MDI1MDI2+ MDI2- 2 3 1 4 5 6 8 9 7 10 11 12 2 MDI0+ MDI0- NC_0.1U_10V_K 0402_X5R 1 2 2 C758 1 NC_0.1U_10V_K 0402_X5R 2 C759 27 closed to chip. 1 R816 1 R825 1 1 1 MDI1+ MDI1- R819 1 TX0+ TX0RXCT RN25 2 4 6 8 0x4 RA0603_8 TXCT TX1+ TX1- TX0+ TX0- CHK16 1 4 TX1+ TX1- [email protected] l4_0805 1 2 4 3 2 3 TRD0P_RJ45 TRD0N_RJ45 B update rev:1.2 TRD1P_RJ45 TRD1N_RJ45 [email protected] CHK15 l4_0805 9 2 1 2 2 C736 NC_0.1U_16V_Y 2 1 2 2 2 16 15 14 13 11 10 9 12 0.1U_16V_K_B C734 0402 1 RX+ RXRXCT NC4 TXCT TX+ TXNC3 R827 NC_49.9_F NC_49.9_F 0.1U_16V_K_B C755 0402 2 RD+ RDRDCT3 NC1 TDCT4 TD+ TDNC2 H1631CG NC_49.9_F NC_49.9_F C760 NC_0.1U_16V_Y 1 3 5 7 U41 1 2 3 4 6 7 8 5 MDI0+ MDI0- B . R824 NC_0R 0603 update rev:1.1 1 3 5 7 RN26 RJ45 2 4 6 8 TRD0P_RJ45 TRD0N_RJ45 TRD1P_RJ45 TRD2P_RJ45 TRD2N_RJ45 TRD1N_RJ45 TRD3P_RJ45 TRD3N_RJ45 NC_0x4 RA0603_8 TX3TX3+ TX2TX2+ CHK18 1 4 2 3 [email protected] 1 2 l4_0805 4 3 1 2 3 4 5 6 7 8 TX0+ TX0TX1+ TX2+ J5 RJ45-C100N9 BM05_RJ45 TX0+ TX0TX1+ TX2+ TX2TX1TX3+ TX3- TX2TX1TX3+ TX3- TRD3N_RJ45 TRD3P_RJ45 10 11 12 Updata on rev:1.3 TRD2N_RJ45 TRD2P_RJ45 [email protected] CHK17 l4_0805 A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 http://pc-120.taobao.com/ 3 2 LAN/CARD READER (JMC261) Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 48 of 54 5 4 3 2 1 +3.3VALW +3.3VDUAL 2 46 USB_PWR_EN 47 WP_DISABLE# R3235 51 KBC_GPIO77 45,47 BT_ACTIVE EC_V3.3AL 2 EC_SMB_CK0 4.7K_0402_5% 2 EC_SMB_DA0 4.7K_0402_5% SCANOUT0 SCANOUT1 SCANOUT2 SCANOUT3 SCANOUT4 SCANOUT5 SCANOUT6 SCANOUT7 SCANOUT8 SCANOUT9 SCANOUT10 SCANOUT11 SCANOUT12 SCANOUT13 SCANOUT14 SCANOUT15 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 SCANOUT16 SCANOUT17 56 57 128 2 2 EC_SMB_CK1 4.7K_0402_5% 2 EC_SMB_DA1 4.7K_0402_5% 7 7 16 16 BAT_CLK BAT_DAT TSI_CLK TSI_DAT 16 16 SCLK2 SDATA2 KBC 0R TP_CLK TP_DATA 93 94 95 96 97 R3231 0R SYSTEM_DUAL_PG R547 0R R0402 27,51 SB_PWRGD 1 D46 1N4148WS SOD323 R430 100K R0402 R3029 47K R3031 KBC 1 3 11 127 74 VBAT VCC VDDA_EN_EC 16 VDRAM_PWRGD 9 PWM7/GPA7 106 34 CAM_PWRON 43 AC_BAT# 32 CLOCK GPIO_WAKE PWRSW/GPE4 WUI5/GPE5 LPCPD#/WUI6/GPE6 L80LLAT/WUI7/GPE7 GPE2/ISAS PS/2 SM BUS GPE1/ISAD GPE3/ISCLK RI1#/WUI0/GPD0 RI2#/WUI1/GPD1 RING#/PWRFAIL#/LPCRST#/GPB7 PWUREQ#/GPC7 CLKRUN#/GPH0/ID0/SHBM CRX1/GPH1/ID1/BADDR0 CTX1/GPH2/ID2/BADDR1 GPH3/ID3 GPH4/ID4 GPH6/ID6 GPH5/ID5 TACH1/GPD7 TACH0/GPD6 GINT/GPD5 GPG1/ID7 L80HLAT/GPE0 GPG2 GPG6 GPIO SMCLK2/GPF6 SMDAT2/GPF7 DAC2/GPJ2 DAC3/GPJ3 DAC4/GPJ4 DAC5/GPJ5 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 125 R544 1K R0402 PWRSW1# 35 17 20 WL-SW 83 R546 0 R0402 at88sc0104 82 84 18 21 1 1 2 DUAL rails can be configured to be on at all times DUAL rails can also be configured to conserve power during S5 when operating from battery RSMRST# AMP_SHDW AMP_SHDW 27 KBC 3 42 In this case DUAL rails can be configured to turn on only in response to a power button press the keyboard controller typically will control this funciton significantly reducing hardware 2 2 1 R1748 NC_0_0402_5% Updata on rev:1.2 ACIN 7 2 @ R1843 1 PCIE_WAKE_UP# 47,48 PCIE_WAKE#_EC 1 0_0402_5% 2 T199 SMBALERT# 16 R1919 NC_0_0402_5% ThermINT 32,36 1 2 SLP_S5# 9,11,27,46 R1918 1K_0402_5% C2172 BATT_OVP C2156 112 16 1 107 19 R776 BKOFF# R8220 PARK_SCL PARK_DATA R8221 78 79 80 81 ACIN 100P_0402_50V8J 1 100P_0402_50V8J 1 2 2 BAT_LED 51 NB_VOL_DET 10 NC_0R 100 104 117 118 EC_PROCHOT# 16 BKOFF# 43 MEM_VTT_EN 9 0R 0R NUMBER LOCK_LED# CAPS LOCK_LED# PARKXT_CLK 36 PARKXT_DAT 36 CHGVADJ SET_I 30 31 32 Updata on rev:1.1 7 POWER SWITCH CONN 7 CHARGER_LED 51 BTL_LED# 51 AC_LED# 51 0R 2 3 4 5 6 NUMBER LOCK_LED# CAPS LOCK_LED# SMDFIX1 +5V FPC CONN_6P update rev:1.1 2 1 TESD33 EGA10603V05A1-B ESDPAD_R0603 ns 2 1 2 3 4 5 6 S_CN3 B SMDFIX1 SMDFIX2 TESD35 TESD34 FPC CONN_6P NC_EGA10603V05A1-B NC_EGA10603V05A1-B ESDPAD_R0603 ESDPAD_R0603 ns ns aces_88511 SMDFIX2 8 2 LID_SW# 1 R1897 NC_0_0402_5% L85 120ohm@100MHz,500mA_0603 CAPS LED/NUMBER LED aces_88511 2 1 R1885 10K_0402_5% @ TESD31 TESD32 NC_EGA10603V05A1-B NC_EGA10603V05A1-B ESDPAD_R0603 ESDPAD_R0603 S_CN2 ns ns 1 EC_V3.3AL 1 LQFPS128_0D4_1D6 7 AVSS VCORE C3018 100nF 2 DUAL RAILS ENABLE circuit +3.3V PWRSW2# PWRSW1# 1 5 6 VDDIO_SUS_EN_EC 9 VDDC_EN_EC 40 2N7002 Q3205 0R SYSTEM_DUAL_PG 0.1U_0402_16V4Z 1 2 3 4 TESD37 EGA10603V05A1-B ESDPAD_R0603 ns AC (Performance mode) = 3.3 V Battery saving mode = 0.0 V PS2CLK0/GPF0 PS2DAT0/GPF1 PS2CLK1/GPF2 PS2DAT1/GPF3 PS2CLK2/GPF4 PS2DAT2/GPF5 C2159 2 DBCON2 NC_ACIN 4Pin CNS4_R CIR 2 0R CK32K CK32KE C0402 NC_0.1UF/25V,Y5V R1899 NC_10K_0402_5% 76 77 75 DNI R3071 7,9,11,27,40,51 R1889 10K_0402_5% GPB0 GPB1 C517 1 R394 NC_10K R0402 C GPG0 FAN VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 R3073 DAC0/GPJ0 DAC1/GPJ1 1 27 49 91 113 122 11,13 V3V5DUAL_PWRGD SLP_S3# 2 10,51 1V1DUAL_PWRGD A/D D/A KBMX 1 WXMIT_OFF# +3.3VDUAL B 2 99 98 48 47 33 1 66 BAT_INT# 7 67 PM_SLP_S3# 68 PARK-XT_PGOOD 40 69 ADAPT_OUVP 7 70 T192 ADC1 7 71 BATT_OVP BATT_OVP 7 1 2 1 72 R1900 100K_0402_5% board ID 73 2 C2112 10P_0402_50V8J Del KSO16/GPC3 KSO17/GPC5 110 R3232 KBC 0R EC_SMB_CK0 111 SMCLK0/GPB3 R3221 KBC 0R EC_SMB_DA0 R3239 KBC 0R EC_SMB_CK1115 SMDAT0/GPB4 R3238 KBC 0R 116 SMCLK1/GPC1 EC_SMB_DA1 SMDAT1/GPC2 26 PCI_CLKRUN# 8 VRM_RUN_EC 7 SHDN 13 VDD_DUAL_EN 7 ACOFF# 27 PWR_BTN#_EC 51 SB800_FANTACH0 47 WU_DISABLE# 85 86 87 88 89 90 KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/GPI5 ADC6/GPI6 ADC7/GPI7 LID_SW# 1 3 GND 2 1 R1892 1 R1881 2 Output +3.3V T191 KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 1 R395 NC_10K R0402 7 58 59 60 61 62 63 64 65 R1888 100K_0402_5% 2 SCANIN0 SCANIN1 SCANIN2 SCANIN3 SCANIN4 SCANIN5 SCANIN6 SCANIN7 XOUT-EC XIN-EC EC_V3.3AL Update on rev:1.1 PWRSW2# VU1 A180 SOT23 1 VS+ C2104 0.1U_0402_16V4Z 8 XIN-EC . 7 R0402 120 R548 1K 2 124 1 LID_SW# R1893 1k_0402_5% 2 1 R0402 1 R1890 1 R1878 TMR0/WUI2/GPC4 TMR1/WUI3/GPC6 10 7 1 2 3 NC_32.7680KHZ XS4_8038 7 TIMER INT 1V1_EN_EC CHG_ON 2 Y8 15PFF/50V,NPO C515 C0402 SPI FLASH EC_V3.3AL GPB0 GPB1 1 XOUT-EC R227 1 NC_10M4 BM05_CLK_32_768M 7 108 109 123 119 1 1 EC_A20M#_EC 0_0402_5% Y5 32.7680KHZ 2 1 3 4 +3.3VDUAL RXD/GPB0 TXD/GPB1 GPB2/CTX0 GPC0/CRX0 2 2 R1745 FSCK FMISO FMOSI FSCE# Lid Switch 1 1 2 S 105 103 102 101 EC_SPICLK EC_SI_SPI_SO C2060 EC_SO_SPI_SI EC_SPICS#/FSEL# 1U_0402_16V4Z KBC 3 15PFF/50V,NPO C516 C0402 C G Q3202 NC_2N7002 2 EC_A20M# 1 CTF 1 Q34 NC_2N7002-7-F R3251 47K 2 32 +3.3V 27 D 1 KBRST NC_0_0402_5% EC_LCD_BKL_PWM 1 2 R1744 EC_KB_RST# BEEP# 42 EC_LCD_BKL_PWM 43 CONTROL_FANOUT0 51 KBC_LOW_BAT# 27 R0402 R3262 2 27 BEEP# R549 0 0R 2 3 R569 1 NC_0_J 2 24 25 28 29 (Hall Effect Switch) UART EC Output Signal! KBC 3 2 1add r1743 100K_0402_5% PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 2 3300pF/50V,X7R C0402 1 2 R1741 Q3201 2N7002 1 Updata on rev:1.1 PWM D C569 1 ADC1 2 +3.3V EC_SMI#_EC EC_SCI#_EC EC_A20M#_EC KBRST EC_RST# LAD0 LAD1 LAD2 LPC LAD3 LPCCLK LFRAME# LPCRST#/WUI4/GPD2 SERIRQ ECSMI#/GPD4 ECSCI#/GPD3 GA20/GPB5 KBRST#/GPB6 WRST# C2175 2 EC_V3.3AL 1 2 0.1U_0402_16V4Z 1 1 EC_SMI#_EC 0_0402_5% 10 9 8 7 13 6 22 5 15 23 126 4 14 IT8512JX 2 R1746 EC_SMI# 26,47 LFRAME# 23,24,26,31 A_RST# 26 SERIRQ +3.3V 2 C2173 7 26,30 LPC_CLK0 12 1 KBC 3 1 1 C2151 @ NC_22P_0402_50V8J 26,47 LAD0 2R1842 12 1 NC_33_0402_5% @ 26,47 LAD1 26,47 LAD2 26,47 LAD3 Q3203 NC_2N7002 2 C2166 VSTBY6 1 EC_SCI#_EC 0_0402_5% VSTBY1 VSTBY2 VSTBY3 VSTBY4 VSTBY5 2 R1747 U511 IT8502E +3.3V 27 R570 1 0_J 1 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 26 50 92 114 121 1 2 1 1 C2170 1000P_0402_50V7K 1 1 KBC 3 D EC_SCI# C2168 2 2 0.1U_0402_16V4Z Q3204 NC_2N7002 AVCC C2052 2 2 0.1U_0402_16V4Z EC_V3.3AL 0.1U_0402_16V4Z 1 2 2 1 0.1U_0402_16V4Z 1 1 C2157 1 C2161 2 2 NC_0 2 R0805 +3.3V 27 +RTCVCC_EC Updata on rev:1.1 L86 Resered for EC 120ohm@100MHz,500mA_0603 L83 120ohm@100MHz,500mA_0603R571 2 C2058 1000P_0402_50V7K NC_0_J 7 R431 0R R0805 R432 1 3 RIGHT_BTN# 2 4 1 SW5 STS_043_A 1 3 2 4 LEFT_BTN# TESD30 EGA10603V05A1-B ESDPAD_R0603 ns FOXCONN_1BT002_0120L 0.1U_0402_16V4Z 2 2 5 1 2 TP_DATA 4.7K_0402_5% SW4 STS_043_A 1 6 2 TP_CLK 4.7K_0402_5% 6 1 R1883 1 R1880 C2070 5 1 +5V 2 A TESD28 EGA10603V05A1-B ESDPAD_R0603 ns WL SWITCH +3.3VDUAL WL_SW1 sst-1221 sw_sst-1221 1 EC_V3.3AL EC_V3.3AL 1 R1891 smdfix2 smdfix3 1 smdfix1 2 R545 10K R0402 WL-SW 2 0_0603_5% C2169 1 2 0.1U_0402_16V4Z +SPI_VCC EC_V3.3AL R1894 1 R1896 1 2 NC_10k_0402_5% @ 2 NC_10k_0402_5% @ 2 NC_10k_0402_5% @ 2 NC_10k_0402_5% @ 3 EC_SPICS#/FSEL#R1877 1 EC_SPICLK R1876 1 EC_SO_SPI_SI R1895 1 EC_SI_SPI_SO R1870 1 EC_SPICS#/FSEL# 2 4.7K_0402_5% SPI_WP# 2 4.7K_0402_5% SPI_HOLD# 1 3 7 4 C3080 TESD2 330PF/50V,X7R C0402 NC_EGA1-0603-V05 A ESDPAD_R0603 U66 CE# WP# HOLD# VSS 1 FPC CONN_6P Foxconn_hs6206e FLASH MEMORY 8M-bit 2 C2073 100P_0402_50V8J 2 SMDFIX2 T149 T155 T122 T124 T126 T151 T156 T123 T125 T143 T152 T139 T141 T142 T150 T157 T130 T154 T140 T147 T148 T131 T144 T153 T145 T158 PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D 2 2 2 TESD25 TESD26 C2072 1 1 C2068 EGA10603V05A1-B EGA10603V05A1-B ESDPAD_R0603 C2069 ESDPAD_R0603100P_0402_50V8J 2 100P_0402_50V8J 100P_0402_50V8J ns 2 2ns 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 2822 2723 24 25 26 S_CN1 SMDFIX1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 TP_CLK 2 TP_DATA 3 2 10_0402_5% 4 2 10_0402_5% 5 6 8 2 1 1 R1772 1 R1773 1 LEFT_BTN# RIGHT_BTN# SCANOUT0 SCANOUT1 SCANOUT2 SCANOUT3 SCANOUT4 SCANOUT5 SCANOUT6 SCANOUT7 SCANOUT8 SCANOUT9 SCANOUT10 SCANOUT11 SCANOUT12 SCANOUT13 SCANOUT14 SCANOUT15 SCANOUT16 SCANOUT17 SCANIN0 SCANIN1 SCANIN2 SCANIN3 SCANIN4 SCANIN5 SCANIN6 SCANIN7 VDD SCK SI SO 8 6 5 2 2 C2071 0.1U_0402_16V4Z +VTP5S 7 0_0603_5% R1645 1 2 1 TP_CLK TP_DATA KEY BOARD To TP/B Conn. +5V R1879 1 EC_SPICLK_R R1871 1 R1873 1 2 0_0402_5% EC_SPICLK 2 0_0402_5% EC_SO_SPI_SI 2 0_0402_5% EC_SI_SPI_SO W25X80A CNS26_1_R_UP ACES 88513 KBCON1 FOXCONN_1BT002_0120L Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title EC(IT8502) Size D Document Number 4 3 2 http://pc-120.taobao.com/ Rev 1.0 BM5016 Date: 5 1 Thursday, August 05, 2010 Sheet 49 of 54 5 4 3 2 1 D D C C B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 // Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 50 of 54 5 4 3 2 1 +3.3V R3141 10K NC_RB751V-40 1 D3146 DNI RB751V-40 1 D3141 10 +1.2V_PWRGD +3.3V U515 NC_SN74AHC1G08DBV 1 VCC 2 2 49 SLP_S3# KBC_GPIO77 NC_RB751V-40 1 D3140 2 RB751V-40 1 D3150 2 NC_RB751V-40 1 D3147 2 RB751V-40 1 D3148 2 NC_RB751V-40 1 D3149 2 100nF SB/NB POWER GOOD CIRCUIT 4 R3138 GND C3125 2.2uF_6.3V DNI 0R R3137 11 1V8_PWRGD Updata on rev:1.2 8,10 VRM_PWRGD 27,49 D 0R +1.8V R3149 0R DNI C3117 100nF 5 10,49 1V1DUAL_PWRGD SB_PWRGD DNI R3947 NC_100K,5% R0402 3 7,9,11,27,40,49 D C3121 5 11 1V5_PWRGD 2 1 R3151 0R DNI 4 R3147 DNI 2 33R NB_PWRGD_IN 23 U3102 NC7SZ08M5 DNI 3 +1.8V R3152 300R R3150 27 NB_PWRGD R3153 0R +3.3VDUAL +5V 1 R1791 2 500_0402_5% 1 2 SATA_LED CHARGER_LED# +5V HSMG-C-170/G SM_T_LED0603 +5VDUAL C 2 LED8 (white) R1851 2 R1836 NC_10K_0402_5% LED2 1 1 2 SATA_LED# 1 Updata on rev:1.2 0R SATA_ACT# C 28 LED7 1 R1790 2 1 500_0402_5% 2 500_0402_5% BATT_AMB_LED# HSMG-C-170/G SM_T_LED0603 +5VDUAL 2 HSMG-C-170/G SM_T_LED0603 R1826 1 BAT_LED 2 LED6 1 1 500_0402_5% R1835 10K_0402_5% KAL90@ AC_LED# 49 1 R484 100k R0402 2POWER_LED# HSMG-C-170/G SM_T_LED0603 2 2 49 (white) POWER_ON +5VDUAL Q29 2N7002 SOT23 . 1 NC_0 2 R0402 BATT_AMB_LED# 3 R485 1 +5V R498 1 3 1 1 B 1 FOXCONN_HS8104E R390 2.2K R0402 WIFI/3G_LED 2 SB800_FANTACH0_1 1 PWM FAN Conn C486 1000PF/50V,NPO C0402 2 49 SB800_FANTACH0 2 2 2 5 R497 NC_100k R0402 +3.3V R3124 Q33 NC_2N7002 SOT23 . 1 B 51R 2 R0402 CHARGER_LED# 0 49 CHARGER_LED HEADER_4P 6 SB800_FANTACH0_1 2 1k R406 1 R0402 D2 1N4148WS 49 CONTROL_FANOUT0 CN6 1 2 3 4 (white) +5V R1848 2 D50 1 2 LRB751V SOD323 D53 1 2 NC_LRB751V SOD323 LED5 1 1 500_0402_5% 2 WIFI_LED# HSMG-C-170/G SM_T_LED0603 1 D54 LRB751V LED_WIRELESS# BTL_LED# +5V 1 R1858 2 NC_10K_0402_5% KAL90@ 1R1860 2 2 10K_0402_5% KAL90@ 47 49 FOR EMI BT_LED 45,47 POWER_LED# C2164 1 @ 2 100P_0402_50V8J SATA_LED# C2165 1 @ 2 100P_0402_50V8J WIFI_LED# C2163 1 @ 2 100P_0402_50V8J BATT_AMB_LED# C2167 1 @ 2 100P_0402_50V8J C2171 1 @ 2 100P_0402_50V8J SOD323 update on rev:1.1 SATA_LED# H57 GND GND 2 TESD29 EGA10603V05A1-B ESDPAD_R0603 ns 2 TESD23 EGA10603V05A1-B ESDPAD_R0603 ns 1 1 1 TESD21 EGA10603V05A1-B ESDPAD_R0603 ns BTL_LED# HOLE_160X88 ns A GND GND CHARGER_LED# C2178 1 @ 2 H17 H49 H50 H51 H24 H15 H44 H41 H52 H43 ns HOLE3MM_8MM ns GND shape_hole8_3 ns HOLE3MM_8MM ns GND GND 5 HOLE3MM_8MM ns GND shape_hole8_3 ns GND ns GND 4 shape_hole8_3 1 HOLE 1 HOLE 1 1 HOLE shape_hole8_3 ns GND shape_hole8_3 ns GND shape_hole8_3_2 ns HOLE HOLE_160X88 ns GND GND 3 100P_0402_50V8J H45 HOLE HOLE_NP_4MM HOLE HOLE_NP_4MM HOLE HOLE_NP_4MM GND ns ns GND ns GND ns GND GND 2 Bitland Information Techonogy Co.,Ltd. Notebook R&D Division HOLE HOLE_NP_4MM http://pc-120.taobao.com/ HOLE6MM_8MM ns GND HOLE 1 HOLE 1 HOLE 1 HOLE 1 HOLE 1 HOLE 1 HOLE 1 HOLE HOLE3MM_8MM H42 H47 1 H48 1 H2 H46 1 ns GND CHARGER_LED# 1 HOLE_160X88 ns TESD24 EGA10603V05A1-B ESDPAD_R0603 ns 2 1 HOLE_160X88 ns 2 TESD18 EGA10603V05A1-B ESDPAD_R0603 ns HOLE_160X88 HOLE HOLE 1 1 HOLE HOLE_160X88 ns 1 A HOLE 1 1 HOLE BATT_AMB_LED# H56 2 H55 WIFI_LED# 1 H54 1 H53 POWER_LED# Title RESET/FAN/LED/POWERGOOD Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 51 of 54 5 4 3 2 1 D D C C B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 pull up resistor Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 Sheet 1 52 of 54 5 4 3 2 1 D D C C B B A A Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 4 change history Size Custom Document Number Date: Thursday, August 05, 2010 Rev 1.0 http://pc-120.taobao.com/ 3 2 BM5016 Sheet 53 1 of 54 5 4 3 2 1 +1.2V_PWRGD +3.3VALW +3.3VDUAL V3V5_DUAL_PWRGD EC IT8502 VDD_DUAL_EN 3 VCC_NB PWRGD PWRGD TPS51125 1 +5VDUAL 2 LDO ISL6228 +1.1VDUAL +1.1VDUALEN 1.1V +1.1V SWITCH 2.5A 1.1V VCC_NB_EN D PWR_BTN#_EC 4 D 5 SLP_S5# SB820 CPU_VDDIO_SUS TPS51218 LDO APL5912 SLP_S3# +1.8VEN +5VDUAL 10 10 VRM_PWRGD +1.8V LDO RT9199GP 5 VRM_PWRGD +3.3VDUAL VTT 5 SLP_S3# +3.3VDUAL VLDT 2A 2.5A CPU_VDDIO_SUS +1.5V PWRGD VDDC SWITCH 1V8_PWRGD TPS51218 PWRGD VLDTEN +5V SLP_S3# SWITCH 6 +3.3V 12.9A LDO UP7707K3A25_SOT89-3 7 CPU_VDDA_RUN CPU_VDDIO_SUS VDDA_PWRGD EN 8 PWRGD VDDA_PWRGD 9 CPU_VDD_RUN 1.1V_1.0V_PWR LDO PWRGD 2.6A UP7717ASU8 ISL6265 CPU_VDDNB_RUN CPU_VDDIO_SUS MVDDQ CPU_VDDIO_SUS LDO VDDA_PWRGD 9 UP7717ASU8VDDR =1.05V C 3.7A CPU_VDDR VDDR = 0.9V For Park-XT-S3 SWITCH 1.75A 1.25 A (Default) C +3.3VDUAL +3VRUN 0.3A SWITCH +1.8V 1.8V_REG 1.5A SLP_S3# SB 820M PE_GPIO1 APL5912 各电源PWM/L/MOS选型 Power on Sequence required: POWER L PWM H_GATE L_GATE HB90479MA0LFE B +3.3VDUAL (+3.3V 8A) SB800: 1, +3.3VDUAL ramp before +1.1VDUAL 2, +3.3V ramp before +1.8v 3, +1.8V ramp before +1.1v 4, +3.3v ramp before +1.1v 5, +3.3VALW_R ramping down time > 300us 6, 50uS <= All power rails except +3.3VALW_R <= 40mS 7, 100uS <= +3.3VALW_R <= 40mS AO4468 B AO4468 30V 11.6A RDS(ON)<22mΩ(VGS=4.5V) 30V 11.6A RDS(ON)<22mΩ(VGS=4.5V) HB90479MA0LFE VQFN24 +5VDUAL 4.7uH±20% 5.5A 40mΩ SMD-6.86x6.47x3.0mm (+5V 8A) VCC_NB AO4468 AO4468 30V 11.6A RDS(ON)<22mΩ(VGS=4.5V) 30V 11.6A RDS(ON)<22mΩ(VGS=4.5V) HB90109M00LFE (+1.1V 12A) 1.0H ±20% 12A 10mΩ SMD-6.6×7.3×3.0mm ISL6228HRTZ-T 15A +/-20V 15mΩ@4.5V SO-8pin 4.7uH±20% 5.5A 40mΩ SMD-6.86x6.47x3.0mm (+1.2V 4A) VISHAY/SI4168DY-T1-GE3 VISHAY/SI4172DY-T1-GE3 HB90479MA0LFE TQFN-28 VLDT 24A +/-20V 7.6mΩ@4.5V SO-8pin L/H intergrated (待定） HB90109M00LFE VDDIO_SUS 1.0H ±20% 12A 10mΩ SMD-6.6×7.3×3.0mm TPS51218 (+1.5V 11A) DSC HB90479MA0LFE 4.7uH±20% 5.5A 40mΩ SMD-6.86x6.47x3.0mm CPU_VDD_RUN (+1.375--1.5V 36A) ISL6265 VISHAY/SI4172DY-T1-GE3 VISHAY/SI4168DY-T1-GE3 15A +/-20V 15mΩ@4.5V SO-8pin 24A +/-20V 7.6mΩ@4.5V SO-8pin PHASE1 VISHAY/SiR462DP-T1-GE3 VISHAY/SiR466DY-T1-E3/GE3(two) PHASE2 VISHAY/SiR462DP-T1-GE3 VISHAY/Si466DY-T1-E3/GE3(two) 30A +/-20V 0.01Ω@4.5V PowerPAK SO-8pin 24.5A +/-20V 6.7mΩ@4.5V SO-8pin 30A +/-20V 0.01Ω@4.5V PowerPAK SO-8pin 24.5A +/-20V 6.7mΩ@4.5V SO-8pin QFN-48 HB90479MA0LFE 4.7uH±20% 5.5A 40mΩ SMD-6.86x6.47x3.0mm CPU_VDDNB_RUN (0.9V 4A) ISL6251HAZ charger RS880: 1, 0 <(+3.3V) - (+1.8v) < 2.1 2, +1.8V ramp before +1.1v 3. +1.1V ramp before VCC_NB A TI/TPS51125RGER 4.7uH±20% 5.5A 40mΩ SMD-6.86x6.47x3.0mm L/H intergrated (待定） HB90100MA0LFE SSOP24_25_150 10uH±20% IDC=4A DCR-Max= AOS/AON7408 71.2mΩ SMD 6.86x6.47x3.0mm 9.6A RDS(ON)<34mΩ(VGS=4.5V DFN-8) LDO AOS/AON7702 20A RDS(ON)<14mΩ(VGS=4.5V) DFN-8 SWITCH INPUT(V) OUTPUT(V) VTT CPU_VDDA_RUN +1.8V CPU_VDDR +1.1VDUAL RT9199GP APL5508_25DC_TRL SO789_3 APL5930 APL5912 APL5930 MOS (+1.5V---0.75 1.5A) +5VDUAL +5V +3.3VDUAL VLDT AO4468 (8A) +3.3V AO4468 (8A) +1.1V JUMPER (4A) CPU_VDDIO +1.5V _SUS AO4468 (5A) (+3.3V---2.5V 500MA) A (+3.3V---1.8 1.5A) (+1.5V---1.05V 4A) (+3.3V---1.1V 500MA) Bitland Information Techonogy Co.,Ltd. Notebook R&D Division Title 5 http://pc-120.taobao.com/ 4 3 2 Power sequence Size C Document Number Date: Thursday, August 05, 2010 Rev 1.0 BM5016 1 Sheet 54 of 54