Transcript
1 GHz QUADRATURE MODULATOR
UPC8110GR
FUNCTIONAL BLOCK DIAGRAM
FEATURES • DIRECT MODULATION RANGE: 800 MHz TO 1 GHz • SUPPLY VOLTAGE RANGE: VCC = 2.7 V to 3.6 V
LO
• LOW OPERATION CURRENT: 24 mA TYP • LOW CURRENT SLEEP MODE
I I
0˚ φ
RF OUT
90˚
Q Q
DESCRIPTION The UPC8110GR is a silicon monolithic integrated circuit designed as a 1 GHz direct quadrature modulator for digital mobile communication systems. The device is manufactured using the NESAT III MMIC process and is housed in a 20 pin plastic SSOP package that contributes to miniaturizing the system. The device has power save function and operates on a 3 V supply voltage for low power consumption. NEC's stringent quality assurance and test procedures ensure the highest reliability and performance.
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 3 V, VPS ≥ 2.2 V
unless otherwise specified)
PART NUMBER PACKAGE OUTLINE SYMBOLS ICC Po(SAT) LOL IMR
PARAMETERS AND CONDITIONS
UPC8110GR S20 UNITS
MIN
TYP
MAX
Circuit Current (no signal) VPS ≥ 2.2 V Circuit Current (power save) VPS ≤ 0.5 V
mA µA
20
24
33 10
Maximum Output Power1
dBm
-13
-10
LO Carrier Image
Leak1
Rejection1 Distortion1
dBc
-35
-30
dBc
-40
-30 -30
IM3 I/Q
I/Q 3rd Order Intermodulation
dBc
-45
ZI/QIN
I/Q Input Impedance, single-ended
kΩ
150
TPS (RISE)
Power Save Rise Time, VPS ≤ 0.5 V to VPS ≥ 2.2 V
µs
3
5
TPS (FALL)
Power Save Fall Time, VPS ≥ 2.2 V to VPS ≤ 0.5 V
µs
2
5
Note: 1. fLOIN = 948 MHz, PLOIN = -10 dBm, f I/Q = 2.625 kHz, V I/Q = VCC/2 (DC)+ 0.5 V p-p (AC).
California Eastern Laboratories
UPC8110GR ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C) SYMBOLS VCC VPS
PARAMETERS Supply Voltage Power Save Voltage
RECOMMENDED OPERATING CONDITIONS
UNITS
RATINGS
V
4.0
SYMBOLS
4.0
VCC
Supply Voltage
V
2.7
VPS
Power Save Voltage
V
0
TOP
Operating Temperature
°C
-40
+25
PLO
LO Input Power Level
dBm
-15
-10
-7
fLOIN
LO Input Frequency
MHz
800
900
1000
fI/QIN
I/Q Input Frequency
MHz
DC
V
PD
Power Dissipation2
mW
430
TOP
Operating Temperature
°C
-40 to +85
TSTG
Storage Temperature
°C
-55 to +150
Notes: 1. Operation in excess of any one of these parameters may result in permanent damage. 2. Mounted on a 50 x 50 x 1.6 mm double copper clad epoxy glass PWB (TA = +85°C).
PIN FUNCTIONS
VI/QIN
PARAMETERS
I/Q Input Voltage
UNITS MIN
Symbol
Supply Voltage (V)
Pin Voltage (V)
Description
1
LOIN
—
2.6
LO input for the phase shifter.
0
—
3
LOIN
—
2.6
—
5
Q
VCC/2*1
—
Input for Q signal. If the I/Q input signals are single-ended, the maximum amplitude of the signal is 500 mVp-p.
—
Input for Q signal. If the I/Q input signals are single-ended, Q should be DC biased at VCC/2. If the I/Q input signals are differential, the maximum amplitude of the signal is 250 mVp-p.
—
Input for I signal. If the I/Q input signals are single-ended, I should be DC biased at VCC/2. If the I/Q input signals are differential, the maximum amplitude of the signal is 250 mVp-p.
—
Input for I signal. If the I/Q input signals are single-ended, the maximum amplitude of the signal is 500 mVp-p.
7
8
I
I
VCC/2*1
VCC/2*1
9 GND
0
—
mVp-p
2502
Equivalent Circuit
RFOUT
—
1.6
3
5
6
7
8
Connect to ground with minimum inductance. Track length should be kept as short as possible.
10
11
10 5001
Connect to ground with minimum inductance. Track length should be kept as short as possible.
0
VCC/2*1
+85
Bypass of the LO input. This pin is grounded through a capacitor of approx. 30 pF.
GND
Q
3.6 VCC
Connect to ground with minimum inductance. Track length should be kept as short as possible.
4
6
MAX
mVp-p
1
GND
3.0
Notes: 1. Single-ended Input. 2. Differential Input.
Pin No.
2
TYP
Output from the modulator. This is an emitter follower output. Connect approx. 15Ω in series to match to 50Ω.
11
UPC8110GR PIN FUNCTIONS Pin No.
Symbol
Supply Voltage
Pin Voltage
GND
0
—
Connect to ground with minimum inductance. Track length should be kept as short as possible.
VCC
2.7~
—
Supply voltage pin for the modulator. An internal regulator helps keep the device stable against temperature or VCC variations. Connect to ground with minimum inductance. Track length should be kept as short as possible.
12
13
14
3.6 15 GND
0
—
Power Save
VPS
—
16
17
Description
Power save control pin can control the ON/SLEEP state with a bias as follows: VPS (V)
18
GND
0
—
19
VCC
2.7 ~ 3.6
—
20
GND
0
—
Equivalent Circuit
17
STATE
2.0 ~ 3.6
ON
0 ~ 0.8
SLEEP
Connect to ground with minimum inductance. Track length should be kept as short as possible. Supply voltage pin for the modulator. An internal regulator helps keep the device stable against temperature or VCC variations. Connect to ground with minimum inductance. Track length should be kept as short as possible.
*1: VCC/2 DC bias must be supplied to I, I, Q, Q.
TYPICAL PERFORMANCE CURVES Unless Otherwise Specified, (TA = +25°C, VCC = VPS = 3 V, I/Q DC offset = 1.5 V, I/Q Input Signal = 500 mVp-p (Single ended), fI/Q = 2.625 kHz, fLOIN = 948 MHz, PLOIN = -10 dBm,
Transmission Speed: 42 kbps, RNYQ: a = 0.5.)
CURRENT vs. POWER SAVE VOLTAGE
CURRENT vs. VOLTAGE TA = +25°C TA = -40°C TA = +85°C VCC = VPS I/Q (DC) = VCC/2 RF None
20
25
Cuurent, ICC (mA)
25
Cuurent, ICC (mA)
TA = +25°C TA = -40°C TA = +85°C VCC = 3 V I/Q (DC) = 1.5 V RF None
30
30
15
10
20
15
10
5
5
0
0 0
0.5
1.0
1.5
2.0
2.5
Voltage, VCC (V)
3.0
3.5
4.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Power Save Voltage, VPS (V)
4.0
UPC8110GR TYPICAL PERFORMANCE CURVES Unless Otherwise Specified, (TA = +25°C, VCC = VPS = 3 V, I/Q DC offset = 1.5 V, I/Q Input Signal = 500 mVp-p (Single ended), fI/Q = 2.625 kHz, fLOIN = 948 MHz, PLOIN = -10 dBm, Transmission Speed: 42 kbps, RNYQ: a = 0.5.) RF OUTPUT POWER vs. I/Q INPUT SIGNAL
LOCAL INPUT FREQUENCY vs. PRFOUT, LOL, IMR, IM3I/Q
-5
-10
-15
-20
-25 200
300
400
PRFOUT -35
-10 LOL
-40
-15 IM3I/Q
-45
-20
-50
-25
ImR
-55
500
700
-10 LOL -15
-40 ImR
-20
-45
-25
IM3I/Q
-55
-30
Local Leak, LOL - ImageRejection, IMR - IM3I/Q (dBc)
PRFOUT -35
RF Output Power, PRFOUT (dBm)
Local Leak, LOL - ImageRejection, IMR - IM3I/Q (dBc)
-5
-30
-10
900
1000
1100
I/Q BIAS VOLTAGE vs. PRFOUT, LOL, IMR, IM3I/Q
LOCAL INPUT POWER vs. PRFOUT, LOL, IMR, IM3I/Q
-15
800
Local Input Frequency, fLO (MHz)
I/Q Input Signal, PI/QIN (mVP-P)
-50
-30
-5
-30 PRFOUT
-10
-35
-40
-15
LOL ImR
-20
-45
IM3I/Q
-50
-25
-30
-55
-5
-15
-10
-5
Local Input Power, LO (dBm)
I/Q Supply Voltage,I/Q (DC) (V)
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
TYPICAL π/4DQPSK MODULATION OUTPUT SPECTRUM
42 kbps, RNYQ α = 0.5, MOD PATTERN [0000]
42 kbps, RNYQ α = 0.5, MOD PATTERN [0000]
REF 0.0 dBm
ATT 1OdB A_write B_blank
ATT 1OdB A_write B_blank
∗
POUT ∆MARKER -10.50 kHz
∆MARKER -10.50 kHz -47.36 dB
RF Output Power, PRFOUT (dBm)
100
-5
-30
RF Output Power, PRFOUT (dBm)
VCC = 3.0 V Single ended
Local Leak, LOL - ImageRejection, IMR - IM3I/Q (dBc)
RF Output Power, PRFOUT (dBm)
0
REF Level 0 dBm 10 dB/
LOL 1 IM3I/Q ImR 3 2
2 ADJ BS 21 kHz
RBW 300Hz VBW 300 Hz SWP 1.2 s
3 1
RBW 3 kHz VBW 3 kHz SWP 5 s
CENTER 948.00000 MHz
SPAN 50.0 kHz
CENTER 948.00000 MHz
Padj (dB) Marker
No. 1: 947.90 MHz No. 2: 947.95 MHz No. 1: 948.05 MHz No. 2: 948.10 MHz
4
SPAN 50.0 kHz
-78.0 dB -67.0 dB -70.3 dB -77.8 dB
∆f = -100 kHz ∆f = -50 kHz ∆f = +50 kHz ∆f = +100 kHz
UPC8110GR TYPICAL PERFORMANCE CURVES Unless Otherwise Specified, (TA = +25°C, VCC = VPS = 3 V, I/Q DC offset = 1.5 V, I/Q Input Signal = 500 mVp-p (Single ended), fI/Q = 2.625 kHz, fLOIN = 948 MHz, PLOIN = -10 dBm, Transmission Speed: 42 kbps, RNYQ: a = 0.5.)
POWER SAVE RESPONSE (at VCC = VPS = 3.0 V)
POWER SAVE RESPONSE (at VCC = VPS = 2.7 V) ATT 1OdB A_view B_blank
REF 0.0 dBm 10 dB/
∆ MARKER 2.714 µs 44.41 dB
∆MARKER 2.714 µs
RBW 3 MHz VBW 3 MHz SWP 50 µs
ATT 1OdB A_view B_blank
REF 0.0 dBm 10 dB/
∆ MARKER 2.714 µs 48.97 dB
∆MARKER 2.714 µs
RBW 3 MHz VBW 3 MHz SWP 50 µs
CENTER 948.002642 MHz
SPAN 0 Hz
CENTER 948.002642 MHz
SPAN 0 Hz
POWER SAVE RESPONSE (at VCC = VPS = 3.6 V) ATT 1OdB A_view B_blank
REF 0.0 dBm 10 dB/
∆ MARKER 2.714 µs 45.97 dB
∆MARKER 2.714 µs
RBW 3 MHz VBW 3 MHz SWP 50 µs CENTER 948.002642 MHz
SPAN 0 Hz
SCATTERING PARAMETERS (TA = +25°C) LO INPUT IMPEDANCE (LOIN) (at VCC = VPS = 3.0 V)
RF OUTPUT IMPEDANCE (RFOUT) (at VCC = VPS = 3.0 V) 1: 45.005 Ω -2.6352 Ω 1.872 nH 948.000 000 MHz
1: 30.191 Ω 7.1309 Ω 1.872 nH 948.000 000 MHz MARKER 1 948 MHz
MARKER 1 948 MHz
1 1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
START 700.000 000 MHz
STOP 1 100.000 000 MHz
UPC8110GR EXPLANATION OF INTERNAL FUNCTIONS Block
Function/Operation
Block Diagram from LO1in
Input signal from the LO input is sent to a T-type flip-flop through a frequency doubler. The output signal from the T-type F/F is changed to the same frequency as the LO input with a quadrature phase shift of 0°, 90°, 180°, or 270°. These circuits provide self phase correction for proper quadrature signals.
90° PHASE SHIFTER
BUFFER AMPLIFIER
Buffer amplifiers for each phase signal are sent to each mixer.
MIXER
The signals from the buffer amps are quadrature modulated with two doublebalanced mixers. High accurate phase and amplitude inputs are realized to provide excellent image rejection.
x2
.. 2 F / F
I
I Q Q
Output signals from each mixer are added and sent through a final amplifier.
ADDER
To MODout
INTERNAL BLOCK DIAGRAM
OUTLINE DIMENSIONS (Units in mm) PACKAGE OUTLINE S20 (SSOP20) 20
TOP VIEW
11
LOIN
N
1
NEC C8110G XXXXX 7.00 MAX
XXX = Lot/Date Code
1 90˚ Phase Shifter
20
GND
19
VCC
18
GND
GND
2
LOIN
3
GND
4
17
VPS (POWER SAVE)
Q INPUT
5
16
GND
Q INPUT
6
15
GND
I INPUT
7
14
VCC
I INPUT
8
13
GND
GND
9
12
GND
GND
10
11
RF OUT
REG.
10 6.4±0.2 1.0±0.1 4.4±0.1
1.5 ±0.1 +0.10 0.15 -0.05
1.8 MAX +0.10 0.22 - 0.05
0.5±0.2 0.65
0.575 MAX
Note: All dimensions are typical unless otherwise specified.
ORDERING INFORMATION PART NUMBER
QTY
UPC8110GR-E1
2.5 K/Reel
EXCLUSIVE NORTH AMERICAN AGENT FOR
RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS
CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM DATA SUBJECT TO CHANGE WITHOUT NOTICE
09/14/2000
