Transcript
Common and Uncommon Errors in the Lab Implementation Symptom: Almost anything Cause: Practically all problems are from not following the instructions. Go back and check that you did exactly what was said. This is particularly true for things written in red in the instructions. One simple check is to Right click on xcr3064xl-6PC44 under the Sources Tab. Select Options. Compare that to what is specified in the project setup part of the instructions Symptom: Simulation waveforms show little action and many red lines. Possible Causes: 1. Check the file hierarchy in the Design Tab. You should have this hierarchy: xcr3064xl-6PC44 [+] addertest.tf [+] addertop.sch [+] fulladder.sch If addertest.tf does not appear, or is at the bottom, then you may have to remove it from the project and add it again. To remove a file, right click on it and select the “Remove” option. To add it again, right-click on another file, select “Add source” and select the appropriate file. Sometimes, you may need to create a new project. To do this, close the project and make a new one using the steps in the lab instructions. Then copy the schematic, .tf and .sym files from the old project (but none of the other files) and add them to the new project. This allows you to continue working from where you left off. 2. Look at the signal names in the box on the left of the waveforms in ModelSim. If they are labeled in the formaddertop/x0 ( For the T-Bird lab read tbirdtop/L) addertop/x1 etc. Instead ofaddertest/x0 addertest/x1 etc. Then you probably had addertop.sch highlighted when you brought up ModelSim. You must have addertest.tf highlighted. Symptom:
Simulation runs but stop part way through. Possible Cause: 1. Run was used instead of Run All when simulating. 2. The server may be slow under a heavy load. Give it enough time. 3. The test file did not get connected to the rest of the program. The simulation will stop at 1 ns or 1 us and probably show some outputs as unknown (red lines with a value StX). You will have to remove and reload the test fixture. To remove a file, right click on it and select the “Remove” option. To add it again, rightclick on another file, select “Add source” and select the appropriate file. Symptom: Simulation traces appear not to do anything. Possible Cause: 1. Check the time. For the TBird and Midi labs, you should see tens of seconds along the time scale. Did you simulate using Run All? 2. Try zooming out (F8) or zooming full. Symptom: License error when running the simulation. Cause: You may only have one ModelSim process running at a time. Close down the old one. Symptom: Simulation does not end after simulating Run All. Possible Cause: 1. You may have used Run All after doing a complete simulation. The simulator will continue going until it reaches a $Stop statement, which will no longer happen, so the simulator will continue forever. Abort the simulation using Simulate->Break 2. If you want to restart the simulation, you must restart it using Simulate->Run->Restart and hit OK. Symptom: Schematic has been changed, but the simulation doesn't know about it. Cause: 1. The circuit was compiled the first time ModelSim ran, and the old compiled file is still there. If the compiled file (example is addertop.vf) is deleted, the simulator will ask for a new compile. To delete them: • Click on the Project tab. • In the pull down menu select Cleanup Project Files • When asked, assure Xilinx you really want to do this. It will not delete your schematics.
2. You are not updating the correct file. Usually because you renamed files instead of saving the old ones in some far off directory. You will have to go into your project directory, remove the old files, and rename your present files to the original names. Symptom: Error message about an output being connected to an input. Cause: 1. If two wires have the same name, they are connected, even if there is no line on the drawing. Use Edit-> Find and type in the wire name. All the wires of that name will be highlighted. You may have to delete the offending line segments and redraw and rename them. 2. ISE is case sensitive. If students change case in the preassigned names, the Test Fixture will not be able to find them. To rename a wire, right click on it and select “Rename Selected Net” and change the branch net name. Symptom: Adder Lab: Lots of red on the schematic, and an error message about S3 not found. Cause: The wrong test fixture file was used. Symptom: Adder Lab: Addition is fine, but subtraction gives mostly errors. Cause: Check to see if your circuit is calculating X-Y instead of Y-X. Symptom: TBird Lab. Waveforms have fast glitches in them ______|______|____. Cause: These are caused by two waveforms entering a gate at essentially the same time, the first causes the gate to go up, and the second makes it go down. If you zoom in, you will find they are very very short: far too short to have any influence on a tail light. In most circuits, like light flashers, these glitches are not important. For circuits where they may cause problems, read the Hazards section in the notes. Symptom: TBird Lab. Waveforms start in middle of flash cycle . i.e. instead of L1 -> L1,L2 -> L1,L2,L3 It may go L1,L2 -> L1,L2,L3 -> L1 -> L1,L2 -> L1.L2,L3 Cause: Think about the Counter circuit. It controlls when the flashes happen. The switches only
control which lights comes on in each of the four counter states. Now explain what is wrong. Symptom: • •
Errors or Warnings about connection problems Red lines in the simulator output, with a value of StX (Strong unknown).
Cause: • • •
Search for red squares, or red wires. These show ends of wires that are not connected. Look for small specks of red, or zoom in (F8) to make the specks larger. Try tracing back. If the output of one gate is unknown, look for unknowns on its inputs. If you don't see red boxes, try moving the gates a little to see if an assumed connection opens up. Also check the simulation did not stop at 1 us or under. The outputs will be unknown until the signals are initialized by the test fixture.
Symptom: TBird: Simulation works, but the down loaded program flashes lights too quickly and the buttons don't work. Cause: You probably compiled tbird_counter instead of tbirdtop. Symptom: The test fixture does not appear as a source and ModelSim does not appear as an application Cause: Right-click on a file in the design hierarchy and select “Design Properties”. Make sure the simulator is Modelsim-SE Verilog. Without this ISE won't find the ModelSim.
