Cxd1916r

Transcript

Flexible Encoding Digital Video Encoder CXD1916R The use of digital processing in communication and AV equipment is increasing, and as a result it is now possible to provide even more complex and even higher level processing and functions in this equipment. However, analog output is still required as the final output. The CXD1916R was developed so that beautiful and attractive output of digitally processed video signals can be provided in many countries. Since this device supports an extensive set of input and output formats, it supports usage modes that match the local conditions in most countries around the world. Furthermore, since low power operation and miniaturization were achieved, this product can also be used in portable equipment. NTSC, PAL, MPAL, and 4.43 NTSC Encode Modes The CXD1916R is a digital video encoder designed for use in digital video equipment such as set-top-boxes, video servers, and video CD players. The CXD1916R converts digital video signals expanded by an MPEG decoder, or digital video signals (ITU-R601: Y, Cb, Cr) that are supplied by other digital equipment to an NTSC or PAL composite signal, a Y/C (S video) signal, or an R/G/B or Y/U/V analog signal. It thus allows display of those digital input signals on a television. It can also convert MPAL or 4.43 NTSC composite signals and Y/C (S video) analog signals. V O I C E Our goals were to develop an IC that could be used in any digital product that handles video and that features further miniaturization, lower power consumption, and good generality. We are hopeful that this IC will be used extensively in the revolutionary digital products that will be appearing in the near future. ■ NTSC, PAL, MPAL, and 4.43 NTSC encode modes ■ Built-in 3-channel 10-bit D/A converter ■ Composite/YC, RGB, and YUV outputs ■ Both 8-bit and 16-bit pixel input modes ■ Pixel rate: 13.5 Mbps ■ I2C bus*1 (400 kHz) Supports 3-wire serial I/O. ■ Closed caption encoder ■ VBID and WSS encoders *1: The purchase of Sony I2C bus products gives the purchaser rights to use I2C bus patents held by Philips when using these products in systems that meet the I2C bus standard specifications stipulated by Philips. Built-in 3-channel 10-bit D/A Converter The CXD1916R adopts a 10-bit D/A converter. It creates an analog television signal that retains the high picture quality of the digital signal by 2× oversampling of the 13.5 MHz video data and performing the D/A conversion at 27 MHz. Closed Caption Encoder Since July of 1993, US law has required the provision of a closed caption decoder in every television receiver with a size of 13 inches or larger. The CXD1916R can automatically encode closed caption data simply by writing it from the serial interface to an internal register. That closed caption data is then superimposed on lines 21 and 284. Both 8-bit and 16-bit Pixel Input Modes The CXD1916R accepts either 16-bit Y, Cb, Cr data or 8-bit data corresponding to the ITU-R656 recommendation. It can also decode the ITU-R656 EAV code signal. VBID and WSS Encoders The CXD1916R supports video ID encoding used to discriminate between aspect ratios. VBID (the CPX-1204 EIAJ provisional standard) is superimposed on lines 20 and 283 in NTSC video signals. WSS (the ETS300/294 ETSI provisional standard) is superimposed on line 23 in PAL video signals. * The CXD1915R product, which incorporates copy protection functionality (Macrovision Rev. 7.1), is under development. MPEG2 Audio video decoder Transport Demodulator Tuner Video MPEG2 decoder Digital video encoder CXD1916R Memory Audio MPEG-1/2 decoder CPU COMP-O/B/U-OUT Y-OUT/G/Y-OUT C-OUT/R/V-OUT Audio D/A with digital filter ■ Figure 1 Set-top-box Block Diagram CXD1916R AVDD VG 8 Y 0.1 µF PD0 to 7 8 C PD8 to 15 1 kΩ VREF 3.2 kΩ AVSS Buff amp. COMP/B/U-O Y/G-OUT C/R/V-OUT LPF VB FID FID IREF 0.1 µF CXD1916R (Video encoder) MPEG decoder 75 Ω HSYNC HSYNC VSYNC VSYNC PDCLK DCLK 13.5 MHz 200 Ω SYSCLK CLK VSS 27 MHz ■ Figure 2 D/A Converter Application Circuit Example PD0 to 7 PD8 to 15 PIXCON XRST ROSD BOSD GOSD OSDSW FID VSYNC HSYNC CSYNC BF F1 XVRST SYNCM XIICEN XCS/SA SI/SDA SO SCK/SCL PDCLK Demultiplex, level translator and interpolator Y, U, V 4:2:2 to 4:4:4 OSD gen. ■ Figure 3 Application Circuit Example YUV/RGB translator Y Selector U Y, U, V V Delay LPF Modulator Chroma LPF Interpolator and selector 10-bit DAC COMP-O/ B/U-OUT 10-bit DAC Y-OUT/ G/Y-OUT 10-bit DAC C-OUT/ R/V-OUT VG Burst flag C sync. Sync. gen. and timing controller Sub carrier gen. I2C bus and SIO controller 1/2 Sync slope gen. Internal CLK SYSCLK ■ Figure 4 CXD1916R Block Diagram Closed caption encoder (for NTSC) VBID & WSS gen. IREF VREF VB TDI TMS TDO TCK TRST TVSYNC TD8 to 10 XTEST XTEST5