Design Project 2 - Part 1

Transcript

ECE/COMP SCI 352 DIGITAL SYSTEM FUNDAMENTALS DESIGN PROJECT 2 - PART 1 Fall 2001 - Version 3.0 Due: Beginning of Class On Monday, December 3 Project 2 will be the design of a very inexpensive digital wristwatch. In Project 1, you designed three combinational circuits, two of which will be used for counting up the digits of the watch. These circuit will be combined with storage elements, multiplexers, and a special conversion circuit in Part 1 to form the datapath of the watch. In Part 2, control logic will be added to form the logic core of the watch. The goals of this project are to: 1. Increase your familiarity with Mentor Graphics design and simulation tools, and 2. Improve your understanding of material covered in class. This project is to be performed by teams of two students. Interactions between different teams are to be limited to discussions of understanding of the specifications or to understanding of how to use the tools. All design and simulation work, files generated, and output submitted are to be the team’s work, not that of others, unless specified otherwise. This is a complex specification and there are likely to be some corrections. Check the Project area of your section’s Website for updates before each design session. PROJECT SPECIFICATION Watch Description and Operation The watch to be designed is shown in Figure 1. It has a six-digit 7-segment LCD display. In addition, it has a PM indicator, an Alarm Activated (AA) indicator, and a fixed colon displayed between the hours and the minutes. The watch is controlled by three pushbuttons, PB0, PB1 and PB2. The watch has three primary modes of operation: 1. Time Display - displays the current time in hours, minutes and seconds. 2. Alarm Set - permits the alarm to be activated and set in hours and minutes. 3. Time Set - permits the time to be set in hours, minutes and seconds. The primary mode is selected by pressing PB0. At power-up reset, the watch is in Mode 1, Time Display. Pressing PB0 advances the watch to Mode 2, Alarm Set (Submode 2A). Pressing PB0 again advances the watch to Mode 3, Time Set (Submode 3A). Pressing PB0 an additional time returns the watch to Mode 1, Time Display. The functions of the other buttons within the three modes can be described as follows. 1 This is the mode entered by using the asynchronous reset MR. MR initializes all flip-flops in the watch to 0 except for flip-flop H12. H12 is initialized to 1 so that the watch starts in the 12- hour mode instead of the 24-hour mode. In Mode 1, pressing and holding PB1 illuminates the display. The illumination turns off upon the release of PB1. This is a function that we will ignore in designing the core logic for the watch. In Mode 1, pressing PB2 (for less than 2.5 seconds) changes the display from 12-hour (counts 1 to 12 with a PM indicator) to 24-hour mode (counts from 00 to 23) and pressing it again (after releasing it) changes the display back to 12-hour mode. Otherwise, in this mode: 1., The seconds advance at a rate of 1 per second. 2. When the seconds are 59, after 1 second, the seconds return to 00, and the minutes are incremented by 1. 3. When the minutes and seconds are 59:59, after 1 second, the minutes return to 00, and the hours are incremented by 1, and 4. When in 12-hour mode and: a) the hours, minutes and seconds are 11:59:59, after 1 second, PM is toggled ON or OFF. b) the hours, minutes and seconds are 12:59:59, after 1 second, the hours are reset to 1; c) the most significant digit of the hours is at 0, the display of the digit is turned OFF. 5. When in 24-hour mode and: a) the hours, minutes and seconds are 12:59:59, after 1 second, the hours are reset to 1; b) the most significant digit of the hours at 0, that most significant digit of the hour display is turned OFF. 6.If the alarm is activated and the time matches the alarm time, the alarm will sound until either: a pushbutton PB1 is pushed, or b one minute elapses. MODE 1: TIME D ISPLAY MODE 2: ALARM SET PB1 PM PB2 PB0 FIGURE 1 Watch Exterior 2 In this mode, hours and minute values are fixed unless changed using pushbuttons. Pressing PB1 selects modes that permit the alarm to be turn ON or OFF and hours or minutes to be set to the desired value. The selected digits flash ON and OFF changing twice per second. Also, in this mode, the regular time continue to advance normally. If PB0 is pressed at any time in any of the three submodes below, Mode 3(Submode 3A) is entered. When Mode 2 is initially entered, neither hours or minutes is selected. With neither hours nor minutes selected, pressing PB2 “toggles” the Alarm Active ON and OFF. Pressing PB1 advances the Alarm Set to Submode 2B. SUBMODE 2A: SUBMODE 2B: When Submode 2B is entered, hours are selected (flashing) and Alarm Active (AA) and the corresponding display indicator are turned ON; if the alarm is already ON it remains ON. With hours selected, the value is changed by pressing PB2 for less than 2.5 seconds to increment the hours by 1 or holding PB2 for more than 2.5 seconds to increment the hours by 1 twice per second. Pressing PB1 advances the Alarm Set to Submode 2C. When Submode 2C is entered, the minutes are selected (flashing). With minutes selected, the value is changed by pressing PB2 for less than 2.5 seconds to increment the minutes by 1 or holding PB2 for more than 2.5 seconds to increment the minutes by 1 twice per second. Pressing PB1 a third time returns Alarm Set to Submode 2A. SUBMODE 2C: MODE 3: TIME SET In this mode, hours and minute values are incremented normally unless changed using pushbuttons. Pressing PB1 selects hours, minutes or seconds to be set to the desired value. The selected digits flash ON and OFF changing twice per second. If PB0 is pressed at any time in any of the three submodes below, Mode 1 is entered. Also, in this mode, the regular time continue to advance normally except as indicated in Submode 3C. When Mode 3 is initially entered, seconds are selected (flashing). With seconds selected, the value is changed by pressing PB2 for less than 2.5 seconds to increment the seconds by 1 or holding PB2 for more than 2.5 seconds to increment the seconds by 1 twice per second. Pressing PB1 advances the Time Set to Submode 3B. SUBMODE 3A: When Submode 3B is entered, hours are selected (flashing). With hours selected, the value is changed by pressing PB2 for less than 2.5 seconds to increment the hours by 1 or holding PB2 for more than 2.5 seconds to increment the hours by 1 twice per second. In the 12hour mode, when the time changes from 11 to 12, the PM indicator is “toggled.” Pressing PB1 advances the Time Set to Submode 3C. SUBMODE 3B: When Submode 3C is entered, the minutes are selected (flashing). With minutes selected, the value is changed by pressing PB2 for less than 2.5 seconds to increment the minutes by 1 or holding PB2 for more than 2.5 seconds to increment the minutes by 1 twice per second. Pressing PB1 a third time returns Time Set to Submode 2A. In this submode, the seconds stop incrementing normally whenever PB2 is pressed (actually it will count increment a couple of times if held in for more than a 2.5 seconds, but I don’t want to add yet another input!). SUBMODE 3C: 3 Warning: Understanding the above is critical to completing the design - this is like a very large “story problem” from elementary or secondary school! PERIPHERAL ELECTRONICS AA LCD DISPLAY PM PM MH LH BMH BLH Pushbuttons MM LM MS LS BM BS CORE LOGIC PB0 PB1 PB2 CLOCK TICK TOCK MH(1:0) ML(3:0) MM(3:0) ML(3:0) MS(3:0) LS(3:0) AA PM BMH BLH BM BS AS FIGURE 2 Top Level Diagram Implementation With the operation summary provided in the previous section, we can now begin to examine the hardware implementation. The hardware will consist of three blocks: the LCD Display, the Peripheral Electronics and the Core Logic. LCD DISPLAY As shown in Figure 2, the LCD digits in the Display have seven segments in addition to a signal, BLANK. BLANK = 1 turns off all segments of the digit; for BLANK = 0, the segments operate normally. Thus there are eight logic inputs to each display digit. In addition, there are two LCD 4 elements, which display the Alarm Activation Indicator, AA, and the PM Indicator, PM. The naming of the digit, blanking, and indicator signals is shown below the display in Figure 2. PERIPHERAL ELECTRONICS The Peripheral Electronics in Figure 2 provides the clock signals and the interface to the outside world for the Core Logic. It consists of the following: 1. A crystal oscillator that uses a crystal with frequency 32,768 Hz. This oscillator provides a the square wave CLOCK with the frequency given above as a Core Logic input. 2. A TICK signal that produces a pulse every 2 15 (32,768) clock periods. TICK is 1 for one clock period and 0, otherwise. This signal indicates when the seconds and other digit positions as specified by the watch operation are to be incremented. It is generated by using a 15bit binary counter that counts clock periods with logic that detects the terminal count (11...1) of the counter to produce TICK. 3. A TOCK signal that produces a pulse every 2 14 (16,384) clock periods. TOCK is 1 for one clock period and 0, otherwise. This signal is used to flash the digits and to increment the digits during setting operations at 2 times/second instead of 1 time per second. It is generated by using the least significant 14 bits of the TICK counter with logic that detects the terminal count (11...1) of the counter over these 14 bits to produce TOCK. 4. A contact bounce elimination circuit followed by a single-cycle synchronizer pulse generator for two of the three pushbuttons that produce Core Logic inputs: PB0 and PB1. The contact bounce eliminators give “clean” logic values out when a pushbutton is depressed. Otherwise, a pushbutton output can go back and forth between 1 and 0 after the button is pressed or released. A single cycle generator causes a pushbutton output such as PB0, to go to 1 for only a single clock cycle when the button is pushed. Otherwise, the output could be at 1 for very large numbers of cycles, making the logic design of the Core Logic more difficult. 5. A contact bounce elimination circuit followed by a synchronizer and sequence generator circuit for one of the three pushbuttons that produce Core Logic inputs: PB2. The sequence generator produces a single positive pulse when PB2 is pressed and released within 2.5 seconds. If PB2 is pressed for more than 2.5 seconds, pulses are generated on the PB2 input to the Core Logic at a rate of 2 per second. During setting operations, this permits the user to increment by 1 in a precise manner or more rapidly at twice per second. These actions are illustrated as follows: Pushbutton PB2 <2.5 seconds Signal PB2 Pushbutton PB2 ≥2.5 seconds Signal PB2 6. BCD to 7-segment decoders for converting the 2-bit or 4-bit digit codes for the six display 5 digits 7-segment codes. The following Core Logic outputs are inputs for these Display digit decoders: CORE LOGIC PM MH(1:0) LH(3:0) Datapath Logic DATA_PATH PB0 PB1 PB2_FAKE CLOCK MR TICK TOCK BMH BLH BM BS AS AA PB2 MRB SMD3C SMD3B SMD3A SMD2C SMD2B MD1 SMD2A Control Output Logic COL Control Sequencing Logic CSL FIGURE 3 Core Logic (CL) blocks MH[1:0] LH[3:0] MM[3:0] 6 MM(3:0) LM(3:0) MS(3:0) LS(3:0) 7 DATA_PATH schematic FIGURE 4 LM[3:0] MS[3:0] LS[3:0] 7. Drivers for the LCD display digits and indicators. The Core Logic outputs for the Alarm Activation indicator and the PM indicator are AA and PM, respectively. In addition, there are drivers controlled by BLANK outputs for MH: BMH, for LH: BLH, for MM and LM: BM, and for MS and LS: BS. Finally there is a driver for sounding the Alarm, AS. Warning: You are not to design any of the Peripheral Electronics! This description of the Peripheral Electronics provides a context for the Core Logic which your team will design so some of the information may be useful! CORE LOGIC The Core Logic consists of the counting and control logic for the watch. A block diagram for the Core Logic is shown in Figure 3. The upper part of the diagram is occupied by the datapath for the watch, DATA_PATH. The DATA_PATH schematic in Figure 4 contains 10 digit circuits which hold, increment and reset digit values. Six digit circuits implement the time feature of the watch and four digits implement the alarm feature. Two types of components implement the digits, MHD and MSD. MHD is the circuit MH that you designed in Project 1 with its outputs connected to the D inputs of two positive edge-triggered D flip-flops. The flip-flops have an asynchronous reset MRB and are clocked by CLOCK. The outputs of the D flip-flops are attached to the inputs of MH. The MSD circuit is similar except that it contains MS and four D flip-flops and has a carry output Cout. The labels in color outside of the schematic symbol boundaries are the reference or “instance” names for each of the 10 digit circuits. These label take on the form “Txy” for the time digit circuits and “Axy” for the alarm digit circuits. “xy” takes on values MH, LH, MM, and LM for both the Time and Alarm circuits and also takes on values MS and LS for the Time circuits only. To the right of the digit circuits are three quad 2-to-1 multiplexers labeled DM and one dual 2-to-1 multiplexer labeled DM2. These multiplexers determine whether the MH, LH, MM, and LM circuits connected to the LCD Display are Time or Alarm circuits. in addition, there is a block CV2412 that is used to convert the 24-hour mode used internally to a 12-hour mode including the PM indicator, if the latter is selected by the user. This selection is performed by the two additional multiplexers of types DM2 and DM. The 10 digit circuits, the multiplexers, and CV2412 and the connections between them are the datapath of the watch, DATA_PATH. The remaining two blocks are the control unit for the watch. The Control Sequencing Logic (CSL) contains a sequential circuit for controlling the watch sequencing, WS. It also contains: 1) logic AA that stores whether the alarm is activated or not, 2) logic H12 that stores whether the 12-hour or 24-hour mode is active, and 3) logic FLASH that provides a signal which has a period of 1/2 second to flash display digits by using the BLANK inputs on the LCD display digits. The other control block, Control Output Logic (COL) generates the datapath and display control signals from: 1) pushbutton inputs, 2) outputs from the Control Sequencing Logic block and 3) outputs from the datapath. This block contains subcircuits as follows: Reset Control (RC) for generating the reset outputs to the datapath, Increment Control (IC) for generating the 8 R I R I LH D C MH1 MH0 MHDI(1:0) 1 0 1 R MHI1 MHI0 D CLOCK 0 C MHD(1:0) R MRB FIGURE 5 Rough Schematic for MHD increment outputs to the datapath, and Display Control (DC) for selecting the values to be displayed and the blanking of selected display digits. In addition, it contains the Alarm Circuit (AC) circuit that sounds the alarm and turns it off automatically after 1 minute. Finally, there is a special circuit Terminal Count (TC) that generates various status signals based on values in the Time and Alarm digits for use by other control circuits. PROJECT DESIGN Here, we combine the detailed description of the various components discussed in the preceding section with the design instructions for the components. Datapath Component Design There are four digit circuits to be designed: MHD and MSD, a multiplexer DM2, and a 24-hour to 12 hour converter CV2412. These circuits are to be placed in the datapath schematic, DATA_PATH, shown in Figure All other components in the datapath are provided to you MHD This circuit consists of the interconnection of the MH circuit from Project 1 and two positive edge-triggered D flip-flops with asynchronous reset MRB, the power up reset for the watch. The flip-flop to be used from the Mentor Graphics genlib and details on how to connect it are given in Appendix C of the Mentor Graphics Tutorial. This is the flip-flop we will use throughout Project 2. A simplified version of the schematic for MHD is given in Figure 4. 1. Generate a symbol for your MH circuit (or the one we have supplied). 2. Enter the schematic for MHD using Design Architect and the symbol from 1. 3. Simulate your DESIGN ACTIONS: 9 schematic from 2 using Quicksim and a few carefully selected input vectors to determine correctness. 4. Generate a symbol for MHD. SUBMISSION: Schematic for MHD. This circuit consists of the interconnection of the MS circuit from Project 1 and four positive edge-triggered D flip-flops with asynchronous reset MRB. MSD 1. Generate a symbol for your MS circuit (or the one we have supplied). 2. Enter the schematic for MSD using Design Architect and the symbol generated. This schematic will be similar to that for MHD given except that there are four flip-flops and the presence of output Cout. 3. Simulate your schematic from 2 using Quicksim and a few carefully selected input vectors to determine correctness. Generate a symbol for MSD. DESIGN ACTIONS: SUBMISSION: Schematic for MSD. Multiplexer Design Two types of multiplexers for digits are needed. One is a quad 2-to-1 multiplexer DM which is provided and the other is a dual 2-to-1 multiplexer DM2. 1. Enter the schematic for DM2 using Design Architect and two 2-to-1 multiplexer components from genlib. The two select inputs for the two 2-to-1 multiplexers should be connected to input S. Each of the multiplexer inputs and the multiplexer output should be a 2-bit bus. 2. Simulate your schematic from 1 using Quicksim and a few carefully selected input vectors to determine correctness. 3. Generate a symbol for DM2. DESIGN ACTION: SUBMISSION: Schematic for DM2. CV2412 Design CV2412 converts the 24-hour time representation to the 12-hour plus PM representation. Either the 24-hour representation from the digit multiplexers for hours or the 12-hour plus PM representation can be displayed as selected by the user. The inputs and outputs for the following table for CV2412 are be completed. The last five lines have don’t cares as outputs. 24-hour 12-hour Value Value TMH1 TMH0 TLH3 TLH2 TLH1 THL0 PM 10 0 12 1 1 2 2 MC1 MC0 LC3 LC2 LC1 LC0 24-hour 12-hour Value Value TMH1 TMH0TLH3 TLH2 TLH1THL0 PM 11 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 MC1 MC0 LC3 LC2 LC1 LC0 24-hour 12-hour Value Value TMH1 TMH0 TLH3 TLH2 TLH1 THL0 PM Don’t Cares X X 1 0 1 X X X 1 1 X X 1 0 0 1 X X 1 0 1 X X X 1 1 X X X X MC1 MC0 LC3 LC2 LC1 LC0 DESIGN ACTION: 1. Generate the CAFE file to find equations for PM, MC0, LC3, LC2, LC1 and LC0. Do not attempt to generate the output MC1! It is a constant 0 and CAFE will give an unintelligible error message! It must be connected in your schematic to Ground. 2. Run CAFE on the file. 3. Use Design Architecture to draw a two-level SOP schematic for CV2412; be sure to share AND gates as much as possible between the equations. Otherwise, you will lose points for a high gate input count. 4. Simulate your schematic from 2 using Quicksim and force file. CV2412.force. Check the output to be sure that CV2412 is working properly. Annotate the output to show why you believe it is working correctly. If it is not, then debug it and re-simulate. 5. Generate a symbol for CV2412. SUBMISSION: CAFE input file, CAFE output file, schematic, and annotated output traces for CV2412. DATA_PATH 1. Following the procedures in Accessing Files Provided for Project 2 in the Project folder on the course website, produce Mentor Graphics objects: DM and DATA_PATH in your project directory. 2. You may need to “update” the occurrences of DM in your DATA_PATH schematic. 3. Instantiate the four objects you have designed, MHD, DM2, and CV2412 in DATA_PATH in the locations as indicated in Figure 4. 4. Simulate your DATA_PATH schematic using Quicksim and force file DATA_PATH_ALARM.force to check out the Alarm digits. Simulate your DATA_PATH schematic using Quicksim and force file DATA_PATH_TIME.force to check out the Time digits. Both simulations will check CV2412 and together, they will check out the multiplexers. Provide notes on a separate sheet keyed to numbers written on your output traces to show that the DATA_PATH is working properly, e. g. that the digits are incrementing properly, resetting properly, and that CV2412 and the multiplexers are working properly. If your output is not correct, debug your circuits until it is. DESIGN ACTION: SUBMISSION: DATA_PATH schematic, traces for force file DATA_PATH_ALARM.force split input two printout of 600 ns each, your notes for DATA_PATH_ALARM traces, traces for force file DATA_PATH_ALARM.force split into two printouts of 600 ns each*, and your notes for DATA_PATH_ALARM traces. *See Printing Quicksim Traces in the Project folder on the course website. 12 REPORT COVER PAGE - PART 1 ( TO 2) BE SUBMITTED AT THE SAME TIME AS PART ECE/COMP SCI 352 PROJECT 2 – Part 1 - Fall 2001 TEAM MEMBERS: 1. NAME ______________________________ST. NUMBER__________________SCORE______ 2. NAME ______________________________ST. NUMBER__________________SCORE______ All items submitted are to be final versions and must be in the order given below. Points will be deducted for items that are out of order. Also points will be deducted for unreadable schematics or simulation traces. ITEM GRADE 1. MHD schematic 2. MSD schematic 3. MD2 schematic 4. CV2412 input file and CAFE output file 5. CV2412 schematic 6. CV2412 annotated simulation traces 7. DATA_PATH schematic 8. DATA_PATH _ALARM traces and notes 9.DATA_PATH_TIME traces and notes _____ _____ _____ _____ _____ _____ SUBTOTAL - PART 1 _____ TEAM EFORT REPORT - PART 1 ( TO _____ BE SUBMITTED AT THE SAME TIME AS PART 2) TEAM EFFORT REPORT - PART 1 Submit: This page as the last page of your project report. Each row of the table containing the task contributions must sum to 100%. Team Member Names: 1.____________________ 2.____________________ MHD: Design & Schematic Entry % % MSD: Design & Schematic Entry % % MD2: Design & Schematic Entry % % CV2412: Input file and CAFE output file % % CV2412: Schematic % % CV2412: Annotated simulation traces % % DATA_PATH: schematic % % DATA_PATH _ALARM: Traces and notes % % DATA_PATH_TIME: Traces and notes % % Other: % % Other: % % Other: % % AVERAGE (column 1 + column 2 must be 100%) % % Comments: 13