Digi Connect Me (9210) Development Board Schematics (08/26/09)

Transcript

5 4 3 2 1 30006001-06 REV A +3.3V SECONDARY PORT LEDs YELLOW PRIMARY PORT LEDs YELLOW CR17 2 CR15 2 CR13 2 CR11 2 CR9 2 CR7 2 CR5 2 +3.3V +3.3V 1 1 1 1 1 1 1 1 1 10 O16 11 O15 12 O14 13 O13 14 O12 15 O11 16 O10 9 O9 D 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 CR4 CR2 CR18 CR16 CR14 CR12 CR10 GREEN O1 O2 O3 O4 O5 O6 O7 O8 7 6 5 4 3 2 1 8 9 7 5 3 LVT240 18 16 14 12 LVT240 CR6 R16 1 R17 1 R18 1 11 13 15 17 2 4 6 8 R2 330 2 21 23 GND SHUNT J5 PINS 2-3 = RS232 OFF PINS 1-2 = RS232 ON --- DEFAULT 14 13 12 9 10 11 20 19 18 17 16 15 4 5 6 7 8 D 10 SHIELD 11 SHIELD GND 1 1 C9 1 MAX3245E U3 +3.3V 2 27 3 22 USE 10000021 4 1 2 3 4 5 6 7 8 9 0.1uF 28 24 1 2 JP5 1 1 2 1 0.1uF 2 1 2 3 1 2 1 P1 C11 U5 P5 U2 2 1 C10 232 ENABLE JUMPER GND 4 1 C8 0.1uF GREEN 330 1 2 U4 R1 2 15k 2 15k 2 15k 1 EN GND +3.3V PRIMARY RS-232 PORT DB 9 19 EN 470ohms CR8 +3.3V U4 RN1 03300009 DB9 CR3 2 CR1 2 1 JP8: PIN 1 and 2 2 1 0.1uF 1 1 C R15 NO POP MANUFACTURING FLASH HEADER P9 2 P8 1800XXXX SHUNT, 2 PIN TA00030 1 2 USE 10000021 2- PIN SHUNT FOR P8 15k 2 R6 1 GND NO POP MODULE Vdd CURRENT 1 0ohms P10 1 2 3 4 1 19 17 15 13 11 9 7 5 3 1 R14 NO POP NOT POPULATED 2 15k 2 4 6 8 10 12 14 16 18 20 B 19 17 15 13 11 9 7 5 3 1 P11 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 C25 JTAG/DEBUGER HEADER +3.3V 1 0.1uF 1 C24 0.1uF 2 1 1 3 5 7 9 11 13 ME J-TAG SOCKET 1 2 1 C27 2 4 2 3 7 SECONDARY RS-232 PORT DB 9 0.1uF P2 5 6 4 3 11 13 9 8 12 16 10 1 1 MAX3227E 1 2 3 4 5 6 7 8 9 C5 2 0.1uF 10 SHIELD 11 SHIELD V_ETHER- B GND GND R4 0 GPIO SWITCH BANK 2 1 1 0.1uF 2 2 U1 De-coup C7 0.1uF GND ME De-couple C3 2 Do not populate C17 C18 C6 0.1uF USER PUSH BUTTON SW2 GND 0.01uF C19 C2 GND 0 2 SW3 1 2 20 19 3 4 18 17 5 6 16 15 7 8 14 13 9 10 12 11 4 3 2 1 A NPR000538 REV ECO APPROVALS PRODUCTION BUILD DESCRIPTION OF CHANGE A 2 0.1uF 2 0.1uF 2 0.1uF CONTACT # 2 INPUT 1 DCD GPIO-1 INPUT 2 CTS GPIO-2 INPUT 3 DSR GPIO-3 1 GND INPUT 4 RTS GPIO-4 INPUT 5 DTR GPIO-5 SW1 USER PUSH BUTTON SW1 C13 Do not populate 4 8/26/2009 DRAWN 8/26/2009 CHECKED 8/26/2009 0.1uF ENGINEER 2 8/26/2009 11:48:39 AM DO NOT SCALE DRAWING GND 5 DESIGNED 3 2 BY CKD Digi DATE SW3 POSITION 0.1uF TP3 TP2 V_ETHER+ 1 1 1 C1 U1 RESET 2 1 GND 1 1 SW2 20 18 16 14 12 10 8 6 4 2 GND 1 C4 LOGIC ANALYZER HEADER GND U9 De-couple 1 0.001uF 2 NO POP R5 1 1 3 4 2 1 U8 De-coup 1 SW4 2 +3.3V C +3.3V TP12 20 18 16 14 12 10 8 6 4 2 P3 GND P12 1 EMBEDED MODULE CONNECTOR 03300009 DB9 1 TP10 TP9 TP8 TP7 TP6 TP5 TP4 APPR DATE A TITLE: Digi Connect ME Dev Board SIZE REV PART NO. D SCALE: 30006001-06 NTS VERIBEST 1 SHEET A 01 of 04 5 4 3 2 1 30006001-06 REV A +3.3V D D DIGITAL IO LEDs (GREEN) 1 +3.3V D2 D3 D4 D5 2 D6 3 3 3 3 D1 D7 1 1 1 LVT240 16050493 18 16 14 12 3 EN 1 2 4 6 8 2 U6 1 2 9 7 5 3 3 RN2 1 2 2 RN2 3 3 1 RN2 2 4 1 RN2 2 5 16 CR19 470ohms CR20 EN LVT240 16050493 15 470ohms 2 11 13 15 17 14 470ohms CR21 U6 19 13 470ohms CR23 RN2 12 CR22 470ohms C P7 GND C RN3 1 2 3 4 5 6 7 8 9 RN3 RN3 RN3 12 220ohms 5 4 220ohms 13 14 220ohms 3 2 220ohms 15 16 1 220ohms 18000334 HDR_1X9_MC1,5 GND RN3 GPIO PORT GND RN3 RN3 B 2 C14 0.001uF 1 2 C12 0.001uF 1 2 C15 0.001uF 1 2 C16 0.001uF 1 2 C20 0.001uF 1 2 C21 0.001uF 1 2 10 220ohms 7 1 9 8 220ohms C22 0.001uF B GND +3.3V A P4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 NPR000538 PRODUCTION BUILD REV ECO DESCRIPTION OF CHANGE APPROVALS A WRAP_FIELD_15X10 GND 8/26/2009 DRAWN 8/26/2009 CHECKED 8/26/2009 ENGINEER 8/26/2009 11:48:39 AM DO NOT SCALE DRAWING 5 4 3 2 CKD Digi DATE DESIGNED BY APPR DATE A TITLE: Digi Connect ME Dev Board SIZE REV PART NO. D SCALE: 30006001-06 NTS VERIBEST 1 A SHEET 02 of 04 5 4 3 2 1 30006001-06 REV A PCB1 D D 3000XXX1-XX 1 SCHEMATIC 30006001-06 RevA PCB2 3000XXX2-XX 1 +3.3V 1 +3.3V 1 R19 1 R7 On/Off SWITCH 1 C30 45.3k 2 1 1uF 100mohms 4 3 2 1 -45V OUTPUT FROM ME MODULE 1 2 3 4 5 6 1 R8 VR1 47 2 1 2 C28 1 1 C31 1 R11 CR25 C 3000XXX4-XX C29 270pF 2 24.9k GREEN ASSEMBLY 30006004-06 RevA 4 2 1 1 7 2 6 D8 1 R10 C23 1 C26 1 1 R13 GND 1 2 100uF 2 2 0.1uF 1 P13 GND D9 FDC5614P LM3485 1 5 8 TP13 P14 ASEEMBLY SHT 1 3 R9 2 2 2 POE +12V 1 PoE MODULE 2 1 100mohms POWER JACK 5 4 2 2 3 1 2 L2 SW5 1 3 2 6 1 18000302 D10 1 1 1 2 P15 PCB 30006002-06 RevA 21000122 U7 C TP14 22uH 2 L1 2 15k 100uF 2 1uF 2 2 TP15 220 Vout = 3.29V Vripp = 26.5mV D/C TO D/C REGULATOR 9V-39Vin 3.3Vout GND 12V OUTPUT FROM PoE MODULE CR24 1 B POE SOURCE LED GREEN R12 B 2 220 GND A NPR000538 PRODUCTION BUILD REV ECO APPROVALS A DESCRIPTION OF CHANGE 8/26/2009 DRAWN 8/26/2009 CHECKED 8/26/2009 ENGINEER 8/26/2009 11:48:39 AM DO NOT SCALE DRAWING 5 4 3 2 CKD Digi DATE DESIGNED BY APPR DATE A TITLE: Digi Connect ME Dev Board SIZE REV PART NO. D SCALE: 30006001-06 NTS VERIBEST 1 SHEET A 03 of 04 5 4 3 2 1 30006001-06 REV A D D RESON FOR CHANGES: C C 1. MAIN REASON IS TO CORRECT THE LAYOUT ISSUE FOR THE SEPARATION BETWEEN P13 AND P14 - POE CONNECTORS. 2. CHANGE SOME OF THE PART NUMBERS OF VARIOUS COMPONNENTS TO MATCH THE BOM. 3. ENABLE PRIMARY PORT TRANSCEIVER B B A NPR000538 REV ECO APPROVALS A PRODUCTION BUILD DESCRIPTION OF CHANGE 8/26/2009 DRAWN 8/26/2009 CHECKED 8/26/2009 ENGINEER 8/26/2009 11:48:39 AM DO NOT SCALE DRAWING 5 4 3 2 CKD Digi DATE DESIGNED BY APPR DATE A TITLE: Digi Connect ME Dev Board SIZE REV PART NO. D SCALE: 30006001-06 NTS VERIBEST 1 SHEET A 03 of 04