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R2D3 E1/PRI Data Capture Cards Real-time capture, recording and replay of E1/PRI (G.703/G.704) 2,048 kbits/s bitstreams
R2D3 with BNC input/output connectors R2D3 PCI data capture cards provide the basis for development of software solutions for real-time signal surveillance, monitoring, recording, archiving, analysis and processing applications. Cards provide access to, and output of, real-time digital signals on a PC. Under software control, bitstreams can be transferred to and from host memory, recorded to disk or replayed from disk.
R2D3 with RJ-45 input/output connectors E1/PRI cards support dual-stream unframed and framed 2,048 kbits/s applications (ITU G.703/G.704), with a choice of 75Ω unbalanced or 120Ω balanced data interfaces via BNC or RJ-45 connectors. R2D3 cards provide input and output data transfer of complete G.703/G.704 frames, including signalling, framing and alarm information. There is no need to specify data format or protocol since all types of messaging or other signals carried within the 2,048 kbits/s stream are supported. This capability can be significant where there is a need to capture unknown or different types of data and signalling that may be present on E1, ISDN 30, CEPT-1 or PRI links, including encrypted or multiple timeslot (bonded/strapped) data transfers. Real-time data can be recorded on standard PC fixed or removable hard disks. Once captured, bitstreams are available for processing or storing-to-disk as frame-aligned or unframed binary data. On-board buffering ensures that there is none of the data loss that is often associated with high-speed data capture on PCs. SomerData supports OEM, developer and system integrator applications, including the provision of programming information with code examples. For application software development, comprehensive Programmer's Reference Guides and code examples are available on request. E1/PRI Recorder and Replayer application software is available for use with R2D3, running under Windows XP™ or Windows 2000™. R2D3 PCI Data Capture Cards are also available for Digital Audio Broadcast ETI and STI (G.703/G.704), LVDS (data + clock up to 60 Mbits/s) and RS-422A (data + clock up to 15 Mbits/s) applications.
www.somerdata.com/r2d3e1
R2D3 E1/PRI Data Capture Cards Specifications Signal Interface G.703, 2,048 kbits/s Pulse shape As ITU-T G.703 pulse mask Line code HDB3 Data type framed or unframed Input / Output Impedance 75 Ω unbalanced 120 Ω balanced selectable high-impedance input (40 kΩ) Input sensitivity -13.6dB Nominal Signal amplitude ±2.37 V 75 Ω interface ±3.00 V 120 Ω interface Loss of Input Signal Threshold 300 mV Input Data Decision Threshold 43% to 57% peak Input Pulse Width 230 ns to 260 ns Output Pulse Width 244 ±20 ns (at mid level)
Input / Output Jitter Attenuation 45 dB at 40 kHz (typical) 20 dB / decade attenuation above the 10 kHz corner frequency Jitter attenuation is applied to the input signal for input data transfers and to the output signal when the input signal is used as an external clock reference for output data transfers. Input jitter tolerance 1200 UI at 10 kHz 14 UI at 750 Hz 0.4 UI at 10 kHz – 100 kHz Output Pulse-to-Pulse Jitter <100ns using internal clock <32ns using clock recovered from an external E1/HDB3 signal On-board Buffer 16 Mbits SDRAM on-board memory to buffer data to / from the PCI Bus Signal Input / Output Connectors Four BNC connectors (R2D3-ASSY-0326) Two RJ-45 connectors (R2D3-ASSY-0327) PCI Interface Compatibility 32-bit 33 MHz PCI bus PCI specification revision 2.1 (card requires 3.3V and 5V) Physical Length: 174 mm Height: 106 mm Short PCI board compatible with standard 32-bit PC slot. Components fit within the PC I/O panel 19 mm width.
Application Development Controlling the Card
Functional Block Diagram
R2D3 uses a command and status structure based on the mailboxes of an AMCC 5935 device. A series of control and status commands are implemented, using the mailbox registers of the AMCC PCI interface device. These allow control and interrogation of the on-board buffer. This buffer is implemented as fast memory cascaded to form the equivalent of a very large FIFO memory. Data transfers take place by reading data into or writing data out of the Buffer, across the PCI bus. For fast (burst) transfers, the memory is divided into two areas, with independent status and control of each. Settable thresholds are provided to indicate the fullness and emptiness of the Buffer. Interrupt control is provided to enable the card to signal its status, including data states. Data transfers into and out of the card are in serial form for each bitstream. Transfers across the PCI bus take place in Double Word (DWORD) 32-bit form.
Somerdata Ltd. Underwood Business Park Wells, Somerset BA5 1AF UK
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Specifications may be subject to change without notice
+44 (0)1749 671481 +44 (0)1749 671482
[email protected] www.somerdata.com ds_r2d3e1.doc Jul-05
