Transcript
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
Features
General Description
ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ
The E931.06 integrated circuit is designed for interfacing Passive Infra Red (PIR) sensors with micro-controllers or processors. A single wire Data Out, Clock In (DOCI) interface is provided for interfacing with a micro-controller. Multiple devices can easily be operated at the same time. One PIR sensors ceramic elements connect directly to the PIR inputs. The PIR signal is converted to a 14 bit digital value. The E931.06 contains an on chip temperature measurement circuit with a resolution of better than 0.05K. The PIR sensor voltages and the temperature value are supplied to an external microcontroller through the DOCI interface.
Direct connection to PIR sensor elements Temperature measurement Differential PIR Input Digital Signal Processing (DSP) Single wire serial interface (DOCI) Operating voltage down to 2.7V Low current consumption High dynamic range High supply rejection
Applications ÿ ÿ ÿ
Integration with PIR sensor elements (hybrid modules) High end PIR systems Building Management
Digital Sensor Assembly with E931.06 The E931.06 PIR Signal processor replaces the JFET and optional discrete components.
Traditional analog PIR detector Traditional
New digital PIR detector
Analog Output
Temperature Analog to Digital
VSS
U3 78L05 Vout
Vin
D1
1
C4 100n
2
C3 100n
C2 100n U1
C1 470n
1 2 3 4
DIGITAL
U2
VSS
VDD
VSS
GP5/OSC1/CLKIN
GP0
GP4/OSC2
GP1
GP3/MCLR/VPP
Digital Output
GP2/T0CKI
8
5
MICRO
1 2 VSS Voltage
J2 1 2
RE1 RELAY-SPST
D2
Alarm Loop
7 6
J1
SN4007
+ C5 100u/16V 1N4148
3
Serial Interface
VDD
VSS
GND
VDD
E931.06A
PIR Analog to Digital
VDD
Q1 BC237
R1 10k
VSS
VSS
Typical application circuit for alarm motion sensor Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
Absolute Maximum Ratings Parameter
Supply Voltage Current into any pin Storage Temperature
Symbol VDD Tst
Min
Max
-0.3 -100 -45
3.6 100 125
Unit V mA °C
Remarks One pin at a time
Stresses beyond those listed above may cause permanent damage to the device. Exposure to absolute maximum ratings may affect the device reliability. ESD protection: all pins will be able to withstand a discharge of a 100pF capacitor charged to 1.6kV through a 1500Ω series resistor. Test method: MIL-STD-883D method 3015.
Operating Conditions (T=25 °C, unless stated otherwise) Operating temperature range: -25 to +70°C
Parameter
Supply Supply voltage Supply current Digital DOCI interface
Symbol
Typ
Unit
3.6 15
V µA
Input low voltage VIL Input high voltage VIH 80 Pull down current 200 Pull up current 130 Input capacitance 5 DOCI interface setup time ts 2 Data clock low time tL 0.1 DOCI low time tL + tbit Data clock high time tH 0.1 Data bit settling time tbit 1 DOCI low time to ensure update tW 64 Analog Inputs PIR+, PIR-, Analog to Digital Converter Input leakage -1
20
%VDD %VDD µA µA pF 1/FCLK µs 1/FCLK µs µs 1/FCLK
RIN
ADC Sensitivity
6
ADC Temperature Coefficient RMS output noise referred to input
14 6.5
-300
F0 FS TI
1
1
fA
50 100
GΩ mV mV Bits
30 -50 -100
ADC Resolution
ADC Offset Digital Filter Type & Cut off Freq. Digital Filter Sampling Freq. DOCI Interrupt cycle
2.7
Max
3.3 10
Input Impedance PIRIN input voltage range
VDD IDD
Min
7
300 2.5 1.5 0.5 0.4 7000 8192 9200 FCLK * 1.41 / 2048 / PI 1/32 512
µV/coun t ppm/K µV µV µV µV counts Hz FCLK 1/ FCLK
Remarks
VDD=3.3V
IN/Out to VDD IN/Out to VSS µC defines TREP avoid update to avoid update CLOAD = 10pF
VIN = -10mV .. +10mV Referred to VSS Differential Common Mode Max Count = 2^14-1
@ 0.5Hz @ 1Hz @ 2Hz @ 5Hz nd
2 Order BW LPF
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
Temperature Measurement Gain Measurement Range Linearity Count Value at Ambient Oscillator Internal Oscillator Frequency Internal clock frequency Temperature Dependency
80 -20 -5 5700 58
FOSC FCLK
6700
+90 5 7700
Counts/K ºC % Counts
64
70
kHz
1000
ppm/k
-20ºC to +90ºC -20ºC to +90ºC @ 25ºC
FOSC /2 -1000
FOSC /2
-20ºC to +80ºC Table 2: Operation conditions
Detailed Description___________________________________________ PIRIN0 NPIRIN0
ADC 0 PIR
Decimator nd (2 Order BW LP Filter)
ADC 1 Temp. °C
Serial Interface
VDD
Decimator
Voltage Reference
DOCI
VSS
Oscillator
Fig 2: Block diagram of E931.06
Oscillator
the reference to a digital value with a resolution of better than 0.1K.
The IC contains an on chip low power oscillator, with a frequency of 64 kHz. All time related signals and the cutoff frequencies of the digital filters are related to the oscillator's frequency.
Decimation – Digital Filters
The output signal from the PIR ADC is processed through a second order Butterworth low pass filter with a sampling rate of 1kHz.
PIR inputs and A/D conversion
The analog to digital converter generates a digital signal from the voltage level measured between the PIRIN and NPIRIN terminals.
The output signal from the Temperature ADC is converted to a 14 bit value by down sampling to Fclk/512.
Temperature Measurement
The on chip temperature is measured by converting the temperature dependent voltage of
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Data Sheet
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
Parallel to Serial Data Latch
all 28 bits have been read. After the last bit is read, the microcontroller must force low level and subsequently release DOCI. If reading is interrupted for more than 1 system clock with the DOCI interface at low level, the output data latch is updated with new values. Reading can be interrupted, while the DOCI interface is forced high. The output latch is not updated in this condition.
New data is transferred from the decimators to the serial interface every 32 system clocks, if the DOCI output is not active (being read). If the micro controller reads the register faster than the update rate of the filter, the data read is “0”. The E931.06 generates an interrupt every 512 system clock cycles, if the microcontroller reads all 28 bits within 32 system clock cycles. The interrupt is indicated by the E931.06 by pulling DOCI high.
The E931.06 accepts readout with µC defined timing. The interrupt signal can be ignored and reading frequency can be up to FCLK/64. In this mode, the µC has to force DOCI to a high level for the duration of 3 device clock cycles (3/FCLK) and subsequently read out the data bits as described in the timing diagram below.
The microcontroller must wait for 1us. It then generates a low to high transition on the DOCI line, before it samples the data bit. The first bit read is the MSB. This process is repeated until
DOCI Interface______________________________________________ LSB
MSB tS
tL
tH
tbit
Data Bit
tW
TREP
Micro controller drive Micro controller sample bit
MOS device drive Data ready on MOS device Fig 3: Timing diagram for the DOCI interface
28 x Data Bit 13 12
2
1
0 13 12
CHANNEL0
2
1
0
TEMPERATURE
TREP
Fig 4: Data words available on DOCI interface
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
ADC Input Stage____________________________________________ Rp IP
PIRIN Sp
ADC Sn
Rn NPIRIN
Out of Range Fig 5: Input structure of the ADC
Out of Range Detection
The dynamic range of the ADC Input stage is approximately +/- 50mV. To avoid saturation, the E931.06 contains out of range detection logic, which detects values above 15872 (97% of range) and below 511 (3% of range). If the values are outside this range, the switches Sp and Sn are closed for the duration of 512 system clocks. This ensures fast settling after disturbances. The input impedance of the actual ADC (IP / IN) is practically infinite.
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
Pad Names__________________________________________________ Pad Name VSS NPIRIN PIRIN VDD
Pin No. External Internal Internal External
TO5-3 3 Int. Int. 1
Description Negative supply voltage Negative PIR sensor input Positive PIR sensor input Positive Supply voltage
TCLK DOCI TEST
Internal External Internal
Int. 2 Int.
Test clock, Leave Open Data Out Clock In, Soft driver, MCU interface Test mode select, Leave Open
Table 3: Device Pin Out
Pad Positions_________________________________________________
TEST
VDD
DOCI
TCLK
PIRIN0
Pad Name VDD PIRIN NPIRIN VSS TEST DOCI TCLK
X 0.87 0.87 0.87 0.87 0.524 0.524 0.524
Y 0.983 0.452 0.257 0.084 1.049 0.918 0.687
Database
0.61
1.180
Table 4: Pad positions
NPIRIN0 VSS
Fig 6: Die with pad names top view
Contact Information____________________________________________ Microsystems On Silicon (Pty) Ltd. Pretoria, South Africa Tel: +27 (12) 3488367 Fax: +27 (12) 3481790 email:
[email protected] Visit our website for the latest information
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QM-No.: 25DS0089E.01
E931.06
SINGLE CHANNEL PIR SIGNAL PROCESSOR PRODUCTION DATA - DEC 1, 2015
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QM-No.: 25DS0089E.01