Transcript
EB-8001 Evaluation Platform for the DDX-8001 FEATURES
1. GENERAL DESCRIPTION
MULTI-CHANNEL DIGITAL AUDIO SOLUTION
The EB-8001 is an evaluation amplifier that showcases Apogee’s patented all-digital, high efficiency Direct Digital Amplification (DDX®) technology. The board features the DDX-8001 Controller which provides full digital audio preamplifier functions and three DDX2160/2120/2100 Power Devices which provide power amplification for six speakers. The EB-8001 allows DSD, I2S, S/PDIF or analog input. Additional outputs include Stereo Headphone Output and three channels of Line Outputs. The board includes digital volume, balance, bass, treble, EQ and limiting controls and local power regulation. Automatic fault protection guards the circuit from undervoltage, overcurrent and overtemperature conditions. A comprehensive graphical user interface is provided for effortless control of all the DDX-8001’s features, including on-the-fly EQ control.
• • • • • •
5.1 OUTPUT CHANNELS FOR DVD and A/V RECEIVERS MINI/MICRO COMBO, POWERED SPEAKERS 6x50/65W, 6/8Ω, <10% THD (DDX-2100) 6x62/75W, 6/8Ω, <10% THD (DDX-2120) 6x80/75W, 6/8Ω, <10% THD (DDX-2160)
• • •
THD+N < 0.04% (1W, 1kHz) SNR: 100dB (I2S), 98dB (S/PDIF) >88% EFFICIENCY
• • • • • • •
DUAL S/PDIF COAX/OPTICAL (STEREO) I2S INPUT/OUTPUT (8 CHANNELS) DSD INPUT (6 CHANNELS) STEREO ANALOG INPUTS SAMPLE RATES FROM 32 TO 192kHz @ 24 BITS STEREO AND SUBWOOFER LINES OUT STEREO HEADPHONE OUTPUTS
• • •
VOLUME, BALANCE, BASS, TREBLE PARAMETRIC EQ, BASS MANAGEMENT AUTO MUTE, DUAL LIMITERS
TYPICAL PERFORMANCE
INPUT/OUTPUT
DIGITAL PREAMP FEATURES
2Ch S/PDIF
ORDERING INFO: EB-8001-00 – Evaluation Board for DDX-8001 (uses DDX-2100 power devices) EB-8001-01 – Evaluation Board for DDX-8001 (uses DDX-2120 power devices) EB-8001-02 – Evaluation Board for DDX-8001 (uses DDX-2160 power devices)
DDX21XX Power Device
2
IS
DSD
DDX-8001 Controller
Left In Right In
2
IC
Headphone Amplifier
LP Filter
S/PDIF 2 to I S
ADC
PC Parallel Port
LP Filter
DDX21XX Power Device
LP Filter
DDX21XX Power Device
LP Filter
LP Filter
Line Driver
LP Filter
Line Driver
Left Line Out Right Line Out Sub Line Out 2
IS
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
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EB-8001 Figure 1 - EB-8001 Block Diagram
2. RECOMMENDED OPERATING CONDITIONS [1] SYMBOL VL VCC VIH VIL Fs TA
PARAMETER Logic Power supply voltage - J2 Terminal block H-Bridge Power supply voltage - J11 Terminal block Logic inputs, High - J10, 12, 13, 14 Headers Logic inputs, Low - J10, 12, 13, 14 Headers 2 PCM Input Sample Rate - I S Input on J6 PCM Input Sample Rate - S/PDIF Input Ambient Operating Temperature
MIN
TYP
MAX
UNIT
11.4 9 2.0
12.0 33
12.6 36 5.0 0.8 192 96 50
V V V V
32 32 0
KHz °C
Note 1. Performance not guaranteed beyond recommended operating conditions.
3. ELECTRICAL CHARACTERISTICS [2] Refer to circuit Sheets 1-12. Vcc=34V, f=1kHz, TA=25C, RL=6Ω, measurement bandwidth=20kHz unless specified otherwise.
SYMBOL
PARAMETER
DDX-2160 Channel.
Po
DDX-2120 Channel
DDX-2100 Channel.
UVP IL
Output
Output
Output
CONDITION
Power
per
Power
per
Power
per
Undervoltage Protection Threshold VL supply current – J15 Power Vcc supply current in Powerdown Vcc quiescent current
ICC Vcc supply current – J11 Power
ISC
Short circuit output current limit
THD+N <1%, RL=6Ω, Vcc=33V (Note 1) THD+N <10%, RL=6Ω, Vcc=33V (Note 1) THD+N <1%, RL=8Ω, Vcc=36V (Note 2) THD+N <10%, RL=8Ω, Vcc=36V (Note 2) THD+N <1%, RL=6Ω, Vcc=29V (Note 1) THD+N <10%, RL=6Ω, Vcc=29V (Note 1) THD+N <1%, RL=8Ω, Vcc=36V (Note 2) THD+N <10%, RL=8Ω, Vcc=36V (Note 2) THD+N <1%, RL=6Ω, Vcc=26V (Note 1) THD+N <10%, RL=6Ω, Vcc=26V (Note 1) THD+N <1%, RL=8Ω, Vcc=33V (Note 2) THD+N <10%, RL=8Ω, Vcc=33V (Note 2)
MIN
MAX
UNIT
62
Wrms
80
Wrms Wrms
60
Wrms
75
Wrms
45
Wrms
62
Wrms
60
Wrms
75
Wrms
37
Wrms
50
Wrms
50
Wrms
65 7 180 4 70
VL= +12.0V Damped State (Muted) 6-Channel switching @ 384KHz. Dither signal applied 6 channels driven to 0dBFS (62W) outputs (DDX-2160) 6 channels driven to 0dBFS (60W) outputs (DDX-2120) 6 channels driven to 0dBFS (50W) outputs (DDX-2100) DDX-2160, Each output DDX-2120, Each output DDX-2100, Each output
TYP
4.5 4.0 3.5
9
V mA mA mA
225
mA
12.8
A
11.4
A
10.3
A
6.0 6.0 6.0
8.0 8.0 8.0
A A A
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
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EB-8001 THD+N
Total Harmonic Distortion + Noise
SNR
Signal-to-Noise Ratio, all channels
SNR(LO) η CX
Line Output SNR, all channels Efficiency Output Channel Cross Talk (all Vcc supplies linked)
Po=1.0 Wrms Po= 50 Wrms 2 A-weighted, I S input, MCLK on J14 A-weighted, S/PDIF input A-weighted, analog input A-weighted, S/PDIF input A-weighted, analog input Po=6 x 50W into 8Ω Left output at 9W to Right channel
0.04 0.13
%
100
dB
98 97 98 95 88
dB dB dB dB % dB
-60
Note 1: Limited by Current Note 2: Limited by Voltage
4. EB-8001 OVERVIEW The EB-8001 is an all-digital audio amplifier evaluation board that demonstrates the application of Apogee’s DDX-8001 digital audio processor and DDX-2160/2120/2100 power devices.
4.1.
HARDWARE DESCRIPTION
The EB-8001 amplifier contains six channels of audio amplification. The -02 version, using DDX-2160 power devices, is rated at up to 6x80W RMS. The EB-8001 includes one DDX-8001 digital audio processing IC and three DDX-2160/2120/2100 power devices. The EB-8001 is shipped with jumpers configured for S/PDIF input operation. Figure 4 shows the physical location of connectors. A CD containing the Graphical User Interface (GUI) is included with the board. The GUI communicates I2C serial information through the PC’s parallel port in accordance with the protocol detailed in Section 2 of the DDX-8001 datasheet. Additionally, control and status bits are sent and monitored via the parallel port. The hardware circuit is described on Sheet 2 of the schematic. It consists of a DB-25 connector with a one to one pin mapping from the PC’s parallel port and several inverting buffers to send and receive information.
4.2.
DDX-8001 OVERVIEW
The DDX-8001 Controller is a 3.3V digital integrated circuit that converts serial PCM digital audio signals into PWM drive signals. PWM output formats include DDX® Ternary and Binary. These PWM signals are then amplified by the DDX-2160, DDX-2120, DDX-2100 or DDX-2060 for audio output. The DDX-8001 provides volume, bass, treble, EQ, muting and limiter functions under I2C control. A block diagram of the DDX-8001 is shown in Figure 2.
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
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EB-8001 SA LRCKI BICKI SDI12 SDI34 SDI56 SDI78
IC
SERIAL DATA IN
DDX SYSTEM CONTROL MIX TREBLE, BASS, EQ
VOLUME LIMITING
SERIAL DATA OUT
POWER-DOWN
PLL XTI
MVO
2
CHANNEL MAPPING
PLLB
SCL SDA
CKOUT
PWDN
OUT1A/B OUT2A/B OUT3A/B OUT4A/B OUT5A/B OUT6A/B OUT7A/B OUT8A/B LRCKO BICKO SDO12 SDO34 SDO56 SDO78
EAPD
Figure 2: DDX-8001 Block Diagram
4.3.
DDX-2160/2100/2120/2160 OVERVIEW
The DDX-2160/2120/2100 Power Devices are dual channel H-Bridges that can deliver over 80 watts per channel of audio output power. The DDX-2160/2120/2100 includes a logic interface, integrated bridge drivers, high efficiency MOSFET outputs and protection circuitry. Two logic level signals per channel are used to control highspeed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to Apogee's patented damped ternary PWM. The DDX-2160/2120/2100 includes over-current, thermal and under-voltage lockout with automatic recovery. A thermal warning status is also provided.
INL[1:2]
OUTPL
INR[1:2]
Logic I/F and Decode
VL PWRDN
Left H-Bridge OUTNL
TRI-STATE
Protection Circuitry
FAULT TWARN
OUTPR
Right H-Bridge
Regulators
OUTNR
Figure 3. DDX-2160/2120/2100 Block Diagram
5. SCHEMATIC DESCRIPTION 5.1.
DIGITAL SIGNAL PROCESSING (SHEET 4)
The DDX-8001 converts pulse code modulated (PCM) digital audio input signals into DDX® pulse-widthmodulated (PWM) digital output signals. Six of the eight available input channels are connected to three stereo Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
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EB-8001 output power devices. Signals from I2S or the S/PDIF receiver are applied as inputs to the DDX® processor. Output PWM signals from the DDX® processor are applied to the inputs of the DDX® power stage. The DDX-8001 has eight independent volume control registers that have an adjustment range from +48dB to -78dB in 0.5 dB increments. Each channel also has an associated Trim adjustment of +10dB to -10dB. In addition, the Master Volume is adjustable from 0dB to –127dB in 0.5dB steps. Tone control registers boost or cut treble and bass by +/-12dB, in 2dB steps. EQ filters are IIR biquads, configurable by programmable coefficients. The DDX-8001 GUI software is provided to simplify generation and download of the filter coefficients, enabling on-thefly equalization changes.
5.2.
POWER OUTPUT (SHEETS 5, 6, 7)
The DDX-2160/2120/2100 provides power amplification by translating logic level PWM signals into power level signals. These power level signals are applied to passive two-pole lowpass filters, and provide low distortion audio power to the load. The output filter functions to prevent unwanted high frequency switching signals from reaching the load. The output filters on Sheets 5, 6 and 7 are designed for 6Ω loads. A thermal warning (TWARN) signal is output by the DDX-2160/2120/2100 if the junction temperature exceeds 130°C. The thermal warning is indicated on the GUI by a red spot in the Power Status area on the Control tab. The DDX-2160/2120/2100 automatically shuts down when it reaches 150°C and automatically restarts after cooling ~25C.
5.3.
SUPPLY VOLTAGE, REGULATORS (SHEET 9)
The EB-8001 contains onboard 5V and 3.3V power regulation for logic circuitry. Separate power supply inputs are available for the logic supply as well as the output power section. Input protection is provided for the amplifier by diode D8. This diode will protect from overvoltage and reverse power connection. Reset Supervisor U18 is used for power-on-reset and power-off sequencing. Applying Logic Power, VL, then Output Power, VCC, is the preferred power on sequence. Removing VCC then VL is the preferred power off sequence.
5.4.
HEADERS JUMPERS AND SWITCHES (SHEETS 1, 2, 3, 4, 9)
Sheet 1: J2 is the PSC Select Jumper. Shorting pins 1 & 2 selects Power Supply Correction (see DDX-8001 Datasheet, Section 3.9.1). Shorting pins 3 & 4 connects Left Analog Input to the ADC. Sheet 2: Header J4 selects PC control when pins 1 & 2 and 3 & 4 are shorted. Sheet 3: J6 is the Oscillator Select jumper. Shorting pins 1 & 2 connects the onboard 12.288MHz crystal oscillator to the MCLK line. Sheet 4: Header J6 has the Serial Output Data for external use. Sheet 9: Header J10 is the RB-86xxx Interface. Header J13 has eight channels of DSD inputs. Header J14 is the External I2S Input connector. Header J12 is the External I2S Select. Momentary pushbutton SW1 provides a global RESET signal.
5.5.
S/PDIF INPUT/OUTPUT INTERFACE (SHEET 3)
The DDX-8001 controller’s data interface is serial I2S for inputs and outputs. The EB-8001 input accommodates coaxial or optical S/PDIF digital audio interfaces using a digital audio receiver IC. Either input may be used. S/PDIF interfaces will support sample rates from 32kHz to 96kHz. LED D7 is the S/PDIF Unlock indicator.
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
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EB-8001 5.6.
ANALOG INPUT (SHEET 1)
Line level analog data is converted to I2S -formatted, 24 bit digital data. A jumper must be installed on J12, pins 1 & 2, 5 & 6, 7 & 8 and 9 & 10 to connect the ADC data to the DDX-8001. The GUI is used to select the ADC, which is on Channels 3 and 4, as the input source.
5.7.
LINE OUTPUTS (SHEETS 10 & 11)
DDX-8001 output channels 6, 7 and 8 are processed and buffered for use as Subwoofer, Left and Right Line Outputs, respectively. These analog outputs can then be used for inputs to analog recorders, processors or amplifiers.
5.8.
HEADPHONE AMPLIFIER (SHEET 8)
Plugging headphones into J9 automatically disables the speaker outputs and enables the headphone amplifier. Standard 32Ω headphones can then be driven at levels up to 800mW.
6. ADDITIONAL INFORMATION 6.1.
PERFORMANCE MEASUREMENTS
Class D amplifiers produce measurable switching noise outside the audio bandwidth. Apogee's DDX® amplifier uses a patented PWM modulation scheme that significantly reduces this noise compared to typical Class D designs. However, in order to obtain accurate performance measurements in the audio band (i.e., 20Hz to 20kHz), additional filtering is required. The Typical Performance data was taken using an AES17 brick wall measurement filter with a break frequency of 20kHz. This type of filter is often provided as part of audio measurement systems. Typical performance measurements for the evaluation board are shown in Figures 9 through 18.
Details are subject to change without notice.
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EB-8001
Logic, Analog Power (12V)
Amp Power (35V)
PC Parallel Connector Reset Switch
Speaker Connector
Headphone Output
DSD Input
RB-86 Interface Line Level Outputs
S/PDIF Inputs Coax
Analog Inputs
Optical
Figure 4. : Assembly Drawing
Details are subject to change without notice.
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EB-8001 6.2.
CONFIGURE EB-8001 FOR 2-CHANNEL SPDIF INPUT:
(1 to 6 Channel Output, I2C Control from PC)
6.2.1. Jumper Settings: • •
J12 – Short pins 3-4, 5-6, 7-8 and 9-10 to connect SPDIF Receiver I2S output to DDX-8001 I2S input. J14 – Short pins 1-2 and 3-4 to ground unused I2S inputs.
6.2.2. Speaker Connections: •
Connect 6Ω (recommended) speakers to J20. For headphone operation, see Section 6.3.76.
6.2.3. Connection to Computer: •
Use the supplied parallel port cable to connect J3 to PC parallel port.
6.2.4. Power Connections: •
•
Connect 12V and GND to J15. The square pad on the underside of the pc board is pin 1 and should receive 12V. In other words, facing the wire openings of the green Phoenix connector, Ground goes in the left-hand opening, and +12V goes in the right. Connect 10V to 35V to J11 pins 3 and 4, and GND to J11 pins 5 and 6. The square pad on the underside of the pc board is pin 1. Pin 1 should be left unconnected. Pin 2 can be connected to GND or left unconnected. Be sure to apply the +12V to the board BEFORE applying the 10 to 35V.
6.2.5. Configuring GUI Software: • • • •
• • • • • • • •
Run the DDX-8001ControlPanel.exe software. Go to “Registers” page of GUI. Click the “Power Up” button to start the DDX-8001. Click “Test Board I/O”, If “passed” it is OK, proceed to next step. If “failed” then perform manual board reset by pressing SW1 button and try again, if still “failed” then make sure connections are OK. Go to “I/O” page of GUI. Select S/PDIF source in Input Interface section. Optical S/PDIF link is the default. If S/PDIF source is Coax, make this selection in the S/PDIF Connector section. Sampling rates of 32, 44.1 and 48kHz and MCLK=256Fs is the default. For other values, update Sample Rate and Clock in the Input Interface area. Go to “Control” page of GUI. S/PDIF delivers only two channels of audio, on Channels 1 and 2. To evaluate all 6 channels, select Channel Source of Ch1 for Channels 3 and 5, and Ch2 for Channels 4 and 6, for example. Click “Ext Amp Power Up” to enable DDX-21xx power devices. Increase “ALL” master volume control from -127.5dB to the desired level, as high as 0dB. Additional gain, up to +58dB, is available by adjusting individual channel volumes and Trim.
6.2.6. Headphone Connections and Operation: •
Plug Stereo Headphones into J9. This automatically disables the power devices driving the speakers.
Details are subject to change without notice.
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EB-8001 6.3.
CONFIGURE EB-8001 FOR 2-CHANNEL ANALOG INPUT:
(1 to 6 Channel Output, I2C Control from PC)
6.3.1. Jumper Settings: • • •
J2 – Short pins 3-4 to select two channel analog input. J12 – Short pins 1-2, 3-4, 5-6, 7-8 and 9-10 to connect SPDIF Receiver I2S output to DDX-8001 I2S input. J14 – Short pins 1-2 and 3-4 to ground unused I2S inputs.
6.3.2. Speaker Connections: •
Connect 6Ω (recommended) speakers to J20. For headphone operation, see Section 6.3.7.
6.3.3. Analog Input Connections: •
Connect line level analog inputs to RCA connectors on J1.
6.3.4. Connection to Computer: •
Use the supplied parallel port cable to connect J3 to computer parallel port.
6.3.5. Power Connections: •
•
Connect 12V and GND to J15. The square pad on the underside of the pc board is pin 1 and should receive 12V. In other words, facing the wire openings of the green Phoenix connector, Ground goes in the left-hand opening, and +12V goes in the right. Connect 10V to 35V to J11 pins 3 and 4, and GND to J11 pins 5 and 6. The square pad on the underside of the pc board is pin 1. Pin 1 should be left unconnected. Pin 2 can be connected to GND or left unconnected. Be sure to apply the 12V to the board BEFORE applying the 10 to 35V.
6.3.6. Configuring GUI Software: • • • •
• • • • • •
Run the DDX-8001ControlPanel.exe software. Go to “Registers” page of GUI. Click the “Power Up” button to start the DDX-8001. Click “Test Board I/O”, If “passed” it is OK, proceed to next step. If “failed” then perform manual board reset by pressing SW1 button and try again, if still “failed” then make sure connections are OK. Go to “I/O” page of GUI. Select ADC (Analog to Digital Converter) source in Input Interface section. Go to “Control” page of GUI. The ADC delivers only two channels of audio, on Channels 3 and 4. To evaluate all 6 output channels, select Channel Source of Ch3 for Channels 1, 3 and 5, and Ch4 for Channels 2, 4 and 6, for example. Click “Ext Amp Power Up” to enable DDX-21XX power devices. Increase “ALL” master volume control from -127.5dB to the desired level, as high as 0dB. Additional gain, up to +58dB, is available by adjusting individual channel volumes and Trim.
6.3.7. Headphone Connections and Operation: •
Plug Stereo Headphones into J9. This automatically disables the power devices driving the speakers.
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
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EB-8001 7. GRAPHIC USER INTERFACE (GUI) FOR THE EB-8001 7.1.
GUI: CONTROL TAB
The Control tab contains Volume, Tone, EQ, Muting and Limiter settings, Filtering and Scaling, QSurround 5.1, Gain and Limiting, Bass Management, Thermal and Headphone Status, Max Power Correction and AM Mode Enable. Detailed GUI information is available under the Help pulldown.
Figure 5 –GUI: Control Tab
Details are subject to change without notice.
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EB-8001 7.2.
GUI: I/O TAB
The I/O tab contains Input and Output Interface configuration. PWM Timing can be adjusted to improve THD and Crosstalk performance with certain connections.
Figure 6 –GUI: I/O Tab
Details are subject to change without notice.
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EB-8001 7.3.
GUI: REGISTERS TAB
Direct Register Access allows writing or reading individual registers’ contents. Filter, Scaling and Mixing coefficients, explained in Section 5 of the DDX-8001 datasheet, can be entered from their respective areas. Finally, PC Port address and board I/O can be tested. The board can be powered up or down, or reset in the Direct Device Access and Diagnostics area. Filter Coefficients can also be created by the Filter Editor (Refer to 7.4, Filter Editor).
Figure 7 – GUI: Registers Tab
Details are subject to change without notice.
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EB-8001 7.4.
GUI: FILTER EDITOR TAB
Up to 10 filters can be programmed for each of the 8 channels. Set the frequency and gain by dragging the round filter point with the mouse, or by clicking on the knobs and dragging up or down. Checking the Filter Coefficient Link box allows all eight (8) channels to share a single set of filter data. If a given filter is not available as a userdefined filter (due to the effective EQ mode), that filter will be disabled (grayed-out buttons and knobs) and the frequency response curve will not be affected by the settings for that filter.
Figure 8 – GUI. Filter Editor Tab
Details are subject to change without notice.
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EB-8001 8. EB-8001 SCHEMATIC: +5V
+12VA
R2 100K U1A 3
INL
4.7UF
R135
+
R3 AGND
D2 D1N4148
2
R5 100K
-
4
10UF
91 0000-0603
V-
AGND
3
470PF
+35V C15
R7
J1
634
R136 10K 0000-0603 5%
1 3 R9 100K
U1B +
7
OUT D6 D1N4148
AGND
6
R13 100K
-
R11
C1 1UF 16VDC 1206
U2
C16 10NF + X7R EIA0603
M1 M0 FLT+ MCLK REF_GND VL VA SDOUT AINR GND VQ VD AINL SCLK RST LRCK
1 2 3 4 5 6 7 8
+3.3V
M1 M0
MCLK
MCLK
SDATA_ADC
+3.3V
C201 R6 100NF 10K 0000-0603 AGND SDATA_ADC
VD
BICK LRCK
BICK LRCK
CS5341
C17 1UF 16VDC 1206
AGND
L31 600 ohm@100mhz 1 2 EIA0805
AGND AGND
D4 D1N4148
D9 D1N4148
AGND
C11 2.2nF
AGND
AINR
10UF
V-
C20 2.2nF
NE5532ADR
AGND
2 4 PSC SELECT
C19
91 0000-0603
4
D3 D1N4148
+5VA
AGND
V+
5
4.7UF R12 10K 0000-0603 5%
J2
AINL
8
D5 D1N4148
47UF C203
AGND
R8 0
R10 100K
C18
C14 1UF 16VDC 1206
+
+5VA
100UF
+12VA
AGND
C13 10NF X7R EIA0603
+
2 1
AINR
C12
INR
M1 M0 16 15 14 13 12 11 10 9
+5VA
AGND
+
AGND
C10 1UF 16VDC 1206
+
AGND
ANALOG IN
C3 2.2UF 6.3VDC EIA3216_A
+
NE5532ADR
AGND
C4 10NF X7R EIA0603
AGND
C9 10NF X7R EIA0603
47UF C202
VD
5.1 0000-0603
AGND
AINL
1
OUT R4 10K 0000-0603 5%
C8
R1
+5VA
C2 100NF
C6 100NF L3 600 ohm@100mhz 1 2 EIA0805
8
D1 D1N4148
C7
C5
+ 100UF
V+
5% 0000-0603 10K
+5VA
L1 600 ohm@100mhz 2 1 EIA0805
+12V
L2 600 ohm@100mhz 1 2 EIA0805
RESET
D10 D1N4148
RESET
AGND AGND
C21
AGND
470PF R14 634
Sheet 1. Analog Input C22 Y 5V
100NF EIA0603
+3.3V U3A
14
1
2 74LVX14
7
U4A 1
J3 nAUTOFD
14
nERROR
15 16
nSELECT
17 18 19 20 21 22 23 24 25
14 15 16 17 18 19 20 21
1 2 3 4 5 6 7 8
9 22 10 23 11 24 12 25 13
1 2
D0
3
D1
4
D2
5
D3
PWDN
74ACT14
nSTROBE
R15 10K 0000-0603
J4 U4B 4
6
SDA
3
PC_SCL
1 3
2 4
SCL
I2C SELECT
74ACT14
7 8
U4C
9 10
74ACT14
11
R137
12
PC CONTROL: SHORT J1 PINS 1-3, 2-4. 5
HP_EN
7
U4D
+5V 10K 0000-0603
13
14
6
nACK
8
9
U3F
NVERROR
74ACT14
CONN DSUB 25-P
U4E 11
10
U3B
14
3
D3
74ACT14
12
1K 0000-0603
DSD_SEL
74LVX14
7 R21 10K 0000-0603
RESET
74LVX14
14
13
R16 4
7 R17 10K 0000-0603
2
C23
+5V
U4F
14
12 74ACT14
U3E
100NF Y 5V EIA0603
U3C D1
13 7
R18 10K 0000-0603
14
11
D2
R19 10
7
74LVX14
14
5
6
TWARN
PC_SDA 3.9K 0000-0603
U3D
14
9 R20 10K 0000-0603
M0
74LVX14
7
8 7
M1
74LVX14
Sheet 2. PC Interface Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 14 of 24
EB-8001 C24 Y5V
+5V
100NF EIA0603
2
+5V R22
C26 100NF EIA0603 Y 5V
1
C25
OPT_DATA
2 10nF
3
U6 Vcc
SPDIF IN OPTICAL
GND DATA
1 C27 L5 1 2 EIA0805 +5V 600 ohm@100mhz C29 100NF
3
GP1F31R
C33 SPDIF_COAX_IN
FILT
9
RESET
10 C31 2.2nF
RMCK
11
RERR
12
C32 47nF
L6 1 2 EIA0805
AGND
8
AGND
J5 S/PDIF 1
VA+
7
R25 3K
RXP1
13
RXP6 RXP5 H/S VL+ DGND OMCK U INT SDOUT OLRCK
RXP2
14
OSCLK
RXP3
600 ohm@100mhz
PC_SCL
RXP4
28
R24
27
+5V 4.7K
26 25
+3.3V
23 22 21 20 OMCK
19
SDATA_SPDIF
18 R26
17
2
R29 75R
LRCK
BICK
BICK
0 R27
15
OSC SELECT OMCK
1 2
NVERROR
0
SDATA_SPDIF
LRCK
0
16
R28 100NF X7R EIA0805
100NF C28 EIA0603 Y5V
24
CS8415A_SOFTWARE
AGND
COAX_DATA
AD1
RXN0
6
C30 1000PF NPO
SCL
AD0
RXP0
5
10nF
SDA
EMPH
4
2
PC_SDA
U5
4.7K
R23 4.7K
SOFTWARE MODE PIN DESIGNATIONS
1
L4 600 ohm@100mhz EIA0805
R30
J6 MCLK
MCLK
0
+3.3V
NVERROR
RESET
+5V
L7 1 2 EIA0805
OSC1 1 2
EN VCC GND OUT
4 3
R31 500
600 ohm@100mhz C34 100NF Y 5V EIA0603
OMCK
D7
R32 1k
3
2
1 GRN/RED
Q1 2N3904
OSC 12.288MHZ
Sheet 3. S/PDIF Input +3.3V
BICKOUT LRCKOUT SDOUT_12 SDOUT_34 SDOUT_56 SDOUT_78 CKOUT
14 PIN HEADER
C35 100NF Y 5V EIA0603
C36 100NF Y 5V EIA0603
PWDN C39
1000PF
C37 100NF Y 5V EIA0603
EAPD
1 2
+3.3V C46 100NF Y 5V EIA0603
1 2
OUT2_A OUT2_B NC GND_5 VDD3.3_5 OUT3_A OUT3_B OUT4_A OUT4_B OUT5_A OUT5_B NC GND_4 VDD3.3_4 OUT6_A OUT6_B
C49 1000PF NPO EIA0805
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
C50 100NF Y 5V EIA0603
MVO/DSD_CLK TEST_MODE VDD_3.3_1 GND_1 NC SDI_78/DSD_6 SDI_56?DSD_5 SDI_34/DSD_4 SDI_12/DSD_3 LRCKI/DSD_2 BICKI/DSD_1 VDD3.3_2 GND_2 NC RESET PLL_BY PASS
SA SDA SCL XTI PLL_FILTER NC GNDA_PLL VDD3.3_PLL CKOUT NC GND_3 VDD3.3_3 OUT8_B OUT8_A OUT7_B OUT7_A
SDATA3_DSDIN6 SDATA2_DSDIN5 SDATA1_DSDIN4 SDATA0_DSDIN3 LRCK_DSDIN2 BICK_DSDIN1
C41 100NF Y5V EIA0603 +2.5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MVO_DSDCLKIN
J21 CH1_PWM
U7
PWDN SDO_78 SDO_56 NC GND_7 VDD3.3_7 SDO_34 SDO_12 LRCKO BICKO NC GND_6 VDD3.3_6 EAPD OUT1_A OUT1_B
+3.3V
C38 100NF Y 5V EIA0603
CH1A CH1B
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
NPO EIA0805
C40 100NF Y5V EIA0603
+2.5V
+3.3V
SDOUT_34 SDOUT_12 LRCKOUT BICKOUT
2 4 6 8 10 12 14
SDOUT_78 SDOUT_56
+2.5V
J7 1 3 5 7 9 11 13
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
J22 CH2_PWM
CH2A CH2B
+2.5V +3.3V
CH3A CH3B CH4A CH4B CH5A CH5B
C44 + 100NF Y 5V EIA0603
C48 100NF Y 5V EIA0603
U7
CKOUT
R36
C52 100NF Y 5V EIA0603
R35 0 L8 600 ohm@100mhz 1 2 EIA0805
VDDA
R39 3.40K 0000-0603
C58 1200PF X7R EIA0603
C57 220PF NPO EIA0603 C59 100PF NPO EIA0603
C55 + 100NF Y 5V EIA0603
C54 22UF 6.3VDC EIA3528_B
0 OHM
0 OHM
NS
100NF
NS
C43
2.2UF
NS
U17
LM1117-ADJ
NS
R37 +3.3V
0
NS 0000-0603
SDA SCL MCK_8000
DDX-8001
R38, R33
NS
C53 100NF Y 5V EIA0603
NS
C41, C50, C52, C48, C45, C38, C35 +3.3V
R33 +2.5V C51 100NF Y 5V EIA0603
DDX-8000
DDX-8001
RESET
NS 0000-0603
2.2UF 6.3VDC EIA3216_A
NOTE: FOR U7 PL REFER FOLLOWING TABLE ALSO SEE PAGE 10 FOR ADDITIONAL NOTES
R35, R37
R34
+ C43
+3.3V C47 100NF Y 5V EIA0603
CH7A CH7B CH8A CH8B
+3.3V
C45 100NF Y 5V EIA0603
+2.5V
CH6A CH6B
+2.5V
CKOUT
C42 2.2UF 6.3VDC EIA3216_A
L9 600 ohm@100mhz 1 2 EIA0805
R38 NS
+2.5V
C56 100NF Y 5V EIA0603
GNDA
Sheet 4. DDX Digital Audio Processing Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 15 of 24
EB-8001 L10 15UH 1 2 RADIAL13.5DIA C60 100NF X7R
C61 U8
C64
C67 100NF
100NF X7R
21 22
X7R
23
+3.3V
24 R43
10K
0000-0603
25 26
EAPD
27 C74 100NF Y 5V EIA0603
28 29
CH2A
30
CH2B
31
CH1A TWARN
32
CH1B R44 10K 0000-0603
33
C78 100NF
34 35
X7R
36
+3.3V
GNDR1
NC OUTPL
VREG1
OUTPL
VREG1
VCC1P
VL
PGND1P
CONFIG
PGND1N
PWRDN
VCC1N
TRI-STATE
OUTNL
FAULT
OUTNL
TWARN
OUTPR
INLA
OUTPR
INLB
VCC2P
INRA
PGND2P
INRB
PGND2N
VREG2
VCC2N
VREG2
OUTNR
VSIG
OUTNR
VSIG
GNDS
+
+35V
GNDREF
18
R40 20 0000-1210 5%
1000UF 50VDC
17 16
C69 330PF X7R
14
1UF 50VDC C72 100NF
13 12
X7R
11
L11 15UH 1 2 RADIAL13.5DIA
C63 100NF X7R
10
R42 6.2 EIA1210 5%
C65 470NF FILM
C62 1000PF NPO
CH2+
C66 1000PF NPO
C70 100NF X7R
6 OHM CH2-
C71 1000PF NPO
C73 100NF X7R
9 8
C75
7 6
L12 15UH 1 2 RADIAL13.5DIA
1UF 50VDC C76 100NF
+35V
5
C77 100NF X7R
4 X7R
3 2 1
R45 20 0000-1210 5%
DDX-2100
C81 100NF X7R
R41 6.2 EIA1210 5%
C68
15 +
20
+
19
C84 330PF X7R
L13 15UH 1 2 RADIAL13.5DIA
R46 6.2 EIA1210 5%
R47 6.2 EIA1210 5%
C80 100NF X7R
C82 470NF FILM
C79 1000PF NPO
CH1+
C83 1000PF NPO
C85 100NF X7R
6 OHM CH1-
C86 1000PF NPO
C87 100NF X7R
Sheet 5. Left & Right Output L14 15UH 1 2 RADIAL13.5DIA
C92 100NF
C94 100NF
X7R
X7R
21 22 23
+3.3V
24 R51 0000-0603
10K
25 26
EAPD
27 C102 100NF Y 5V EIA0603
28 29
CH4A
30
CH4B TWARN
31
CH3A R52 NS 0000-0603
32
CH3B
33 C106100NF X7R
+3.3V
34 35 36
C109 100NF X7R
NC
GNDR1
OUTPL
VREG1
OUTPL
VREG1
VCC1P
VL
PGND1P
CONFIG
PGND1N
PWRDN
VCC1N
TRI-STATE
OUTNL
FAULT
OUTNL
TWARN
OUTPR
INLA
OUTPR
INLB
VCC2P
INRA
PGND2P
INRB
PGND2N
VREG2
VCC2N
VREG2
OUTNR
VSIG
OUTNR
VSIG
GNDS
18
+
+35V
GNDREF
1000UF 50VDC
17 16
R48 20 0000-1210 5%
R49 6.2 EIA1210 5%
C91 100NF X7R
C96
15 +
20
14
1UF 50VDC C100100NF
13
C97 330PF X7R
12 X7R
11 10
L15 15UH 1 2 RADIAL13.5DIA
R50 6.2 EIA1210 5%
C93 470NF FILM
C90 1000PF NPO
CH4+
C95 1000PF NPO
C98 100NF X7R
6 OHM CH4-
C99 1000PF NPO
C101 100NF X7R
9 8
C103
7 +
19
C88 100NF X7R
C89
U9
6 5 4 3
+35V
1UF 50VDC C104100NF
L16 15UH 1 2 RADIAL13.5DIA
X7R
C105 100NF X7R
2 1
DDX-2100
R53 20 0000-1210 5% C112 330PF X7R
R54 6.2 EIA1210 5%
C108 100NF X7R
R55 6.2 EIA1210 5%
C113 100NF X7R
C107 1000PF NPO C110 470NF FILM
C115 100NF X7R
CH3+
C111 1000PF NPO
6 OHM CH3-
C114 1000PF NPO
L17 15UH 1 2 RADIAL13.5DIA
Sheet 6. Left & Right Surround Outputs
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 16 of 24
EB-8001 L18 15UH 1 2 RADIAL13.5DIA
U10
C120
C122100NF
100NF X7R
21 22
X7R
23
+3.3V
24 R59
10K
0000-0603
25 26
EAPD
27 C130 100NF Y 5V EIA0603
28 29
CH6A
30
CH6B
31
CH5A
TWARN
32
CH5B R60 NS 0000-0603
33
C134100NF
34 35
X7R
36
+3.3V
GNDR1
OUTPL
VREG1
VCC1P
VL
PGND1P
CONFIG
PGND1N
PWRDN
VCC1N
TRI-STATE
OUTNL
FAULT
OUTNL
TWARN
OUTPR
INLA
OUTPR
INLB
VCC2P
INRA
PGND2P
INRB
PGND2N
VREG2
16
OUTNR
VSIG
OUTNR
VSIG
GNDS
C125 330PF X7R
1UF 50VDC C128100NF
13 12 11
X7R
C119 100NF X7R
R58 6.2 EIA1210 5%
C126 100NF X7R
9 8
C121 470NF FILM
C118 1000PF NPO
CH6+
C123 1000PF NPO
6 OHM CH6-
C127 1000PF NPO
C129 100NF X7R
L19 15UH 1 2 RADIAL13.5DIA
10
C131
7 6
L20 15UH 1 2 RADIAL13.5DIA
1UF 50VDC C132100NF
+35V
5 4 3
C133 100NF X7R
X7R
2
R61 20 0000-1210 5%
1
DDX-2100
C139 100NF X7R
R57 6.2 EIA1210 5%
C124
15 14
VCC2N
VREG2
R56 20 0000-1210 5%
1000UF 50VDC
17
OUTPL
VREG1
+
18
NC
+
20
+35V
GNDREF
+
19
C116 100NF X7R
C117
C140 330PF X7R
R62 6.2 EIA1210 5%
C136 100NF X7R
R63 6.2 EIA1210 5%
C141 100NF X7R
C137 470NF FILM
CH5+
C138 1000PF NPO
6 OHM CH5-
C142 1000PF NPO
C143 100NF X7R
L21 15UH 1 2 RADIAL13.5DIA
C135 1000PF NPO
Sheet 7. Center & Subwoofer Outputs
C144 220PF EIA0603 NPO R64
R65
R66
4.75K 0000-0603 5%
4.75K 0000-0603 5%
+3.3VA L22 600 ohm@100mhz +3.3V 1 2 EIA0805
NPO
R67
CH1B
4.75K 0000-0603 5%
10K 0000-0603 5%
R73 10K 0000-0603 5% AGND
R75
R76
R77
4.75K 0000-0603 5%
4.75K 0000-0603 5%
4.75K 0000-0603 5%
U11
C149 220PF NPO EIA0603 +3.3VA NPO
2
R83
-IN_A
3 R74 10K 0000-0603 5%
C150
5
+IN_A
AGND
R78 10K 0000-0603 5% AGND
6
+IN_B
-IN_B
PHONES_OUT_LEFT
1
+
4.75K 0000-0603 5%
4.75K 0000-0603 5%
J8
L25 600 ohm@100mhz 1 2 EIA0805
7
-
220UF 6.3V 100UF-ELEC-16V-RADIAL R80 10K 0000-0603
C157 220PF NPO NPO
C155 AGND 100PF NPO EIA0603
R79
R86 AGND
CKX-3.5-07
HP_EN
L33 600 ohm@100mhz 1 2 EIA0805
10K 0000-0603 5%
2 4 5
10K 0000-0603
AGND
R85
J9
1 3
AGND EIA0603
1 2 3 4
C151 100PF NPO EIA0603
C152
+
CH2B 4.75K 0000-0603 5%
HEADPHONE AMP OUT 32 OHM TYP LOAD
L24 600 ohm@100mhz 1 2 EIA0805
220UF 6.3V 100UF-ELEC-16V-RADIAL
OUT_B C153 220PF NPO EIA0603 NPO
AGND
-
4
R81
C154 150PF NPO EIA0603 NPO
TDA1308
OUT_A
AGND
CH2A
C156 470PF NPO EIA0603 R82 NPO
L23 600 ohm@100mhz 1 2 EIA0805
+
4.75K 0000-0603 5%
100UF 16V 100UF-ELEC-16V-RADIAL
+
4.75K 0000-0603 5%
+
+3.3VA
8
R72
CH1A
C146
C148 100NF Y 5V EIA0603
10K 0000-0603 5%
VDD
R71
R68
VSS
R70
C147 470PF NPO EIA0603 NPO
10K 0000-0603 5%
4.75K 0000-0603 C145 5% +3.3VA 150PF NPO EIA0603 NPO R69
AGND
C204
R84
1000PF NPO
10K 0000-0603 5%
+3.3VA
HP_EN
10K 0000-0603 5%
Sheet 8. Headphone Amplifier
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 17 of 24
EB-8001 JITTER REDUCTION CIRCUIT FOR DDX-8000 ONLY
RB86XXX INTERFACE
R87 0000-0603
J10
MCLK R94 NS 0000-0603
0000-0603
LRCKI R90 NS 0000-0603
RESET PWDN
3
R91 NS 0000-0603
2516-6002UB
CKOUT
CLR VCC
LRCK_INT C159 NS NPO EIA0603
U12 NS
DSDIN6 SDATA_3 DSDIN5 SDATA_2 DSDIN4 SDATA_1
1 3 5 7 9 11 13
DSD INPUT
SDATA_3 SDATA_2 SDATA_1 SDATA_0 LRCKI BICKI MCK_8000
2 4 6 8 10 12 14
2 4 6 8 10
SDATA_ADC SDATA_SPDIF LRCK BICK MCLK
SDATA_1 SDATA_0 LRCKI BICKI
1 3 5 7 9
15 1
DSD_SEL
DSD_SEL
E S
4
ZA
SDATA3_DSDIN6
12
ZC
SDATA2_DSDIN5
9
ZD
DSDIN3 SDATA_0 DSDIN2 LRCK_INT DSDIN1 BICKI
MVO_DSDCLKIN
7
ZB
SDATA1_DSDIN4
DSD_SEL
74AC157
MCK_8000
2 3 5 6 14 13 11 10 15 1
I0A I1A I0B I1B I0C I1C I0D I1D E S
EXT I2S SELECT
C163 NS Y 5V EIA0603
16
16
I0A I1A I0B I1B I0C I1C I0D I1D
U14
ZA ZB ZC ZD
8
2 4 6 8 10 12 14
J14
2 3 5 6 14 13 11 10
VCC
DSDCLKIN
GND
U13
100UF 16V 100UF-ELEC-16V-RADIAL
8
DSDCLKIN DSDIN6 DSDIN5 DSDIN4 DSDIN3 DSDIN2 DSDIN1
+3.3V C162 NS Y 5V EIA0603
+ C161
J12 1 3 5 7 9 11 13
5 C160 NS Y 5V EIA0603
NS
CLK
+3.3V C164 100NF Y 5V EIA0603
D8 36V
C165 100NF X7R EIA0805
26-60-4060
J13
6
+3.3V
+35V
1 2 3 4 5 6
POWER
1
+3.3V
R95 NS 0000-0603 CKOUT
J11
CKOUT C158 NS NPO EIA0603
R88 NS
0000-0603 R89
NC7SZ175/SC70 4 D Q
VCC
R93 NS 0000-0603
0
PC_SDA
TWARN
GND
R92 NS 0000-0603
TWARN
SDATA_1 LRCK
2 4 6 8 10 12 14 16
GND
PC_SCL TWARN
1 3 5 7 9 11 13 15
2
SDATA_0 SDATA_2 BICK
4
SDATA0_DSDIN3
7
LRCK_DSDIN2
12
BICK_DSDIN1
9
74AC157
DATA INPUT SELECTOR FOR DDX-8000/8001
EXT I2S INPUT
R98
HS1 1
220 0000-0603
50WX6-HS
R101
HS2 1
3
1 2
C166 100NF X7R EIA0805
LOGIC
+
IN
C167 100uF
2
OUT
ADJ
0V
1
+12V
U16 LM1117-ADJ
+5V 3
R97
150 0000-0805 R100 450 0000-0805
C171 100NF + Y 5V EIA0603
C172 22UF 6.3VDC EIA3528_B
+ C173 100NF Y 5V EIA0603
IN
1 C169
+ 150 0000-0805 R99 246 0000-0805
+ C174 100NF Y 5V EIA0603
100UF 16V
NS J16
3
U17 LM1117-ADJ
RESET
GND
GND
DS1233A
C180 10nF
+
IN
1 2 3 4
C176 100UF 16V 100UF-ELEC-16V-RADIAL
R103
+
R104 150 0000-0805 150 0000-0805
SW1 RESET
U7
DDX-8000
U17
LM1117-ADJ
NS
150 OHM
NS
C177
100UF
NS
C179
100NF
NS
C178
22UF
NS
R103, R104
+2.5V
DDX-8001
2
OUT
ADJ
C175 100NF Y 5V EIA0603
1
Vcc
3
4
1
+2.5V
U18
nRESET
NOTE: FOR U7 PL REFER FOLLOWING TABLE ALSO SEE PAGE 5 FOR ADDITIONAL NOTES
100UF-ELEC-16V-RADIAL
+3.3V
RESET
220 0000-0603
C170 50WX6-HS 22UF 6.3VDC EIA3528_B
+3.3V
2
R102
HS3 R96
C168 100UF 16V 100UF-ELEC-16V-RADIAL
220 0000-0603
50WX6-HS
+3.3V
2
OUT
ADJ
U15 LM1117-ADJ
1
+12V J15
C177 100UF 16V 100UF-ELEC-16V-RADIAL
+ C179 100NF Y 5V EIA0603
C178 22UF 6.3VDC EIA3528_B
Sheet 9. Configuration Jumpers, Input/Output Connectors, Power
C183 150PF
CH7A
R107
R108
R109
4.75K
4.75K
4.75K
R105 30K
R106 30K
3
+ 100UF 8 U19A +
CH7B
2
C186 150PF
-
4
C182 100NF
V+ AGND
1
OUT C185 470PF
C181
L27 600 ohm@100mhz 1 2 EIA0805
L28 600 ohm@100mhz 1 2 EIA0805
C184 47UF
R112
R113
4.75K
4.75K
4.75K
R110 10K
Line Out
9
RED
LINEOUT_R
5
WHITE
LINEOUT_SUB
2
YELLOW
J17 RCA3WAY VERTICAL C187 100PF NPO EIA0603
V-
uPC4558
R111
LINEOUT_SUB
8
AGND LINEOUT_L
1
AGND
+12V
L26 600 ohm@100mhz 1 2 EIA0805
VCC+12
AGND
AGND R114
AGND
J18
15K
1 2 3
C188 150PF
LINE OUT AGND
VCC+12 VCC+12
AGND
CH8A
R117
R118
R119
4.75K
4.75K
4.75K
C189 150PF
R115 30K
R116 30K
5
8 U19B +
V+ OUT
C191 470PF
CH8B
6
C192 150PF
-
4
7
L29 600 ohm@100mhz 1 2 EIA0805
C190 47UF
V-
uPC4558
R121
R122
R123
4.75K
4.75K
4.75K
R120 10K AGND
R124
C193 100PF NPO EIA0603
AGND
15K C194 150PF
Sheet 10. Left & Right Line Outputs Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
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EB-8001
R125 30K
AGND
CH6A
R127
R128
R129
4.75K
4.75K
4.75K
R126 30K
+ 100UF U20A 8
3
CH6B
2
C199 5600PF
-
C195
4
AGND
1
R132
R133
4.75K
4.75K
4.75K
J19
L30 600 ohm@100mhz 1 2 EIA0805
C197 47UF
VR130 10K
uPC4558
R131
LINEOUT_SUB
C196 100NF
V+
+
OUT C198 10NF
LINEOUT_SUB
VCC+12
VCC+12
AGND
1 2
SUB OUT
CON2
C200 100PF NPO EIA0603
R134 15K
AGND
AGND
VCC+12 U20B 5
8
OUT 6
AGND
-
L32 600 ohm@100mhz 1 2 EIA0805
V+
+
7 AGND
4
V-
uPC4558 AGND
Sheet 11. Subwoofer Line Out
Rear Panel View
.
CH1
11
CH1+
CH2
.
CH2+ 9
CH3+ .
CH4+
CH3
7
5
3
CH5+
CH4
.
.
1
CH6+
CH5
.
CH6
J20 PT1201
.
.
. 12 CH1-
CH2-
10
8
. CH4-
CH3-
6
. 4 CH5-
CH6-
2
.
SPEAKER
Sheet 12. Speaker Connectors Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 19 of 24
EB-8001 9. TYPICAL PERFORMANCE CHARACTERISTICS, VCC=34V, 6Ω LOADS. Apogee Technology
11/07/03 14:30:45
+5 +4 +3 +2 +1
d B r
+0
A
-1 -2 -3 -4 -5 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 Frequency Response 1W 34V 6ohm Cyan: Ch1, Green: Ch2, Yellow: Ch3, Red: Ch4, Magenta: Ch5, Blue: Ch6
Figure 9. Frequency Response Apogee Technology
11/07/03 14:36:44
1
0.5
0.2
%
0.1
0.05
0.02
0.01 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 THD vs Frequency 1W 34V 6ohm Cyan: Ch1, Green: Ch2, Yellow: Ch3, Red: Ch4, Magenta: Ch5, Blue: Ch6
Figure 10. 1W THD vs. Frequency Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 20 of 24
EB-8001
10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 100m
200m
500m
1
2
5
10
20
50
90
W EB-8001 THD vs Output Power Vcc=34V 6ohm Loads CH1: Blue CH2: Magenta CH3: Red CH4: Yellow CH5: Green CH6: Cyan
Figure 11. THD vs Power
+0 -20 -40
dBr A
-60 -80 -100 -120 -140 -160 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 -60dBFS FFT. Vcc=34V, 6ohm loads
Figure 12. FFT: -60dB, 1kHz Output Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 21 of 24
EB-8001 10. TYPICAL PERFORMANCE CHARACTERISTICS, HEADPHONE OUTPUTS. Apogee Technology
11/07/03 15:38:31
+5 +4 +3 +2 +1
d B r
+0
A
-1 -2 -3 -4 -5 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 Headphone Amp Out Cyan:Left , Green: Right,
Figure 13. Headphone Amplifier Frequency Response Apogee Technology
11/07/03 15:23:15
20 10 5
2 1 %
0.5
0.2 0.1 0.05
0.02 0.01 1m
2m
3m
4m
5m
6m
7m 8m
10m
20m
30m
40m 50m
W EB-8001 Headphone Amp Out THD vs Level with MPC off Magenta:Left , Blue: Right,
Figure 14. Headphone Amplifier THD vs. Power Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 22 of 24
EB-8001 11.
TYPICAL PERFORMANCE CHARACTERISTICS, LINE OUTPUTS. Apogee Technology
11/14/03 13:08:17
+7.5 +5 +2.5 +0 -2.5 -5 -7.5
d B r
-10 -12.5
B
-15 -17.5 -20 -22.5 -25 -27.5 -30 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 Line Out with Digital Input Red: Left, Magenta: Right, Blue: SUB
Figure 15. Line Outputs Frequency Response
0.5
0.2 0.1 %
0.05
0.02 0.01 0.006 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 Line Out THD vs. Frequency. 1Vrms output. Left: Blue Right: Red Sub: Green
Figure 16. Line Outputs THD vs. Frequency
Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 23 of 24
EB-8001 Apogee Technology
11/14/03 13:17:33
20 10 5
2 1 0.5 % 0.2 0.1 0.05
0.02 0.01 0.006 200m
300m
400m
500m
700m
1
2
3
V EB-8001 Line Out with Digital Input, MPC off Red: Left, Magenta: Right, Blue: SUB
Figure 17. Line Outputs THD vs. Output Level
Apogee Technology
02/02/04 13:55:53
+0 -20 -40 d B r
-60 -80
A -100 -120 -140 20
50
100
200
500
1k
2k
5k
10k
20k
Hz EB-8001 Line Output -60dBFS FFT
Figure 18. Line Output -60dBFS Input FFT Details are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062
voice: (781) 551-9450
CONTROLLED DOCUMENT: P_903-000043_Rev04 Data Sheet, EB-8001.doc
fax: (781) 440-9528
email:
[email protected] DRN: PRELIMINARY Page 24 of 24
