Transcript
operating at +3.3 V input voltage.
HFCT-5801
155 Mb/s Single Mode Fiber Transceiver for ATM, SONET OC-3/SDH STM-1 Part of the Avago Technologies METRAK family
The multisourced 2 x 9 footprint package style is a variation of the standard 1 x 9 package with an integral Duplex SC connector receptacle. The extra row of 9 pins provides connections for laser bias and optical power monitoring as well as providing transmitter disable function. A block diagram is shown in Figure 1.
Data Sheet
• Multisourced 2 x 9 pin-out packa 1 x 9 pin-out industry standard p • Unconditionally eyesafe laser IEC 825/CDRH Class 1 complian • Integral duplex SC connector rec with TIA/EIA and IEC standards • Laser bias monitor, power monit disable functions compliant with • Two temperature ranges: 0°C - +70°C HFCT-580IB/D -40°C - +85°C HFCT-5801A/C • Single +3.3 V power supply oper LVPECL logic interfaces • Wave solder and aqueous wash • Manufactured in an ISO 9002 cert • Considerable EMI margin to FCC
Applications • ATM 155 Mb/s links for LAN ba routers • ATM 155 Mb/s links for WAN co switches and routers • ATM 155 Mb/s links for add/dro demultiplexers • SONET OC-3/SDH STM-1 (S-1.1
Description
Features
General
• 1300 nm Single mode transceiver for links up to 15 Km
The HFCT-5801 transceiver is a high performance, cost effective module for serial optical data communications applications specified for a data rate of 155 Mb/s. It is designed to provide a SONET/SDH compliant link for intermediate reach links operating at +3.3 V input voltage. The multisourced 2 x 9 footprint package style is a variation of the standard 1 x 9 package with an integral Duplex SC connector receptacle. The extra row of 9 pins provides connections for laser bias and optical power monitoring as well as providing transmitter disable function. A block diagram is shown in Figure 1.
Applications • ATM 155 Mb/s links for LAN backbone switches and routers • ATM 155 Mb/s links for WAN core, edge and access switches and routers • ATM 155 Mb/s links for add/drop multiplexers and demultiplexers • SONET OC-3/SDH STM-1 (S-1.1) interconnections
• Compliant with T1.646-1995 Broadband ISDN and T1E1.2/98-011R1 SONET network to customer installation interface standards • Compliant with T1.105.06 SONET physical layer specifications standard • Multisourced 2 x 9 pin-out package style derived from 1 x 9 pin-out industry standard package style • Unconditionally eyesafe laser IEC 825/CDRH Class 1 compliant • Integral duplex SC connector receptacle compatible with TIA/EIA and IEC standards • Laser bias monitor, power monitor and transmitter disable functions compliant with SONET objectives • Two temperature ranges: 0°C - +70°C HFCT-580IB/D -40°C - +85°C HFCT-5801A/C • Single +3.3 V power supply operation and compatible LVPECL logic interfaces • Wave solder and aqueous wash process compatible • Manufactured in an ISO 9002 certified facility • Considerable EMI margin to FCC Class B
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ELECTRICAL SUBASSEMBLY DATA DATA DATA DATA SIGNAL DETECT DATA SIGNAL DETECT DATA DATA DATA
PIN PHOTODIODE
PREAMPLIFIER ELECTRICAL SUBASSEMBLY POST IC AMPLIFIER IC PREAMPLIFIER OPTICAL POST IC SUBAMPLIFIER IC ASSEMBLIES
PIN PHOTODIODE
OPTICAL SUBLASER ASSEMBLIES DRIVER LASER IC LASER DRIVER LASER IC TOP VIEW TRANSMIT POWER LASER BIAS DISABLE MONITOR MONITOR TRANSMIT POWER LASER BIAS
TOP VIEW
Transmitter Section DISABLE MONITOR MONITOR Transmitter Section The transmitter section of the HFCT-5801 consists of atransmitter 1300 nm InGaAsP in an eyesafe optical The section oflaser the HFCT-5801 consists of a Transmitter Section subassembly (OSA) which mates to the fiber cable. 1300 nm InGaAsP laser in an eyesafe optical subassemThe transmitter section of the HFCT-5801 consists The laser OSA is driven by custom which bly which mates to the fiber cable. TheIC laser OSA of a(OSA) 1300 nm InGaAsP laser ina an eyesafe optical differential input LVPECL logic signals isconverts driven by a custom IC which converts differential input subassembly (OSA) which mates to the fiber cable. into an analog laser drive current. LVPECL logic signals an analog drive current. The The laser OSA isinto driven by alaser custom IC which laser bias monitor circuit is shown in Figure 2a, the power converts differential input LVPECL logic The laser bias circuit is shown in signals Figure monitor circuit in monitor Figure 2b. into an analog laser drive current. 2a, the power monitor circuit in Figure 2b. The laser bias monitor circuit is shown in Figure VCC 2a, the power monitor circuit in Figure 2b. VCC
10 R
DUPLEX SC RECEPTACLE
3k
LMON (+) PIN 6
3k 3k
LMON (+) LMON PIN(-)6 PIN 5
3k
LMON (-) PIN 5
10 R
tion
VCC
Other Members of Avago SC Duplex 155 Mb/s Product
VCC 30 k
VREF 1.28 V
30 k VEE
Figure 2b. Power Monitor CircuitV
EE
Figure 2b. Power Monitor Circuit
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to a circuitDetect providing post-amplification Receiver ReceiverSignal Signaland Detect quantization, optical signal detection. Signal Detect is a basic fiber failure indicator. This Signal Detect is a basic fiber failure indicator. is a is a single-ended LVPECL output. As the This input Receiver Signal Detect single-ended LVPECL output. As the input optical power optical poweris aisbasic decreased, Signal Detect This will Signal Detect fiber failure indicator. is decreased, Signal Detect will switch from high to low switch from high to low (deassert point) somewhere is a single-ended LVPECL output. As the input (deassertsensitivity point) somewhere sensitivity andAs the between and thebetween no light input level. optical power is decreased, Signal Detect will no light input level. As the input optical power is increased the input optical power is increased from very low switch from high to low (deassert point) somewhere from very low Detect levels, Signal Detect will switch back from levels, Signal will switch back from lowAs to between sensitivity and the no light input level. low to high (assert point). The assert level will be at least high (assert point). The assert level will be at least the input optical power is increased from very low 0.5 dB dB higher thethe deassert level.level. 0.5 higherthan than levels, Signal Detect willdeassert switch back from low to
The HFCT-5801 isfor specified for operation over Transceiver Specified Wide for Temperature Range The HFCT-5801 is specified operation over normal normal commercial temperature range of 0° to Operation commercial temperatureorrange of 0° totemperature +70°C (HFCT+70°C (HFCT-5801B/D) the extended The HFCT-5801 is specified for operation overto 5801B/D) or thetoextended temperature range of -40° range ofcommercial -40° +85°C (HFCT-5801A/C). normal temperature range of 0° +85°C (HFCT-5801A/C). Characterization of the partsto has +70°C (HFCT-5801B/D) the extended Characterization of the theor parts has beentemperature performed been performed over ambient operating temperature range of an -40° to +85°C (HFCT-5801A/C). over ambient operating temperature range in rangethe in airflow of 2 m/s. an airflow of 2 m/s. Characterization of the parts has been performed
Figure 2a. Laser Bias Monitor VEE
POWER 3k MONITOR PIN 9 POWER EF TO VEE) (R 3k MONITOR PIN 9 (REF TO VEE)
Receiver Section Receiver Sectionutilizes an InGaAs PIN photodiode The receiver mounted together with PIN a transimpedance The receiver utilizes an InGaAs photodiode mounted Receiver Section preamplifier IC in an OSA. This OSA connected together with a transimpedance preamplifier IC in an OSA. The receiver utilizes an InGaAs PINisphotodiode to a circuit providing post-amplification This OSA is connected to a circuit providing post-amplifimounted together with a transimpedance quantization, and signal detection. cation quantization, andOSA. optical signal detection. preamplifier IC in optical an This OSA is connected
high (assert point). for The assert level willRange be atOperaleast Transceiver Specified Wide Temperature Transceiver Specified Wide Temperature Range 0.5 dB higher than the deassert level. Operation
VEE
Figure 2a. Laser Bias Monitor
DUPLEX SC RECEPTACLE
VREF 1.28 V
over ambient operating temperature range in Other the Members of Agilent SC Duplex Family an airflow of 2 m/s. 155 Mb/s Product Family • HFCT-5805, 1300 nmnm single mode transceiver for links • HFCT-5805, Other Members of1300 Agilent SC single Duplex mode transceiver up links to 15 km. The15 part is based on the 1 x 9 industry for up to km. The part is based on 155 Mb/s Product Family standard package and has anpackage integral and duplex SC the 1 x 9 industry standard • HFCT-5805, 1300 nm single mode transceiver connector receptacle has an integral duplex SC connector for links up to 15 km. The part is based on receptacle the 1 x 9 industry standard package and has an integral duplex SC connector receptacle
10-2 10-2
LINEAR EXTRAPOLATION LINEAR EXTRAPOLATION OF OF 10-7 DATA 10-4 THROUGH 10-7 DATA 10-4 THROUGH BASED BASED ON ON
10-4 10-4 ACTUAL ACTUAL DATADATA 10-5 10-5 10-6 10-6 10-7 10-7 10-8 10-8 -9 10-9 10-10 10-11 10-10 10-12 10-11 10 10-12 -1310-13 10-14 -14 10-1510-15 10 10 -5 -4 -5 -4 -3 -3 -2 -2 -1 -1 0 10 21 23 BIT ERROR RATIO
BIT ERROR RATIO
10
-3 10-3
3
fiber-optic transceiver performance, especially fiber-optic transceiver performance, especially thethe of VCC for this transceiver is accomplished by using the receiver circuit. Proper power supply filtering receiver circuit. Proper power supply filtering of of recommended, separate filter circuits shown in Figure 4 transceiver is accomplished by using thisthis transceiver is accomplished by using VCCVfor CC for for the transmitter and receiver sections. These filter cirrecommended, separate filter circuits shown thethe recommended, separate filter circuits shown in in cuits suppress VCC noise over a broad frequency range, Figure 4 for transmitter receiver sections. Figure 4 for thethe transmitter andand receiver sections. this prevents receiver sensitivity degradation due to VCC These filter circuits suppress noise over These filter circuits suppress VCCVCC noise over a a noise. It is recommended that surface-mount components broad frequency range, prevents receiver broad frequency range, thisthis prevents receiver be used. Use tantalum capacitors for the 10 µF capacitors sensitivity degradation noise. It is sensitivity degradation duedue to to VCCVCC noise. It is and monolithic, ceramic bypass capacitors for the 0.1 µF recommended surface-mount components recommended thatthat surface-mount components be be capacitors. Also, it is recommended that a surface- mount used. tantalum capacitors used. UseUse tantalum capacitors for for thethe 10 10 µF µF capacitors monolithic, ceramic bypass capacitors capacitors andand monolithic, ceramic bypass capacitors
Figure 3. Relative Optical Power - dBm. Figure 3. Relative InputInput Optical Power - dBm. Avg.Avg.
Applications Information Applications Information Applications Information
Typical Performance of Receiver versus Input Typical BERBER Performance of Receiver versus Input
Typical BER Performance Optical Power Level of Receiver versus Input Optical Optical Power Level HFCT-5801 transceiver operated TheThe HFCT-5801 transceiver cancan be be operated at at Power Level
Rx Rx NO INTERNAL NO INTERNAL CONNECTION CONNECTION
Tx Tx NO INTERNAL NO INTERNAL CONNECTION CONNECTION
Bit-Error-Rate conditions other than required Bit-Error-Rate conditions other than thethe required TOP TOP VIEWVIEW The HFCT-5801 canATM beForum operated at Bit-Error-10 BER xtransceiver 10-10 of the Forum 155.52 Mb/s BER = 1=x110 of the ATM 155.52 Mb/s Rate conditions other than the The required BER trade-off = 1 trade-off x 10-10of of of Physical Layer Standard. The typical Physical Layer Standard. typical the ATM Forum 155.52 Mb/s Physical Layer Standard. The BER versus Relative Input Optical Power is shown Rx RxTx Tx Tx Tx Rx Rx BER versus Relative Input Optical Power is shown typical BER versus Relative Input Optical PowVCCT VCCTTD TDTD TDVEET VEET VEER VEERRD RDRD RDSD SDVCCR VCCR in trade-off Figure 3.ofThe Relative Input Optical Power in Figure 3. The Relative Input Optical Power in in 18 1817 1716 1615 1514 1413 1312 1211 1110 10 er is dB shown in Figure 3.toThe Input Optical Power is referenced toRelative the actual sensitivity ofinthe dB is referenced the actual sensitivity of the dB isdevice. referenced toBER the actual sensitivity of the device. For conditions better than 10,-10, device. ForFor BER conditions better than 1 x 110x-10 BER conditions better than 1 x 10-10, more input signal is LMONLMON LMONLMON more input signal is needed (+dB). more input signal is needed (+dB). PMONPMON TxDISTxDIS needed (+dB). NC NCNC NCNC NCNC NC(-) (-)(+) (+) NC NC 5 56 67 78 89 9 1 3 4 2 1 3 4 2 Recommended Circuit Schematic Recommended Circuit Schematic Recommended Schematic order to ensure proper functionality of the In In order to Circuit ensure proper functionality of the HFCT-5801 a recommended circuit is provided HFCT-5801 a recommended circuit is provided in in In order to ensure proper functionality of the HFCT-5801 Figure 4. When designing the circuit interface, Figure 4. When designing the circuit interface, a recommended circuit is provided in Figure 4. When dethere a few fundamental to follow. there are acircuit few fundamental to follow. signing theare interface, thereguidelines areguidelines a few fundamental For example, in the Recommended Circuit Schematic For example, in the Recommended Circuit Schematic guidelines to follow. For example, in the Recommended figure differential data lines should be treated figure thethe differential data lines should be treated Circuit Schematic figure the differential data lines should as 50 ohm Microstrip or stripline transmission as 50 ohm Microstrip or stripline transmission be treated as 50 ohm Microstrip or stripline transmission lines. This help minimize parasitic lines. This willwill help to to minimize thethe parasitic C2 C8 C1 C7C1 C7 C2 C8 lines. This will help to minimize the parasitic inductance inductance and capacitance effects. inductance and capacitance effects. Proper VCC VCC and capacitance effects. Proper termination of theProper diftermination of will the differential data signals termination of the differential data signals willwill L1 L2 L1 L2 ferential data signals prevent reflections and ringing R2R3 R3 R2 VCC VCC prevent reflections and ringing which would prevent reflections and ringing which which would compromise the signal fidelity and would generC3 C4 C3 C4 TERMINATER5 R5R7 R7 TERMINATE compromise signal fidelity generate compromise thethe signal fidelity andand generate LOCATE LOCATE R1 R1C5 C5 R4 R4 AT PHY ate unwanted electrical noise. Locate termination at the AT PHY FILTER FILTER DEVICE DEVICE unwanted electrical noise. Locate termination unwanted electrical noise. Locate termination at at C6 C6 received signal end of the transmission line. The length AT VCC AT VCC INPUTS INPUTS the received signal end of the line. the received signal ofshort the transmission line. PINSPINS TERMINATE TERMINATE AT AT of these lines should beend kept andtransmission of equal length. R6 R6 R8 R8 FIBER-OPTIC FIBER-OPTIC The length of these lines should be kept short and The length of these lines should be kept short and R9 R9 TRANSCEIVER TRANSCEIVER For the high speed signal lines, differential signals should INPUTS INPUTS of equal length. the high signal lines, of used, equal length. ForFor thesignals, high speed signal lines, be not single-ended andspeed these differential R10 R10 differential signals should be used, not single-ended differential signals should be used, not single-ended signals need to be loaded symmetrically to prevent unbalTD TD RD RD RD RD SD SD VCC VCC TD TD signals, these differential signals need to signals, andand these differential signals need to be anced currents from flowing which will cause distortion in be loaded symmetrically to prevent unbalanced currents NOTES: loaded symmetrically to prevent unbalanced currents NOTES: the signal. THE SPLIT-LOAD TERMINATIONS LVPECL SIGNALS TERMINATIONS FOR FOR LVPECL SIGNALS from flowing which cause distortion in the THE SPLIT-LOAD from flowing which willwill cause distortion in the TOLOCATED BE LOCATED AT INPUT THE INPUT OF DEVICES RECEIVING NEEDNEED TO BE AT THE OF DEVICES RECEIVING Maintain a solid, low inductance ground plane for returnsignal. signal. THOSE LVPECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT THOSE LVPECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT ing signal currents to the power supply. Multilayer plane BOARD W MICROSTRIP SIGNAL PATHS BE USED. BOARD WITHWITH 50 W50 MICROSTRIP SIGNAL PATHS BE USED. Maintain aboard solid, inductance ground plane Maintain a solid, low inductance ground plane for == R10 R4==R4 R6==R6 R8==R8R10 82= 82 printed circuit islow best for distribution of VCC, re-for R1 =R1 R2 =R2 R3==R3 R5==R5 R7==R7R9==R9 130= 130 returning signal currents to the power supply. returning signal currents to the power supply. turning ground currents, forming transmission lines and C1 =C1 C2==C2 10=µF10 µF 100 nF Multilayer printed circuit board is best C4==C4 C7==C7 C8==C8 100=nF Multilayer plane circuit board is best for for C3 =C3 shielding, Also, itplane isprinted important to suppress noise from 0.1 µF. C5 =C5 C6==C60.1=µF. distribution of V , returning ground currents, distribution of V , returning ground currents, CC L1 = L2 = 3.3 µH COIL OR FERRITE INDUCTOR. CC L1 = L2 = 3.3 µH COIL OR FERRITE INDUCTOR. influencing the fiber-optic transceiver performance, esforming transmission lines and shielding, Also, it forming transmission lines and shielding, Also, it pecially the receiver circuit. Proper power supply filtering Figure 4. Recommended Circuit Schematic is important to suppress noise from influencing 4. Recommended Circuit Schematic is important to suppress noise from influencing thetheFigure 3
3
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coilfor inductor 3.3capacitors. µH be used. Also, Ferriteitbeads can be used the 0.1ofµF is recommended to that replace the coil inductors when using quieter VCCµH supa surface- mount coil inductor of 3.3 be plies, but a coil inductor is recommended over a ferrite used. Ferrite beads can be used to replace the coil bead. All power supply components need to be placed supplies, but a inductors when using quieter VCC physically next to the VCC pins of the receiver and transcoil inductor is recommended over a ferrite bead. mitter. Use a good, uniform ground plane withtoa minimum All power supply components need be placed number of holes to provide a lowinductance ground curphysically next to the VCC pins of the receiver and rent return for theUse power supply uniform currents. ground plane transmitter. a good, a minimum number of holes to provide a lowIn with addition to these recommendations, Avago’s Applicainductance ground current return for the power tion Engineering staff is available for consulting on best supply currents. layout practices with various vendors mux/demux, clock generator and clock recovery circuits. Avago hasAgilent’s particiIn addition to these recommendations, pated in several reference design studies and is prepared Application Engineering staff is available for to consulting share the findings of these studies with interested cuson best layout practices with various tomers. Contact your local Avago sales representative to vendors mux/demux, clock generator and clock arrange for this service. recovery circuits. Agilent has participated in several reference design studies and is prepared Evaluation Circuit Boards
20.32 (0.8)
2 x Ø 1.9 ± 0.1 (0.075 ±0.004)
33.02 (1.3)
2.54 (0.1)
18 x Ø 0.8 ± 0.1
(0.032 ±0.004) to share the findings of these studies with 2.54 Evaluation circuit boards areContact availableyour fromlocal Avago’s Apinterested customers. Agilent (0.1) plication Engineering staff.to Contact yourfor local Avago sales sales representative arrange this service. TOP VIEW representative to arrange for access to one if needed. Evaluation Circuit Boards Evaluation Solder circuit boards are available from Figure 5. Recommended Board Layout Hole Pattern Recommended and Wash Process Agilent’s Application Engineering staff. Contact The HFCT-5801 is compatible industry standard wave your local Agilent sales with representative to arrange or for hand solder processes. A drying cycle must be com- Recommended Solder Fluxes and Cleaning/Degreasing access to one if needed. pleted after wash process to remove all moisture from the Chemicals Recommended Solder and Wash Process Recommended Solder Fluxes and Cleaning/Degreasing module. fluxes used with the HFCT-5801 fiber-optic transThe HFCT-5801 is compatible with industry Solder Chemicals ceiver water-soluble, organic solder fluxes. HFCT-5801 Process standard wavePlug or hand solder processes. Soldershould fluxesbe used with the HFCT-5801 fiber-optic Some recommended solder fluxes are Lonco 3355-11 transceiver should be water-soluble, organic solder The transceiver supplied with a process plug from A HFCT-5801 drying cycle mustisbe completed after wash London West, Inc. of Burbank, 100 fluxes. SomeChemical recommended solder fluxes CA, areand Lonco forprocess protection the optical ports with the Duplex SC con- Flux to of remove all moisture from the module. from Alphametals of Jersey City, NJ. 3355-11 from London Chemical West, Inc. of nector receptacle. This process plug prevents contamiBurbank, CA, cleaning and 100 Flux from Alphametals for of Recommended and degreasing chemicals HFCT-5801 Plug and aqueous rinse as well as nation duringProcess wave solder Jersey City, NJ. The handling, HFCT-5801 transceiver is Itsupplied during shipping or storage. is made ofwith high-a the HFCT-5801 are alcohol’s (methyl, isopropyl, isobutyl), (hexane, heptane) and other chemicals, such process plug for sealing protection of that the will optical ports aliphatics temperature, molded, material withstand Recommended cleaning and degreasing chemicals soap solution or naphtha. Do not use partially halogewithand the Duplex SC of connector +85°C a rinse pressure 110 lb/in2.receptacle. This as for the HFCT-5801 are alcohol’s (methyl, isopropyl, hydrocarbons for cleaning/degreasing. Examples process plug prevents contamination during wave nated isobutyl), aliphatics (hexane, heptane) and other chemicals to avoid are 1.1.1. trichloroethane, ketones solder and aqueous rinse as well as during of chemicals, such as soap solution or naphtha. Do as MEK), acetone, chloroform, ethyl acetate, methyhandling, shipping or storage. It is made of (such not use partially halogenated hydrocarbons for dichloride, phenol, methylene chloride or N-methylhigh-temperature, molded, sealing material that lene cleaning/degreasing. Examples of chemicals to will withstand +85°C and a rinse pressure of 110 pyrolldone. avoid are 1.1.1. trichloroethane, ketones (such as lb/in2. MEK), acetone, chloroform, ethyl acetate, methylene
dichloride, phenol, methylene chloride or N-methylpyrolldone.
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XXXX-XXXX LASER PROD 21CFR(J) CLASS 1 COUNTRY OF ORIGIN YYWW RX
Agilent ZZZZZ TX
52.02 MAX. (2.048)
12.7 (0.50) AREA RESERVED FOR PROCESS PLUG
25.4 MAX. (1.00)
12.7 (0.50)
11.1 10.35 MAX. MAX. (0.437) (0.407)
0.75 (0.03)
18 x Ø
3.3 (0.130)
+0.25 0.46 -0.05 +0.010 0.018 -0.002
2xØ
20.32 8 x 2.54 (0.800) (0.100)
33.02 (1.300)
15.88 (0.625
Note 1: SOLDER POSTS AND ELECTRICAL PINS ARE TIN/LEAD PLATED. DIMENSIONS ARE IN MILLIMETERS (INCHES). TOLERANCES: X.XX ±0.025mm UNLESS OTHERWISE SPECIFIED. X.X ±0.05 mm 1 = N/C 2 = N/C 3 = N/C 4 = N/C 5 = LMON (-) 6 = LMON (+) 7 = TXDIS 8 = N/C 9 = PMON
+0.25 1.27 -0.05 +0.010 0.050 -0.002
20.32 (0.800)
2.54 (0.100)
18 = V EER 17 = RD 16 = RD15 = SD 14 = V CCR 13 = V CCT 12 = TD11 = TD+ 10 = VEET
N/C RX TX N/C
TOP VIEW
Figure 6. Package Outline Drawing and Pinout
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KEY: YYWW = DATE CODE XXXX-XXXX = HFCT-5801 ZZZZ = 1300 nm
Regulatory RegulatoryCompliance Compliance TheHFCT-5801 HFCT-5801 is intended to enable commercial The is intended to enable commercial system system designers to develop equipment designers to develop equipment that complies withthat the complies with the variouscertification regulations governing various regulations governing of Information certification of Information Technology Technology Equipment. See the RegulatoryEquipment. Compliance See the Regulatory Compliance Tableis 1available for details. Table 1 for details. Additional information from Additional information is available from your your Avago sales representative. Agilent sales representative.
Electrostatic ElectrostaticDischarge Discharge(ESD) (ESD) Thereare aretwo twodesign design cases which immunity to There cases in in which immunity to ESD ESD damage is important. damage is important. The first case is during handling of the transceiver prior to mounting it on the circuit board. The first case is during handling of the transceiver It is important to use normal ESD handling precautions prior to mounting it on the circuit board. It is for ESD sensitive devices. These precautions include usimportant to use normal ESD handling precautions ing grounded wrist straps, work benches and floor mats in for ESD sensitive devices. These precautions ESD controlled areas. The second case to consider is static include using grounded wrist straps, work benches discharges to the exterior of the equipment chassis conand floor mats in ESD controlled areas. taining the transceiver parts. To the extent that the duplex SC connector is exposed to the outside of discharges the equipment The second case to consider is static to chassis it may be subject to whatever ESD level the exterior of the equipment chassis system containing test that the equipment intended tothe meet. thecriteria transceiver parts. To theisextent that duplex SC connector is exposed to the outside of the equipment chassis it may be subject to whatever ESD system level test criteria that the equipment is intended to meet.
ElectromagneticInterference Interference(EMI) (EMI) Electromagnetic Most equipment designs utilizing these high-speed Most equipment designs utilizing these high-speed transtransceivers from Agilent will be required to meet ceivers from Avago will be required to meet the requirethe requirements of FCC in the United States, ments of FCC in the United States, CENELEC EN55022 CENELEC EN55022 (CISPR 22) in Europe and (CISPR 22) in Europe and VCCI in Japan. VCCI in Japan. The HFCT-5801 has been characterized without a chassis The HFCT-5801 has beenthe characterized enclosure to demonstrate robustness of without the part’sainchassis enclosure to demonstrate the robustness of tegral shielding. Performance of a system containing these the part’s integral shielding. Performance of transceivers within a well designed chassis is expecteda to system containing these transceivers well be better than the results of these testswithin with noa chassis designed chassis is expected to be better than the enclosure. results of these tests with no chassis enclosure. Immunity
Immunity Equipment transceivers Equipment utilizing utilizing these these HFCT-5801 HFCT-5801 transceivers will will be subject to radio-frequency electromagnetic be subject to radio-frequency electromagnetic fields in fields in some environments. These transceivers, some environments. These transceivers, with their intewith integral shields, have been characterized gral their shields, have been characterized without the benefit without the equipment benefit of achassis normal equipment chassis of a normal enclosure and the results enclosure and thePerformance results areof reported below. are reported below. a system containing Performance of within a system containing these these transceivers a well designed chassis is extransceivers within well designed is pected to be better thana the results of thesechassis tests without expected to be better than the results of these tests a chassis enclosure. without a chassis enclosure.
Table 1. Regulatory Compliance - Typical Performance
Feature Electrostatic Discharge ESD) to the Electrical Pins Electrostatic Discharge ESD) to the Duplex SC Receptacle Electromagnetic Interference (EMI)
Test Method MII-STD-883C Method 3015.4 Variation of IEC 61000-4-2
Performance Class 1 (>1000 V) - Human Body Model
FCC Class B
Immunity
Variation of IEC 801-3
Eye Safety
FDA CDRH 21-CFR 1040 Class 1 IEC 60825 - 1 Amendment 2 2001 - 01
Typically provide greater than 11 dB margin below 1 GHz to FCC Class B when tested in a GTEM with the transceiver mounted to a circuit card without a chassis enclosure at frequencies up to 1 GHz. Margins above 1 GHz dependent on customer board and chassis designs. Typically show no measurable effect from a 10 V/m field swept from 27 MHz to 1 GHz applied to the transceiver without a chassis enclosure. Accession Number: 9521220 - 36
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Air discharge 15 kV
License Number: 933/510031/03
Performance Specifications Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter Storage Temperature Lead Soldering Temperature/Time Input Voltage Power Supply Voltage
Symbol TS -
Minimum -40 GND 0
Maximum +85 +260/10 VCC 4
Units °C °C/s V V
Notes
Symbol VCC TOP TOP
Minimum +3.1 -40 0
Maximum +3.6 +85 +70
Units V °C °C
Notes
Operating Environment Parameter Power Supply Voltage Ambient Operating Temperature - HFCT-5801 A/C Ambient Operating Temperature - HFCT-5801 B/D
1 1
Transmitter Section (Ambient Operating Temperature, VCC = 3.1 V to 3.6 V)
Parameter Output Center Wavelength Output Spectral Width (RMS) Average Optical Output Power Extinction Ratio Bias Monitor Rear Facet Monitor Tx Disable Power Supply Current Output Eye Optical Rise Time Optical Fall Time Data Input Current - Low Data Input Current - High Data Input Voltage - Low Data Input Voltage - High
Symbol
Minimum Typical Maximum Units Notes 1261 1360 λce 7.7 nm ∆λ PO -15 -8 dBm 2 ER 8.2 dB 0.1 mA/mV VEE +1.28 V TXDIS 2.0 VCC V ICC 50 140 mA 3 Compliant with Telcordia TR-NWT-000253 and ITU recommendation G.957 tR 1.5 ns 4 tF 1.7 ns 4 IIL -200 µA IIH 200 µA VIL - VCC -1.81 -1.475 V 5 VIH - VCC -1.165 -0.880 V 5
Notes: 1. 2 m/s air flow required. 2. Output power is power coupled into a single mode fiber. 3. The power supply current varies with temperature. Maximum current is specified at VCC = Maximum@ maximum temperature (not including terminations) and end of life. Typical power supply current at +25°C and 3.3 V supply. 4. 10% - 90% Values. Maximum tR, t F times tested against eye mask. 5. These inputs are compatible with 10 K, 10 KH and 100 K LVPECL inputs.
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Receiver Section (Ambient Operating Temperature, VCC = 3.1 V to 3.6 V)
Parameter Receiver Sensitivity Maximum Input Power Power Supply Current Signal Detect - Deasserted Signal Detect - Hysteresis Signal Detect Assert Time (off to on) Signal Detect Deassert Time (on to off) Signal Detect Output Voltage - Low Signal Detect Output Voltage - High Data Output Voltage - Low Data Output Voltage - High Data Output Rise Time Data Output Fall Time
Symbol ICC
AS_Max
Maximum -31 160 -31 4 100
Units dBm dBm mA dBm dB µs
ANS_Max
350
µs
-1.6 -0.88 -1.6 -0.88 2.2 2.2
V V V V ns ns
VOL - VCC VOH - VCC VOL - VCC VOH - VCC tr tf
Minimum -7 -45 0.5
-1.84 -1.1 -1.84 -1.1 -
Typical 100 -
-
Notes 6 6 7
8 8 8 8 9 9
Notes 6. Sensitivity and maximum input power levels for a 223-1 PRBS with 72 ones and 72 zeros inserted. (ITU recommendation G.958). 7. The current includes 223-1 PRBS signal in LVPECL 50 Ohm loads. 8. These outputs are compatible with 10 K, 10 KH and 100 K LVPECL outputs. 9. 20 - 80% levels.
Table 2. Pin Out Table Pin Symbol Mounting Studs
1 2 3 4 5
N/C N/C N/C N/C LMON(-)
6
LMON(+)
7
TXDIS
8
N/C
Functional Description The mounting studs are provided for transceiver mechanical attachment to the circuit board. They are embedded in the non-conductive plastic housing and are not connected to the transceiver internal circuit. They should be soldered into plated-through holes on the printed circuit board.
Laser Bias Monitor (-) This analog current is monitored by measuring the voltage drop across a 10 ohm resistor placed between high impedance resistors connected to pins 5 and 6 internal to the transceiver. Laser Bias Monitor (+) This analog current is monitored by measuring the voltage drop across a 10 ohm resistor placed between high impedance resistors connected to pins 5 and 6 internal to the transceiver. Transmitter Disable at 3.3 V supply Transmitter Output Disabled: 2.0 V < V7 < VCCT Transmitter Output Uncertain: 1.175 V < V7 < 2.0 V. Transmitter Output Enabled: V EET < V7 < 1.175 V or open circuit.
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Table 2. Pin Out Table (continued)
Pin 9
Symbol PMON
10
VEET
11
TD+
12
TD-
13
VCCT
14
VCCR
15
SD
Functional Description Power Monitor The analog voltage measured at this high impedance output provides an indication of whether the optical power output of the Laser Diode is operating within the normal specified power output range per the following relationships: High Light Indication: V9 > 1.78 V. Normal Operation: V9 1.28 V. Low Light Indication: V9 < 0.78 V. Transmitter Signal Ground Directly connect this pin to the transmitter signal ground plane. Transmitter Data In Terminate this high-speed, differential Transmitter Data input with standard LVPECL techniques at the transmitter input pin. Transmitter Data In Bar Terminate this high-speed, differential Transmitter Data input with standard LVPECL techniques at the transmitter input pin. Transmitter Power Supply Provide +3.3 V dc via the recommended transmitter power supply filter circuit. Locate the power supply filter circuit as close as possible to the V CCT pin. Receiver Power Supply Provide +3.3 V dc via the recommended receiver power supply filter circuit. Locate the power supply filter circuit as close as possible to the V CCR pin. Signal Detect Normal input optical levels to the receiver result in a logic "1" output. Low input optical levels to the receiver result in a fault indication shown by a logic "0" output. Signal Detect is a single-ended, LVPECL output. This output will operate with a 270 termination resistor to V EE to achieve LVPECL output levels.
16
RD-
17
RD+
18
VEER
This Signal Detect output can be used to drive a LVPECL input on an upstream circuit, such as, Signal Detect input and Loss of Signal-bar input. Receiver Data Out Bar Terminate this high-speed, differential, LVPECL output with standard LVPECL techniques at the follow-on device input pin. Receiver Data Out Terminate this high-speed, differential, LVPECL output with standard LVPECL techniques at the follow-on device input pin. Receiver Signal Ground Directly connect this pin to receiver signal ground plane.
Ordering Information Temperature Range 0°C to +70°C HFCT-5801B Black HFCT-5801D Blue Case Temperature Range -40°C to +85°C HFCT-5801A Black HFCT-5801C Blue Case
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Supporting Documentation AN 1226: HFCT-5801 Characterization Report Case
AN1225: HFCT-5801 Application Note HFCT-5801 Reliability Data
Case
Ordering Information
Supporting Documentation
Temperature Range 0°C to +70°C
AN 1226: HFCT-5801 Characterization Report
HFCT-5801B Black Case
AN1225: HFCT-5801 Application Note
HFCT-5801D Blue Case
HFCT-5801 Reliability Data
Temperature Range -40°C to +85°C HFCT-5801A Black Case HFCT-5801C Blue Case
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www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2008 Avago Technologies Limited. All rights reserved. Obsoletes 5988-4254EN 5988-7918EN - February 1, 2008
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