Transcript
Demonstration Board EPC9115 Quick Start Guide 1/8th Brick Converter Featuring EPC2020 and EPC2021
DESCRIPTION The EPC9115 demonstration board is a fully regulated 300 kHz isolated DC/DC bus converter with a 12 V, 42 A output and a input range of 48 – 60 V. The demonstration board features the enhancement mode (eGaN®) field effect transistors (FETs), the EPC2020 (60 V) and EPC2021 (80 V), along with eGaN FET specific integrated circuit drivers – the LM5113 half-bridge driver and UCC27611 low side driver from Texas Instruments. The power stage is a conventional hard-switched 300 kHz isolated buck converter. The EPC9115 board is intended to showcase the superior performance that can be achieved using eGaN FETs and eGaN driver together in a conventional topology. The complete converter fits within a standard eighth-brick envelope, but the demonstration board is oversized to allow connections for bench evaluation. There are also various probe points to facilitate simple waveform measurement and efficiency calculation. A complete block diagram of the circuit is given in Figure 1. The converter uses a full-bridge (FB) primary power stage, a 4:1 transformer, and a center-tapped (CT) output stage with active reset snubbers. Control is provided by a Microchip dsPIC® controller, and basic voltage mode control is implemented. For more information on the EPC2020 and EPC2021 eGaN FETs, as well as the gate drivers and controller, please refer to the datasheets available from EPC at www.epc-co.com, www.ti.com, and www.microchip.com. These datasheets, should be read in conjunction with this quick start guide.
Table 1: Performance Summary (VIN=52 V, TA = 25°C, 400 LFM unless otherwise specified) SYMBOL
PARAMETER
VIN
Bus Input Voltage Range
VOUT
Output Voltage
IOUT
Output Current2
CONDITIONS
MIN
TYP
UNITS
48
52
60
V
11.41
12
12.1
V
Ta = 25°C, no forced air cooling3
5
A
Ta = 25°C, ~200 LFM
35
A
Ta = 25°C, ~400 LFM fSW
MAX
42
A
Switching Frequency
300
kHz
For More Information:
Output Ripple Frequency
600
kHz
Peak Efficiency
48 VIN, 30 A IOUT
96.7
%
Please contact
[email protected] or your local sales representative
Full Load Efficiency
52 VIN, 42 A IOUT
96.4
%
Full Load Efficiency
56 VIN, 42 A IOUT
96.3
%
Full Load Efficiency
60 VIN, 42 A IOUT
96.1
%
Visit our website: www.epc-co.com
1 2 3
Output voltage duty cycle limited to 98% Maximum current limited by thermal considerations Board placed vertical on long edge to aid convection – Do NOT operate horizontally without forced air cooling
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Demonstration Board Notification EPC9115 boards are intended for product evaluation purposes only and are not intended for commercial use. As evaluation tools, they are not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant. No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. EPC reserves the right at any time, without notice, to change said circuitry and specifications.
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QUICK START GUIDE
EPC9115
QUICK START PROCEDURE Demonstration board EPC9115 is easy to set up to evaluate the performance of the EPC2020 and EPC2021 eGaN FETs and LM5113 and UCC27611 drivers. Refer to Figure 2 for proper connect and measurement setup and follow the procedure below:
6. Turn on active load and adjust to the desired load current while staying below the maximum current (This will depend on the cooling provided. If no forced air cooling, then keep the load current below 5 A). 7. If testing under moderate to full load conditions, ensure that a fan or other source of forced convection is producing adequate airflow (≥ 400 LFM recommended for full load operation).
1. With power off, connect the input power supply bus between VIN+ and VIN- euro connectors as shown. 2. Add input and output voltage measurements to the Kelvin connections provided as shown.
8. Once operational, adjust the bus voltage and load current within the allowed operating range and observe the output switching behavior, efficiency and other parameters.
3. With power off, connect the load as desired between VOUT+ and VOUTeuro connectors as shown. A resistive or constant current load is recommended.
9. For shutdown, please follow steps in reverse. NOTE. For accurate high frequency content switch node and gate voltage waveforms, use a short ground clip or purpose-made probe adapter, as shown in Fig. 3. Avoid long ground leads on oscilloscope probes. Please note that primary and secondary side grounds are not connected to each other on the EPC9115 demo board. When measuring multiple signals ensure that they are always referenced to the same ‘ground’ potential to avoid potential circuit failure or instrumentation failure.
4. Turn on the supply voltage to the required value. Do not exceed the absolute maximum voltage of 60 V on VIN. 5. Measure the output voltage to make sure the board is fully functional and operating no-load.
V_IN+
Lf2 330n
Lf1 470nH
Cf1 12*1 uF
Q3
Q1 EPC2021 p1
EPC2021
p2
D4
vsa
vsa
R2
C1
5.2k
100n
V_OUT+
1T
vp+ V_IN-
1T
EPC2021
M1 EPC2020
EPC2020
EPC2020 s1
EPC2020
V_OUT-
C2
D1
470nF
s2
A1 Controller V_BIAS_SEC
M2
Q8 Vsnub
Q6
V_BIAS_PRI
Cf 12*4.7 uF
Q7
Q5
Q4
snb2
p2
EPC2021 p1
snb1
Q2
D5
vsb
vsb
V_OUT_SNS
I_OUT_SNS
vsct
4T vp-
V_OUT_SNS
I_OUT_SNS
A2
p1 p2
s1 s2 snb1 snb2
Figure 1: Block Diagram of EPC9115 Demonstration Board
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| PAGE 2
QUICK START GUIDE
EPC9115
QUICK START PROCEDURE Secondary Waveforms
Regulated Eigth-brick Demo Board
VIN+
Vgs VOUT+
VOUT−
VIN−
VIN Supply <60 V
Vds VIN−
VIN+
VIN−
V
Vgs
VOUT− VOUT+
EPC 9115,
A
V
A Load
Vds
Primary Waveforms Figure 2: Proper Connection and Measurement Setup
Do not use probe ground lead
Minimize loop
Figure 3: Proper Measurement of Switch Nodes or Output Voltage
CIRCUIT PERFORMANCE
Vsec Drain Node 5 V/div
The EPC9115 demonstration circuit was designed to showcase the size and performance that can readily be achieved using eGaN FETs. The 300 kHz operating frequency is 50% - 100% higher than typical commercial eighth-brick converters. Figure 4 shows typical full-load waveforms for a 52 V input voltage using probe tip adapters as shown in Figure 3. Figure 5 shows efficiency plots for several input voltages at 400 LFM (2 m/s) airflow at 25 °C. Data are taken after converter reaches thermal steady state.
Vpri Switch Node 10 V/div Vpri Gate 4 V/div
Figure 4: Typical waveforms taken at 52 VIN to 12 VOUT/42 AOUT
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QUICK START GUIDE
EPC9115
OPERATING CONSIDERATIONS The EPC9115 is a demonstration platform intended to show the capabilities of eGaN FETs in an eighth-brick application. The converter has basic regulation and overcurrent protection, but the complete feature set often found with 1/8th-brick converters is not implemented. In particular, the EPC9115 does not have overvoltage, over-temperature, or fast-acting short-circuit protection. Hence, the circuit is recommended for power stage and efficiency evaluation purposes. The transient response has not been optimized.
THERMAL MANAGEMENT: The EPC9115 demo board has no on-board thermal protection. Thermal images for steady state full load operation are shown in Figure 6. The EPC9115 is intended for bench evaluation with nominal room ambient temperature and forced air cooling. Operation without forced air cooling is possible for limited power operation. It is recommended that the maximum temperature on the EPC9115 not exceed 125 °C. ELECTRICAL PROTECTION: Overcurrent protection is set at a nominal value of 50 A at room temperature. Current sensing is implemented using inductor DCR sensing, and as a result exhibits variability as a function of the inductor and its temperature. As the inductor becomes hotter, the trip point becomes lower.
97 96
Efficieny (%)
SOURCE and LOAD: It is recommended that the converter be driven from a source with both low ac and dc impedance. Additional input capacitance may be added as necessary. Additional output capacitance may be added to the output in the form of electrolytic capacitors, up to 1000 μF. Addition of bulk capacitance in the form of low ESR capacitors is not recommended.
98
95 VIN = 60 VIN = 56 VIN = 52 VIN = 48
94 93 92 91 90
0
10
20
30
40
50
IOUT (A) Figure 5: Typical efficiency curves. Operating conditions: 400 LFM (2 m/s) forced convection, ambient temperature 27 °C, thermal steady state. The converter is running unregulated for the 48 V case.
The EPC9115 demo board does not have any input overvoltage protection on board. It is also recommended to make sure that the converter is started with an output voltage of 1V or less.
400 LFM Figure 6: Thermal images of EPC9115. Operating conditions: 400 LFM (2 m/s) forced convection, ambient temperature 27 °C, thermal steady state.
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| PAGE 4
QUICK START GUIDE Table 2: Bill of Materials Designator
EPC9115
Description
Quantity
Value
MFG
MFGPN
C1, C2, C3, C4, C10, C11
Capacitor, 2.2 µF, 6.3 V, X5R
6
2.2 µF
TDK Corporation
C1005X5R0J225M050BC
C12, C13, C17, C42, C43, C46, C47, C50, C55, C58
Capacitor, 22 pF, 50 V, NPO, 5%
10
22 pF
Murata
GRM1555C1H220JA01D
C14, C16
Capacitor, 4.7 µF, 6.3 V, X7S
2
4.7 µF
TDK
C1608X7S0J475K080AC
C18
Capacitor, 1000 pF, 50 V, NPO, 5%
1
1000 pF
Murata
GRM1555C1H102JA01D
C19
Capacitor, 0.1 µF, 50 V, X7R
1
100 nF, 50 V
TDK
C1005X7R1H104K050BB
C20, C21, C22, C23, C24, C25, C51, C54, C65, C67, C68, C69
Capacitor, 1 µF, 100 V, X7S
12
1 µF, 100 V
TDK
C2012X7S2A105M125AE
C26
Capacitor, 0.047 µF, 25 V, X7R, 5%
1
0.047 µF, 25 V Murata
GRM155R71E473JA88D
C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37, C38
Capacitor, 4.7 µF, 25 V, X7R
12
4.7 µF, 25 V
TDK
CGA4J1X7R1E475K125AC
C39
Capacitor. 3300 pF, 2000 V, X7R
1
3300 pF
Johanson
202S43W332KV4E
C40, C41, C44, C45, C48, C49, C52, C53, C70, C71
Capacitor
10
0.22 µF
Murata
GRM155R71C224KA12D
C5, C59, C61, C64, C66
Capacitor
4
0.1 µF, 100 V
Murata
GRM188R72A104KA35D
C6, C9
Capacitor, 3.3 µF, 16 V, X5R
2
3.3 U
TDK Corporation
C1608X5R1C335K
C60, C62
Capacitor
2
2.2 U
Samsung
CL31B225KCHSNNE
C63
Capacitor
1
470 nF, 50 V
TDK
CGA4J3X7R1H474K125AB
C7
Capacitor, 330 pF, 25 V, NPO, 5%
1
330 pF
Murata
GRM1555C1E331JA01D
C8
Capacitor, 0.1 µF, 16 V, X7R
1
0.1 µF
Murata
GRM155R71C104KA88D
D1, D2, D3
Schottky diode
3
BAT41K
ST Microelectronics
BAT41KFILM
D6, D9
Schottky 60 V 1A
2
60 V, 1 A
Vishay
MSS1P6-M3/89A
D7
Zener Diode
1
33 V, 10 mA
NXP
BZX384-C33,115
J2
Programming connector
1
N/A
TE Connectivity
5520425-3
J3, J5, J6, J9, J10, J13
Test point
6
N/A
Keystone
5015
J4, J8
Power connector
2
N/A
Molex
399100102
J7, J14, J15, J16
Connector
4
N/A
Tyco
4-103185-0-02
L1
Inductor
1
180 Ω
TDK
MPZ1608S181ATAH0
L2
Inductor
1
0.33 µF, 20 A
Abracon
ASPI-7318-R33M-T
470 nH
L3
470 nH, 62A inductor
1
Vishay
IHLP-6767GZ-01
Q1, Q2, Q3, Q4
eGaN FET, 80 V, 60 A, 2.5 mΩ
4
EPC
EPC2021
Q13, Q14
NPN/PNP DFN PBSS4160PANP
2
NXP
PBSS4160PANP,115
Q16
DUAL NPN DFN PBSS4160PAN
1
NXP
PBSS4160PAN,115
Q5, Q6, Q7, Q8
eGaN FET, 60 V, 60 A, 2 mΩ
4
EPC
EPC2020
Q9, Q10
P-Channel DMOS FET, -60 V, 1.6 A, logic level gate
2
Vishay
SQ1421EEH-T1-GE3
R1, R19, R26, R33, R40, R42, R43
Resistor
7
1R0
Yageo
RC0402FR-071RL
R12, R13
Resistor, 1%
2
470
Vishay
CRCW0402470RFKED
R14
Resistor, 0.1%
1
4.99 K, 0.1%
Susumu
RG1608P-4991-B-T5
R15, R46, R48, R51
Resistor, 0.1%
4
1 K, 0.1%
Susumu
RG1005P-102-B-T5
R2
Resistor
1
100 K
Vishay
CRCW0603100KFKEA
R20, R24, R27, R31, R34, R38, R41, R45
Resistor
8
4.7
Yageo
RC0402FR-074R7L
R21, R23, R28, R30, R37, R44, R59, R60
Resistor
8
49.9
Yageo
RC0402FR-0749R9L
R22, R25, R29, R32
Resistor
4
ZERO
Vishay
CRCW04020000Z0ED
R3, R4
Resistor
2
33.2 K
Vishay
RC0402FR-0733K2L
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| PAGE 5
QUICK START GUIDE
Table 2: Bill of Materials Designator
EPC9115
Quantity
Value
MFG
MFGPN
R36, R57
Description Resistor
2
1
Vishay
CRCW08051R00FKEA
R39, R53
Resistor
2
2
Vishay
CRCW08052R00FKEA
R47
Resistor
1
249
Yageo
RC0402FR-07249RL
R49
Resistor, 0.1%
1
20 K, 0.1%
Susumu
RG1005P-203-B-T5
R5, R11, R16, R17
Resistor
4
10 K
Vishay
CRCW040210K0FKED
R50
Resistor, 0.1%
1
4.99 K, 0.1%
Susumu
RG1005P-4991-B-T5
R55, R56
Resistor
2
2.2
Yageo
RC0402FR-072R2L
R6, R18
Resistor
2
15 K
Yageo
RC0402FR-0715KL
R7, R8
Resistor
2
4.75 K
Yageo
RC0402FR-074K75L
R9, R10
Resistor
2
1.8 K
Yageo
RC0402FR-071K8L
T1
Bias transformer
1
Custom Coils
CCI-7082
U1
3.3 V linear regulator
1
Microchip
MCP1700T3302EMBCT-ND
U10, U11
eGaN Gate Driver with LDO
2
3.3 V
TI
UCC27611DRVT
U12
Rail-to-Rail Input/Output, ±15 V, Operational Amplifier
1
TI
OPA209AIDBV
U2, U4
5.0 V linear regulator
2
TI
LP2985-50DBVR
U3
Power supply controller
1
On Semiconductor
NCP1030DMR2G
U5
dsPIC microcontroller
1
Microchip
DSPIC33FJ16GS502-E/M
U6
Dual inverter
1
NC7WZ14
Fairchild
NC7WZ14EP6X
U7
2 channel unidirectional magnetic isolator
1
IL611
NVE Corporation
IL611-1E
U8, U9
half-bridge eGaN gate driver
2
LM5113
TI
LM5113TME/NOPB
CORE1
Planer E core
1
Ferroxcube
EQ20/R-3F35
CORE2
Planer I core
1
Ferroxcube
PLT20/S-3F35
LP2985 5 V
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| PAGE 6
QUICK START GUIDE
EPC9115 1 L2
CON- 0399100102
1
VIN
C73 Cap Pol1 DNP
2
VIN_FILT
0.33U 20A
BR 1 1 2 GND
3
1
8 7 6 5 4
2 3
8 7 6 5 4
J6
+OUT
1
GPUL
1
GND
OUT_ R ET
Q1 80V
G
Q2 80V
GPUR G
S1
VIN
D1
VIN C72 Cap Pol1 DNP
S1
1 2
1 2
D1
J3 1 J4
PRYSW
EBDOSA
PRYSWR
PRYSWL
C22
C23
C24
C25
C65
1U, 100V
1U, 100V
1U, 100V
1U, 100V
1U, 100V
1U, 100V
2
2
2
2
G
GPL R
S1
C54
1U, 100V
2
C69
1U, 100V
2
C68
1U, 100V
2
C67
1U, 100V
2
C51
1U, 100V
2
C21
1U, 100V
D1
J12
Q4 80V
G
1
1 J9
S1
1
1
1
1
1
1
1
1
1
1
GPLL
C20
2
2
C62 2.2U
2
C60 2.2U *
1
1
D1
J11
PLANAR XFORM
Q3 80V
GND
J7
DNP
1
2
SEC _SW
V_ SNUB_ 2
1 R5 7 1
V_ SNUB_ 2
V_ SNUB_ 1
1
2
2
1
V_ SNUB
D6 60V 1A
K
R53
D7 D Zener
C63 470n, 50V
2
Q6 60V
G
S1
S1
GS2_2
G S2_1
Q5 60V
G
OUT_ R ET
D1
D1
2
2
VG _SNUB1
1
1
R55 2E2
.1" Male Vert.
2
A
C61 0.1uF, 100V
1
C59 0.1uF, 100V
Q9 SQ1421EEH
R36
1 2
.1" Male Vert.
D4
CENTER-TAPPED PLANAR XFORMER
J14 1 2
VCC_ SEC
IOUT_ SENSE
OUT_ R ET
J1
V_ SNUB_ 1
R18
1
15k
+OUT
CENTER-TAPPED PLANAR XFORMER
C26
2
0.047u, 50V *
SEC _SW _C T Q10 SQ1421EEH
D9 60V 1A
1
OUT_ R ET 1 2
2
R5 6 2E2 VG _SNUB2
Q7 60V
G
Q8 60V
GS1_2 G
C27 4.7 uF 35V
C28 4.7 uF 35V
S1
S1
GS1_1
J15
J16
1 2
1 2
C29 4.7 uF 35V
C30 4.7 uF 35V
C31 4.7 uF 35V
C32 4.7 uF 35V
C33 4.7 uF 35V
C34 4.7 uF 35V
C35 4.7 uF 35V
C36 4.7 uF 35V
C37 4.7 uF 35V
C38 4.7 uF 35V
1
1 J13
OUT_ R ET
OUT_ RET
.1” Male Vert.
1 2
CON- 0399100102
470nH
2
J8
D1
1 R3 9 2
J10
1
L3
D1
C66 0.1uF, 100V
C75 Cap Pol1 DNP
1
C64 0.1uF, 100V
C74 Cap Pol1 DNP
C39
OUTER_METAL 1 1
J5
GND
1
.1” Male Vert.
2
OUT_RET
3300P
Figure 7: EPC9115 Demonstration board schematic - Power
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| PAGE 7
QUICK START GUIDE
EPC9115 C70
V_SNUB_2
2 0.22U
R7 4.7k 4.7k
R8 4.7k 4.7k
A4
22P
22P
1
VG_SNUB1
R22
2
Q13B PBSS4160PANP
5
C41
B1 A1
VG_SNUB2
4
ZERO
1 0.22U
Q14B PBSS4160PANP
5
PRYSWL R24
LM5113
1 R25
DSP_SIG_SNUB2
Q16A PBSS4160PAN
2
2
ZERO
1
GND
DSP_SIG_SNUB1
4.99
3
VSS
2
C43
2
C42
LILOHI LOH
Q14A PBSS4160PANP
2
2
Q16B PBSS4160PAN
5 4
A2
1
1
2
GPUL
3
49.9
1
2
6
R23 SIG_1
Q13A PBSS4160PANP
2
4.99
1
1
2
R20
D3 D2 D1 C1 D4
1
1
VDD1 VDDHB HIHOH HOL HS HS1
2
SIG_2
C4 A3 B4
49.9
6
U8
R21
V_SNUB_1
GND
6
1
1
2
4
1R0
3
R19
1
+5V_PRY
R9 1.8k 1.8k
GPLL
R1 0 1.8k 1.8k OUT_RET
1R0
R26
+5V_PRY
1
C44
2
1
2
GND
R33
+5V0_SEC
0.22U
1R0
1
C48
2
1
2
OUT_RET R40
2
A4
LILOHI LOH
C13
22P
22P
1 R29
1
2
1 GPUR
ZERO
DSP_SIG_SEC1
2
R37
49.9
1
2
C49
VREF
LDO
1
1
2 R34
VSS
UCC27611DRV
0.22U
6 5 4
3
C45
B1 A1
VDD
2
1
4.99
2
GS1_2
EP OUT_RET
C50
R38
1
4.99
2
GS1_1
2
22P
VSS
PRYSWR R31
LM5113
1
OUT_RET
4.99
2
2
R32
1
GND
GND
1
2
GPLR
R42
+5V0_SEC
1R0
1
C52
2
1
DNP
2
2
OUT_RET
0.22U R43
2 R44
1
49.9
2
VDD
LDO
VREF
2 1
4.99
2
GS2_2
EP OUT_RET
R45
1
4.99
2
GS2_1
2
22P
1
R41
VSS
UCC27611DRV C55
6 5 4
3 1
DSP_SIG_SEC2
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2
U11 1
Figure 8: EPC9115 Demonstration board schematic – Gate Drive
1R0
1
GND
0.22U
R35
ZERO
C53
2
A2 C12
D3 D2 D1 C1 D4
4.99
2
49.9
R60
1
VDD1 VDDHB HIHOH HOL HS HS1
R27
1
2
1
SIG_2
49.9
R59
1
2
U10
C4 A3 B4
1
SIG_1
1R0
1
U9
0.22U
0.22U
OUT_RET
| PAGE 8
QUICK START GUIDE
EPC9115
C58
2
U6A C40
22P
R28
DSP_SIG1
470
1
2
470
R13
2 0.22U
2
1
6
GND
U7
1%
1
49.9
1
1 2 3 4
2
IN1+ IN1IN2+ IN2-
VDD O1 O2 GND
8 7 6 5
NC7WZ14 C71
+5V_PRY
+5V_PRY
2 0.22U
GND
1%
1
1
GND
R30
IL611
49.9
1
2
2
3
4
OUT_RET
SIG_2
+3V3_SEC
2
22P
4 1
2
+ 3V3_SEC
4.99k 0.1% 1 SP
2
1
OUT_RET
1
L1
VCC_SEC
+3V3_SEC
BAT41K
T1A
1
2
1
U5
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1
2
1
D2
R3
1
33.2K U3
3
D3
VCC_PRY
3 15K
0.1U
+3V3_SEC PGED PGEC SCL
1
BAT41K
R6
C8
330 P
1
AN2/CMP1C/CMP2A/RA2 AN1/CMP1B/RA1 AN3/CMP1D/CMP2B/RP0/CN0/RB0 AN0/CMP1A/RA0 AN4/CMP2C/CMP3A/RP9/CN9/RB9 MCLR AN5/CMP2D/CMP3B/RP10/CN10/RB10 AVDD VSS0 AVSS OSC1/CLKIN/AN6/CMP3C/CMP4A/RP1/CN1/RB1 PWM1L/RA3 OSC2/CLKO/AN7/CMP3D/CMP4B/RP2/CN2/RB2 PWM1H/RA4 PGED2/DACOUT/INT0/RP3/CN3/RB3 PWM2L/RP14/CN14/RB14 PGEC2/ETXREF/PR4/CN4/RB4 PWM2H/RP13/CN13/RB13 VDD TCK/PWM3L/RP13/CN12/RB12 PGED3/RP8/CN8/RB8 TMS/PWM3H/RP11/CN11/RB11 PGEC3/RP15/CN15/RB15 VCAP/VDDCORE TDO/RP5/CN5/RB5 VSS1 PGED1/TDI/SCL/RP6/CN6/RB6 PGEC1/SDA/RP7/CN7/RB7 EP 33FJ16GS502
C9 T1B
EN
C10
C11
2.2U
2.2U
2
LP2985 5V0
+ 5V_PRY
1
5 4 2
1
VO BYP GND
3
4
4
5 J2E
5
Figure 9: EPC9115 Demonstration board schematic – Bias and Control
EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 |
J2D
2
2
3 J2C
1
2
J2B
MCLR
+3V3_SEC OUT_RET
+3V3_SEC OUT_RET PGED
R16
R17
10K
10K
PGEC
SCL SDA
2
3
VI
SDA
4.7U
1
U4
1
DSP_SIG_SEC1 DSP_SIG_SEC2 DSP_SIG1 DSP_SIG2 DSP_SIG_SNUB2 DSP_SIG_SNUB1
C16
1
J2A
VCC_PRY
IOUT_DSP VOUT_DSP MCLR
2
GND
4
1
2
2
2
3.3U
4
28 27 26 25 24 23 22 21 20 19 18 17 16 15 29
2
C7
2
2
2
1 1
1
NCP1030
OUT_RET A B
2 BAT41K
1
1
2
8 7 6 5
2
OUT_RET
3.3U
6 2
6
1
2
100 K
R4 33.2K
10K
4.7U
T1C
VDR VCC UV OV
R11
C14
2
C6
10K
2
180 OHMS
0.1U
R2
R5
1
1
5
1
2
GND
GND CT VFBF COMP
1000P
2.2U
2
R1 handy to disable bias
VCC_PRY
C18
1K 0.1%
D1
C5
1 2 3 4
1 R15
OUT_RET
1
1R0
1
VOUT_DSP
OUT_RET
2
VIN_FILT
4.99K 0.1%
1
R52 DNP
OUT_RET R1
R14
R46 1k 0.1%
2
2.2U
IOUT_D
C1
1 C4
2.2U
2
2
3
2
C3
2.2U
R50
2
C57 DNP
VO
VIN GND
C2
2
2
LP2985 5V0
3
1
2
2
+OUT
1
1k 0.1%
U1 3V3
1
EN
5 4 2
1
VO BYP GND
1
VI
D5 DNP
2
GND
2
U12 OPA2 09AIDB V
1
2
GND
R51
1
2
IOUT_SENSE
R49
20k 0.1%
2
22P
1
1
C47
2
1k 0.1% 5
C46
R48
1
2
1
1
+OUT
NC7WZ14
+ 5V0_SEC
3
V_SNUB
C15 DNP
1
U2
1
2
22P
OUT_RET
VCC_SEC
R47 249
C19 100nF, 50 V
U6B
C17
DSP_SIG2
SIG_1
5
1 R12
+5V
1
GND
IN CIRCUIT PROGRAM HEADER
FOR CONTROLLING PARAMETERS, 12C
| PAGE 9
