Transcript
TVS Diodes Transient Voltage Suppressor Diodes
ESD0P2RF Series Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
ESD0P2RF-02LS ESD0P2RF-02LRH
Data Sheet Rev. 1.2, 2012-10-01 Final
Power Management & Multimarket
Edition 2012-10-01 Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
ESD0P2RF Series
Revision History: Rev. 1.1,.2012-04-27 Page or Item
Subjects (major changes since previous revision)
Rev. 1.2, 2012-10-01 Page Nr.8 Package name corrected (mismatch) 10
Table 2-4 updated
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Final Data Sheet
3
Rev. 1.2, 2012-10-01
ESD0P2RF Series
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
1
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
1.1
Features
•
• • • • • •
ESD / transient protection of RF signal lines according to: – IEC61000-4-2 (ESD): ±20 kV (air/contact) – IEC61000-4-4 (EFT): 40 A (5/50 ns) – IEC61000-4-5 (surge): 3 A (8/20 μs) Maximum working voltage: VRWM ±5.3 V Extremely low capacitance: CL = 0.2 pF (typical) Low clamping voltage: VCL = 29 V at IPP = 16 A (typical) Very low reverse current IR < 1 nA typ. Very small form factor down to 0.62 x 0.32 x 0.31 mm3 Pb-free (RoHS compliant) and halogen free package
1.2 • •
Application Examples
ESD protection of sensitive RF signal lines, Bluetooth Class 2, Automated Meter Reading RF antenna protection, frontend module, GPS, mobile TV, FM radio, UWB
1.3
Product Description
Pin 1
Pin 2
Pin 1 marking (lasered)
Pin 1
TSLP-2
Pin 1
Pin 2
Pin 2 TSSLP-2
a) Pin configuration
b) Schematic diagram P G-TS (S)LP -2_Dual_Diode_S erie_P inConf_and_S c hematic Diag. v s d
Figure 1-1 Pin Configuration and Schematic Diagram Table 1-1
Ordering Information
Type
Package
Configuration
Marking code
ESD0P2RF-02LS
PG-TSSLP-2-1
1 line, bi-directional
T
ESD0P2RF-02LRH
PG-TSLP-2-17
1 line, bi-directional
T
Final Data Sheet
4
Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
2
Characteristics
Table 2-1
Maximum Ratings at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
VESD
–
–
20
kV
IPP
–
–
3
A
Operating temperature range
TOP
-55
–
125
°C
Storage temperature 1) VESD according to IEC61000-4-2 2) IPP according to IEC61000-4-5
Tstg
-65
–
150
°C
ESD air / contact discharge
1)
Peak pulse current (tp = 8/20 μs)
2)
Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit.
2.1
Electrical Characteristics at TA=25°C, unless otherwise specified
!
!
!
Figure 2-1 Definitions of electrical characteristics
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
Table 2-2
DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
Reverse working voltage VRWM
–5.3
–
5.3
V
Breakdown voltage
7
–
–
V
VBR
Note / Test Condition
IR = 1 mA, from pin 1 to pin 2, from pin 2 to pin 1
Reverse current Table 2-3
IR
<1
50
nA
VR = 5.3 V
Unit
Note / Test Condition
RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Diode capacitance
Table 2-4
–
CL
Values Min.
Typ.
Max.
–
0.23
0.4
pF
VR = 0 V, f = 1 MHz
–
0.2
0.4
pF
VR = 0 V, f = 1 GHz
Unit
Note / Test Condition
V
ITLP = 16 A
ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Clamping voltage2)
Min.
Typ.
Max.
–
29
–
–
38
–
ITLP = 30 A
–
11
17
IPP = 1 A
–
15
21
IPP = 3 A
RDYN
–
1
–
Ω
LS
–
0.2
–
nH
ESD0P2RF-02LS
0.4
–
nH
ESD0P2RF-02LRH
VCL
1)
Clamping voltage
Dynamic resistance Series inductance
2)
Values
– 1)IPP according to IEC61000-4-5 (tp = 8/20 µs)
2) Please refer to Application Note AN210 [4]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between ITLP1 = 10 A and ITLP2 = 40 A.
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
Typical Characteristics at TA = 25 °C, unless otherwise specified
10
-7
10
-8
+125°C
10-9
IR [A]
2.2
10
-10
10
-11
10-12
+85°C
+25°C
0
1
2
3 VR [V]
4
5
6
5
6
Figure 2-2 Reverse current: IR = f(VR), TA = parameter
0.4
CL [pF]
0.3
0.2
0.1
0
0
1
2
3 VR [V]
4
Figure 2-3 Line capacitance: CL = f(VR), f = 1 MHz
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
0.26 0.25
5.3V
CL [pF]
0.24
3.3V
0.23
0V
0.22 0.21 0.2
0
500
1000
1500
2000
2500
3000
f [MHz] Figure 2-4 Line capacitance: CL = f(f), VR = parameter
1 0.9 0.8
CL [pF]
0.7 0.6
5.3V
0.5 0.4
3.3V
0.3
0V
0.2 0.1 0 -50
-25
0
25 50 TA [°C]
75
100
125
Figure 2-5 Line capacitance: CL = f(TA), VR = parameter
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
120 100
VCL-max-peak = 112 [V]
VCL [V]
80
VCL-30ns-peak = 24.8 [V]
60 40 20 0 -20 -100
0
100
200
300
400 500 tp [ns]
600
700
800
900
700
800
900
Figure 2-6 IEC61000-4-2 VCL = f(t), 8 kV positiv pulse from pin 1 to pin 2
20 0
VCL [V]
-20 -40 -60
VCL-max-peak = -116 [V]
-80
VCL-30ns-peak = -25.0 [V]
-100 -120 -100
0
100
200
300
400 500 tp [ns]
600
Figure 2-7 IEC61000-4-2 VCL = f(t), 8 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
180 160 140
VCL [V]
120 100
VCL-max-peak = 162 [V]
80
VCL-30ns-peak = 37.4 [V]
60 40 20 0 -20 -100
0
100
200
300
400 500 tp [ns]
600
700
800
900
700
800
900
Figure 2-8 IEC61000-4-2 VCL = f(t), 15 kV positiv pulse from pin 1 to pin 2
20 0 -20
VCL [V]
-40 -60
VCL-max-peak = -169 [V]
-80
VCL-30ns-peak = -37.6 [V]
-100 -120 -140 -160 -180 -100
0
100
200
300
400 500 tp [ns]
600
Figure 2-9 IEC61000-4-2 VCL = f(t), 15 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
10
Rev. 1.2, 2012-10-01
ESD0P2RF Series
Characteristics
20
ESD0P2RF-02xx RDYN
ITLP [A]
30
15 RDYN=1.0Ω
20
10
10
5
0
0
5
10 15 20 25 30 35 40 45 50 55 60 VTLP [V]
Equivalent VIEC [kV]
40
0
Figure 2-10 Clamping voltage : ITLP = f(VTLP) [4]
17 16 15
VCL [V]
14 13 12 11 10 9 8 7
0
1
2 IPP [A]
3
4
Figure 2-11 Clampine voltage: VCL = f(IPP), tp = 8/20 μs
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Application Information
Application Information
Connector
3
Protected signal line
ESD I/O sensitive device
1
2
The protection diode should be placed very close to the location where the ESD or other transients can occur to keep loops and inductances as small as possible . Pin 2 (or pin 1) should be connected directly to a ground plane on the board .
A pplic ation_E S D0P 2RF -02x x .v s d
Figure 3-1 Single line, bi-directional ESD / Transient protection [1], [2]
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Ordering Information Scheme (Examples)
4
ESD
Ordering Information Scheme (Examples)
0P1
RF
- XX YY Package XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP For Radio Frequency Applications Line Capacitance CL in pF: (i.e.: 0P1 = 0.1pF)
ESD 5V3 U n U - XX YY Package or Application XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP S = SOT363 U = SC74 XX = Application family: LC = Low Clamp HDMI Uni- / Bi-directional or Rail to Rail protection Number of protected lines (i.e.: 1 = 1 line; 4 = 4 lines) Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF) Maximum working voltage VRWM in V: (i.e.: 5V3 = 5.3V) Figure 4-1 Ordering information scheme
Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Package Information
5
Package Information
5.1
PG-TSLP-2-17 (mm) [5] Top view
Bottom view 0.39 +0.01 -0.03 0.6 ±0.05
0.05 MAX.
1±0.05
0.65 ±0.05
2
0.25 ±0.035 1)
1
0.5 ±0.035 1)
Cathode marking
1) Dimension applies to plated terminal
TSLP 2 7 PO V02
0.45
Copper
Solder mask
0.375
0.35
0.275
1
0.925
0.3
0.35
0.6
0.275
Figure 5-1 PG-TSLP-2-17: Package overview
Stencil apertures TSLP-2-7-FP V01
Figure 5-2 PG-TSLP-2-17: Footprint 0.5 1.16 Orientation marking
8
4
0.76 TSLP-2-7-TP V03
Figure 5-3 PG-TSLP-2-17: Packing
Figure 5-4 PG-TSLP-2-17: Marking (example) Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
Package Information
6
Package Information
6.1
PG-TSSLP-2-1 (mm) [5]
Top view
Bottom view 0.31 +0.01 -0.02
0.62 ±0.035
2
1
0.2 ±0.025 1)
0.355 ±0.025
0.32 ±0.035
0.26 ±0.025 1)
Cathode marking
1) Dimension applies to plated terminal
TSSLP-2-1,-2-PO V05
Figure 6-1 PG-TSSLP-2-1: Package overview
0.19
0.24 Solder mask
0.19
0.57
0.14 0.62 Copper
0.19
0.27
0.24
0.32
Stencil apertures TSSLP-2-1,-2-FP V02
Figure 6-2 PG-TSSLP-2-1: Footprint 0.35
8
Ey
4
Cathode marking
Ex
Figure 6-3 PG-TSSLP-2-1: Packing
Figure 6-4 PG-TSSLP-2-1: Marking (example) Final Data Sheet
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Rev. 1.2, 2012-10-01
ESD0P2RF Series
References
References [1]
Infineon AG - Application Note AN167: ESD Protection for Broadband LNA BGA728L7 for Portable and Mobile TV Applications
[2]
Infineon AG - Application Note AN178: ESD Protection for RF Antennas using Infineon ESD0P4RFL and ESD0P2RF-xx
[3]
Infineon AG - Application Note AN200: Low Cost FM Radio LNA using BFR340F for Mobile Phone Applications
[4]
Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP Characterization Methodology
[5]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages
Final Data Sheet
16
Rev. 1.2, 2012-10-01
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Published by Infineon Technologies AG
