Transcript
PD- 91651C
FB180SA10 HEXFET® Power MOSFET l l l l l l l l
Fully Isolated Package Easy to Use and Parallel Very Low On-Resistance Dynamic dv/dt Rating Fully Avalanche Rated Simple Drive Requirements Low Drain to Case Capacitance Low Internal Inductance
D
VDSS = 100V RDS(on) = 0.0065W
G
ID = 180A S
Description Fifth Generation, high current density HEXFETS are paralled into a compact, high power module providing the best combination of switching, ruggedized design, very low ON resistance and cost effectiveness. The isolated SOT-227 package is preferred for all commercial - industrial applications at power dissipation levels to approximately 500 watts. The low thermal resistance and easy connection to the SOT227 package contribute to its universal acceptance throughout the industry.
S O T -22 7
Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG VISO
Parameter
Max.
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Insulation Withstand Voltage (AC-RMS) Mounting torque, M4 srew
180 120 720 480 2.7 ± 20 700 180 48 5.7 -55 to + 150
Units
W W/°C V mJ A mJ V/ns °C
2.5 1.3
kV N•m
A
Thermal Resistance Parameter RqJC RqCS
1
Junction-to-Case Case-to-Sink, Flat, Greased Surface
Typ.
Max.
Units
––– 0.05
0.26 –––
°C/W
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FB180SA10 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage DV(BR)DSS/DTJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance V(BR)DSS
IDSS
Drain-to-Source Leakage Current
Qg Qgs Qgd td(on) tr td(off) tf Ls
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance
Ciss Coss Crss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
IGSS
Min. 100 ––– ––– 2.0 93 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Typ. Max. Units Conditions ––– ––– V VGS = 0V, ID = 250µA 0.093 ––– V/°C Reference to 25°C, ID = 1mA ––– 0.0065 W VGS = 10V, ID = 108A ––– 4.0 V VDS = VGS, ID = 250µA ––– ––– S VDS = 25V, ID = 108A ––– 50 VDS = 100V, VGS = 0V µA ––– 500 VDS = 80V, VGS = 0V, TJ = 125°C ––– 200 VGS = 20V nA ––– -200 VGS = -20V 250 380 ID = 180A 40 60 nC VDS = 80V 110 165 VGS = 10.0V, See Fig. 6 and 13 45 ––– VDD = 50V 351 ––– ID = 180A ns 181 ––– RG = 2.0W (Internal) 335 ––– RD = 0.27W, See Fig. 10 5.0 ––– nH Between lead, and center of die contact ––– 10700 ––– VGS = 0V ––– 2800 ––– pF VDS = 25V ––– 1300 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics IS ISM
V SD t rr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions MOSFET symbol ––– ––– 180 showing the A integral reverse ––– ––– 720 p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 180A, VGS = 0V ––– 300 450 ns TJ = 25°C, IF = 180A ––– 2.6 3.9 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L =43µH
ISD £ 180A, di/dt £83A/µs, VDD £ V(BR)DSS, TJ £ 150°C
Pulse width £ 300µs; duty cycle £ 2%.
RG = 25W , IAS = 180A. (See Figure 12)
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FB180SA10 1000
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
100
4.5V 10
20µs PULSE WIDTH TJ = 25 °C
1 0.1
1
10
4.5V
10
1 0.1
100
2.5
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
1000
TJ = 150 ° C
100
TJ = 25 ° C
10
V DS = 25V 20µs PULSE WIDTH 5
6
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
4
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20µs PULSE WIDTH TJ = 150 °C
10
ID = 180A
2.0
1.5
1.0
0.5
0.0 -60 -40 -20
VGS = 10V 0
20
40
60
80 100 120 140 160
TJ , Junction Temperature( ° C)
Fig 4. Normalized On-Resistance Vs. Temperature
3
FB180SA10 VGS = Ciss = Crss = Coss =
0V, f = 1MHz Cgs + Cgd , Cds SHORTED Cgd Cds + Cgd
15000
Ciss 10000
Coss 5000
Crss
20
VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
20000
ID = 180 A VDS = 80V VDS = 50V VDS = 20V
15
10
5
FOR TEST CIRCUIT SEE FIGURE 13
0
0 1
10
0
100
1000
150
200
250
300
350
400
10000
OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 150 ° C
100
1000
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
100
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
10
10us
100us
100
TJ = 25 ° C 1
1ms 10ms
10
0.1 0.2
V GS = 0 V 0.6
1.0
1.4
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
4
50
Q G , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
1.8
TC = 25 ° C TJ = 150 ° C Single Pulse
1 1
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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FB180SA10 200 175
VGS
D.U.T.
RG
150
I D , Drain Current (A)
RD
VDS
+
-VDD
125
10V Pulse Width £ 1 µs Duty Factor £ 0.1 %
100 75
Fig 10a. Switching Time Test Circuit 50
VDS 25
90%
0 25
50
75
100
125
150
TC , Case Temperature ( ° C) 10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50 0.1
0.01
0.20 0.10 0.05 0.02 0.01
P DM SINGLE PULSE (THERMAL RESPONSE)
t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC
0.001 0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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FB180SA10
1 5V
EAS , Single Pulse Avalanche Energy (mJ)
1500
ID 71A 100A BOTTOM 160A TOP
1200
L
VD S
D .U .T
RG
IA S 20V
D R IVE R
+ V - DD
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
900
600
300
0 25
50
75
100
125
150
Starting TJ , Junction Temperature( ° C)
V (B R )D S S tp
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS Current Regulator Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF .3µF
10 V QGS
+ V - DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
D.U.T.
QGD
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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FB180SA10 Peak Diode Recovery dv/dt Test Circuit +
D.U.T
Circuit Layout Considerations · Low Stray Inductance · Ground Plane · Low Leakage Inductance Current Transformer
+
-
-
+
RG
· · · ·
Driver Gate Drive P.W.
+
dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
D=
Period
-
VDD
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current
Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
Re-Applied Voltage
Body Diode
VDD
Forward Drop
Inductor Curent Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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FB180SA10 SOT-227 Package Details 38.3 0 ( 1.5 08 ) 37.8 0 ( 1.4 88 )
4 .40 (.1 73 ) 4 .20 (.1 65 )
C H AM FE R 2 .00 ( .0 79 ) X 4 5 7
LE A D A S S IG M E NT S E
-A 4
C
S 4 1
3 G E IG B T
25 .7 0 ( 1 .012 ) 25 .2 0 ( .9 92 )
6 .25 ( .246 ) 12.5 0 ( .49 2 )
A1
-B 1
D
R FU L L
7 .50 ( .295 )
15.00 ( .590 )
2 G S H E XFET
K2 3
4 1
2
3
2 K1 A2 H E X FR E D
3 0.2 0 ( 1.18 9 ) 2 9.8 0 ( 1.17 3 ) 4X 2.1 0 ( .082 ) 1.9 0 ( .075 )
8.10 ( .319 ) 7.70 ( .303 )
0.25 ( .010 ) M C A M B M 2.10 ( .08 2 ) 1.90 ( .07 5 )
12.30 ( .4 84 ) 11.80 ( .4 64 )
-C0.12 ( .005 )
Tube Q UANTITY PE R TUBE IS 1 0 M4 SR EW AND W ASHE R IN CLU DED
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