Transcript
®
INA
INA121
121
INA
121
FET-Input, Low Power INSTRUMENTATION AMPLIFIER FEATURES
DESCRIPTION
● LOW BIAS CURRENT: ±4pA ● LOW QUIESCENT CURRENT: ±450µA
The INA121 is a FET-input, low power instrumentation amplifier offering excellent accuracy. Its versatile three-op amp design and very small size make it ideal for a variety of general purpose applications. Low bias current (±4pA) allows use with high impedance sources.
● LOW INPUT OFFSET VOLTAGE: ±200µV ● LOW INPUT OFFSET DRIFT: ±2µV/°C ● LOW INPUT NOISE: 20nV/√Hz at f = 1kHz (G =100) ● HIGH CMR: 106dB ● WIDE SUPPLY RANGE: ±2.25V to ±18V ● LOW NONLINEARITY ERROR: 0.001% max ● INPUT PROTECTION TO ±40V ● 8-PIN DIP AND SO-8 SURFACE MOUNT
APPLICATIONS
Gain can be set from 1V to 10,000V/V with a single external resistor. Internal input protection can withstand up to ±40V without damage. The INA121 is laser-trimmed for very low offset voltage (±200µV), low offset drift (±2µV/°C), and high common-mode rejection (106dB at G = 100). It operates on power supplies as low as ±2.25V (+4.5V), allowing use in battery operated and single 5V systems. Quiescent current is only 450µA. Package options include 8-pin plastic DIP and SO-8 surface mount. All are specified for the –40°C to +85°C industrial temperature range.
● LOW-LEVEL TRANSDUCER AMPLIFIERS Bridge, RTD, Thermocouple ● PHYSIOLOGICAL AMPLIFIERS ECG, EEG, EMG, Respiratory ● HIGH IMPEDANCE TRANSDUCERS ● CAPACITIVE SENSORS ● MULTI-CHANNEL DATA ACQUISITION ● PORTABLE, BATTERY OPERATED SYSTEMS ● GENERAL PURPOSE INSTRUMENTATION
V+ 7 INA121
2
– VIN
Over-Voltage Protection
A1 40kΩ
1
G=1+
40kΩ
50kΩ RG
25kΩ A3
RG 8
+ VIN
3
6
VO
25kΩ
Over-Voltage Protection
5
A2 40kΩ
Ref
40kΩ
4 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ®
©1997 Burr-Brown Corporation
SBOS078
PDS-1412A 1
INA121
Printed in U.S.A. May, 1998
SPECIFICATIONS: VS = ±15V At TA = +25°C, VS = ±15V, RL = 10kΩ, and IA reference = 0V, unless otherwise noted. INA121P, U PARAMETER
CONDITIONS
INPUT Offset Voltage, RTI vs Temperature vs Power Supply Long-Term Stability Impedance, Differential Common-Mode Input Voltage Range Safe Input Voltage Common-Mode Rejection
VS = ±2.25V to ±18V
VO = 0V
VCM = –12.5V to 13.5V G=1 G = 10 G = 100 G = 1000
BIAS CURRENT vs Temperature Offset Current vs Temperature
VCM = 0V
NOISE, RTI Voltage Noise: f = 10Hz f = 100Hz f = 1kHz f = 0.1Hz to 10Hz Current Noise: f = 1kHz
RS = 0Ω G = 100 G = 100 G = 100 G = 100
GAIN Gain Equation Range of Gain Gain Error
MIN
TYP
INA121PA, UA MAX
MIN
86 100 106 106 ±4 See Typical Curve ±0.5 See Typical Curve
72 85 90 ±50
Nonlinearity
OUTPUT Voltage: Positive Negative Positive Negative Capacitance Load Drive Short-Circuit Current FREQUENCY RESPONSE Bandwidth, –3dB
±0.01 ±0.03 ±0.05 ±0.5 ±1 ±25
±0.05 ±0.4 ±0.5
VO = –14V to 13.5V G=1 G = 10 G = 100 G = 1000
±0.0002 ±0.0015 ±0.0015 ±0.002
±0.001 ±0.005 ±0.005
Overload Recovery
G=1 G = 10 G = 100 G = 1000 VO = ±10V, G ≤ 10 G = 1 to 10 G = 100 G = 1000 50% Input Overload
POWER SUPPLY Voltage Range Quiescent Current
IO = 0V
Slew Rate Settling Time, 0.01%
(V+)–1.5 (V–)+1
TEMPERATURE RANGE Specification Operating Storage Thermal Resistance, θJA 8-Lead DIP SO-8 Surface Mount
✻
±10 ±100
(V+)–0.9 (V–)+0.15 (V+)–0.9 (V–)+0.25 1000 ±14
✻ ✻
600 300 50 5 0.7 20 35 260 5 ±2.25
±15 ±450
–40 –55 –55 100 150
2
pA pA
nV/√Hz nV/√Hz nV/√Hz µVp-p fA/√Hz
±18 ±525
✻
85 125 125
✻ ✻ ✻
✻ ✻ ✻ ✻ ✻ ✻
±0.1 ±0.5 ±0.7
✻ ✻ ✻ ✻
±0.002 ±0.008 ±0.008
V/V V/V
✻ ✻
% % % % ppm/°C ppm/°C % % % %
of of of of
FSR FSR FSR FSR
✻ ✻ ✻ ✻ ✻ ✻
V V V V pF mA
✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻
kHz kHz kHz kHz V/µs µs µs µs µs
✻ ✻
✻ ✻
NOTE: (1) Temperature coefficient of the “Internal Resistor” in the gain equation. Does not include TCR of gain-setting resistor, RG.
INA121
✻
✻
✻ Specification same as INA121P, U.
®
V
✻ 10,000
VO = –14V to 13.5V G=1 G = 10 G = 100 G = 1000 G=1 G>1
RL = 100kΩ RL = 100kΩ RL = 10kΩ RL = 10kΩ
µV µV/°C µV/V µV/mo Ω || pF Ω || pF
dB dB dB dB
✻ ✻ ✻ ✻ ✻
1 + (50kΩ/RG)
Gain vs Temperature(1)
UNITS
✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻
30 21 20 1 1
1
MAX
±300±200/G ±1000±1000/G ✻ ±15±20/G ✻ ✻ ✻ ✻ ✻ ✻ ✻
±200±200/G ±500±500/G ±2±2/G ±5±20/G ±5±20/G ±50±150/G ±0.5 1012 || 1 1012 || 12 See Text and Typical Curves ±40 78 91 96
TYP
✻ ✻
V µA
✻ ✻ ✻
°C °C °C °C/W °C/W
ELECTROSTATIC DISCHARGE SENSITIVITY
PIN CONFIGURATION Top View
8-Pin DIP and SO-8
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
Top View RG
1
8
RG
V–IN
2
7
V+
+ IN
3
6
VO
V–
4
5
Ref
V
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage .................................................................................. ±18V Analog Input Voltage Range ............................................................. ±40V Output Short-Circuit (to ground) .............................................. Continuous Operating Temperature ................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability.
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE DRAWING NUMBER(1)
Single INA121P INA121PA INA121U " INA121UA "
8-Pin DIP 8-Pin DIP SO-8 Surface-Mount " SO-8 Surface-Mount "
006 006 182 " 182 "
SPECIFIED TEMPERATURE RANGE
PACKAGE MARKING
ORDERING NUMBER(2)
TRANSPORT MEDIA
–40°C to +85°C –40°C to +85°C –40°C to +85°C " –40°C to +85°C "
INA121P INA121PA INA121U " INA121UA "
INA121P INA121PA INA121U INA121U/2K5 INA121UA INA121UA/2K5
Rails Rails Rails Tape and Reel Rails Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA121U/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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INA121
TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
GAIN vs FREQUENCY
120
60
Gain (dB)
40
Common-Mode Rejection (dB)
50
G = 1000V/V
G = 100V/V
30 20
G = 10V/V
10 0
G = 1V/V
100 G = 1000V/V 80 G = 100V/V 60 40
G = 10V/V
20
G = 1V/V
–10
0
–20 1k
10k
100k
1M
10
10M
10k
100k
POSITIVE POWER SUPPLY REJECTION vs FREQUENCY
NEGATIVE POWER SUPPLY REJECTION vs FREQUENCY
1M
120
Power Supply Rejection (dB)
G = 1000V/V 100 G = 1000V/V
80
G = 100V/V
60
G = 10V/V 40 20
G = 1V/V
0
G = 100V/V
100 G = 10V/V 80
G = 1V/V
60 40 20 0
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
INPUT COMMON-MODE RANGE vs OUTPUT VOLTAGE, VS = ±15V
INPUT COMMON-MODE RANGE vs OUTPUT VOLTAGE, VS = ±5V, ±2.5V
1M
5
15
G ≥ 10
4
10 5
VO
– +
VD/2
0
+15V
+
VD/2
Ref
–
+ VCM
Common-Mode Voltage (V)
Common-Mode Voltage (V)
1k
Frequency (Hz)
120
Power Supply Rejection (dB)
100
Frequency (Hz)
–15V
–5 –10
G=1 G ≥ 10
–15 –15
–10
–5
0
5
10
G=1
2
G ≥ 10
1
G=1
0 –1 –2 –3
VS = ±5V VS = ±2.5V
–4 –5 –5
15
–4
–3
–2
–1
0
1
Output Voltage (V)
Output Voltage (V)
®
INA121
3
4
2
3
4
5
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE
10k
1m
1k
100µ
Input Bias Current (A)
Bias Current (pA)
INPUT BIAS CURRENT vs TEMPERATURE
100 10 IB
1
IOS
0.1 0.01 –75
10µ 10p 1p –10µ –100µ
–50
–25
0
25
50
75
100
125
Temperature (°C)
–1m –20
–15
–10
–5
0
5
10
15
20
Common-Mode Voltage (V)
SETTLING TIME vs GAIN
INPUT OVER-VOLTAGE V/I CHARACTERISTICS 1000
1 0.8
G = 1V/V Flat region represents normal linear operation.
0.4
G = 1000V/V
Settling Time (µs)
Input Current (mA)
0.6
0.2 0 –0.2
+15V
–0.4 G = 1V/V
–0.6
0.1%
G = 1000V/V VIN
–0.8
IIN
–15V 10
–1 –50 –40 –30
–20 –10
0
10
20
30
40
1
50
100
1000
Gain (V/V)
QUIESCENT CURRENT AND SLEW RATE vs TEMPERATURE
SHORT-CIRCUIT CURRENT vs TEMPERATURE 1.4
475
1.2 IQ
450
1
425
0.8 SR
400
±15
0.6
375 –50
–25
0
25
50
75
100
Short-Circuit Current (µA)
500
–75
10
Input Voltage (V)
Slew Rate (V/µs)
Quiescent Current (µA)
0.01% 100
±13 –ISC ±12
±11
±10 –75
0.4 125
Temperature (°C)
+ISC
±14
–50
–25
0
25
50
75
100
125
Temperature (°C)
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INA121
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
V+ +85°C
(V+) –0.6
+25°C
(V+) –0.9
–40°C, –55°C
(V+) –1.2
+125°C
(V+) –1.5 (V–) +1.5
+125°C
(V–) +1.2
+85°C
(V–) +0.9
+25°C
(V–) +0.6
–40°C, –55°C
(V–) +0.3 (V–) ±2
±4
±6
±8
±10
25 G=1 20 G = 1000 15 10 5
100
10k
INPUT OFFSET VOLTAGE WARM-UP
INPUT OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 18
8
16
6
14
4 2 0 –2 –4
8 6 4 2
100
0
500
400
300
200
Typical production distribution of packaged units.
10
–8 –10
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10
Time (µs)
Offset Voltage Drift (µV/°C)
INPUT-REFERRED NOISE VOLTAGE vs FREQUENCY
VOLTAGE NOISE 0.1 TO 10Hz INPUT-REFERRED, G ≥ 100
1000
G=1
100
0.5µV
G = 10 G = 100
10
G = 1000 (BW Limit)
1 10
100
1k
10k
Frequency (Hz)
1s /div
®
INA121
1M
12
–6
1
100k
Frequency (Hz)
10
0
1k
Output Current (mA)
Percent of Units (%)
Offset Voltage Change (µV)
G = 10 to 100
0 0
Voltage Noise (nV/√Hz)
Output Voltage Swing (V)
(V+) –0.3
Peak-to-Peak Output Voltage (Vp-p)
30
6
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE (G = 1, 10)
SMALL-SIGNAL STEP RESPONSE (G = 100, 1000)
G=1
G = 100
50mV/div
50mV/div
G = 10
G = 1000
10µs/div
100µs/div
LARGE-SIGNAL STEP RESPONSE (G = 1, 10)
LARGE-SIGNAL STEP RESPONSE (G = 100, 1000)
G=1
G = 100
5V/div
5V/div
G = 10
G = 1000
100µs/div
100µs/div
®
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INA121
APPLICATION INFORMATION
The 50kΩ term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip metal film resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA121.
Figure 1 shows the basic connections required for operation of the INA121. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 8Ω in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMR (G = 1).
The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to gain accuracy and drift can be directly inferred from the gain equation (1). Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater.
SETTING THE GAIN Gain of the INA121 is set by connecting a single external resistor, RG, connected between pins 1 and 8:
DYNAMIC PERFORMANCE The typical performance curve “Gain vs Frequency” shows that, despite its low quiescent current, the INA121 achieves wide bandwidth, even at high gain. This is due to the current-feedback topology of the INA121. Settling time also remains excellent at high gain.
(1)
50kΩ G = 1+ RG
Commonly used gains and resistor values are shown in Figure 1.
V+ 0.1µF
7 – VIN
DESIRED GAIN
RG (Ω)
NEAREST 1% RG (Ω)
1 2 5 10 20 50 100 200 500 1000 2000 5000 10000
NC 50.00k 12.50k 5.556k 2.632k 1.02k 505.1 251.3 100.2 50.05 25.01 10.00 5.001
NC 49.9k 12.4k 5.62k 2.61k 1.02k 511 249 100 49.9 24.9 10 4.99
2
INA121
Over-Voltage Protection
A1 40kΩ
1 25kΩ
G=1+ A3
RG
50kΩ RG
6 +
8
25kΩ
Load VO –
+ VIN
3
5
A2
Over-Voltage Protection
40kΩ
4
NC: No Connection.
V– Also drawn in simplified form: – VIN RG
INA121 Ref
+ VIN
FIGURE 1. Basic Connections.
®
INA121
+
– ) VO = G • (VIN – VIN
40kΩ
8
VO
0.1µF
40kΩ
Ref
The INA121 provides excellent rejection of high frequency common-mode signals. The typical performance curve, “Common-Mode Rejection vs Frequency” shows this behavior. If the inputs are not properly balanced, however, common-mode signals can be converted to differential sig– + nals. Run the VIN and VIN connections directly adjacent each other, from the source signal all the way to the input pins. If possible use a ground plane under both input traces. Avoid running other potentially noisy lines near the inputs.
Input circuitry must provide a path for this input bias current if the INA121 is to operate properly. Figure 3 shows various provisions for an input bias current path. Without a bias current return path, the inputs will float to a potential which exceeds the common-mode range of the INA121 and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 3). With higher source impedance, using two resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better high-frequency common-mode rejection.
NOISE AND ACCURACY PERFORMANCE The INA121’s FET input circuitry provides low input bias current and high speed. It achieves lower noise and higher accuracy with high impedance sources. With source impedances of 2kΩ to 50kΩ the INA114, INA128, or INA129 may provide lower offset voltage and drift. For very low source impedance (≤1kΩ), the INA103 may provide improved accuracy and lower noise. At very high source impedances (> 1MΩ) the INA116 is recommended.
Crystal or Ceramic Transducer
INA121
1MΩ
1MΩ
OFFSET TRIMMING The INA121 is laser trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed at the output. The op amp buffer provides low impedance at the Ref terminal to preserve good commonmode rejection. Trim circuits with higher source impedance should be buffered with an op amp follower circuit to assure low impedance on the Ref pin.
Thermocouple
INA121
10kΩ
INA121
– VIN RG + VIN
V+
VO INA121
Center-tap provides bias current return.
100µA 1/2 REF200
Ref
INA121
100Ω(1)
OPA277 ±10mV Adjustment Range
VREF
Bridge
10kΩ(1) Bridge resistance provides bias current return.
100Ω(1)
FIGURE 3. Providing an Input Common-Mode Current Path.
100µA 1/2 REF200
NOTE: (1) For wider trim range required in high gains, scale resistor values larger V–
INPUT COMMON-MODE RANGE The linear input voltage range of the input circuitry of the INA121 is from approximately 1.2V below the positive supply voltage to 2.1V above the negative supply. A differential input voltage causes the output voltage to increase. The linear input range, however, will be limited by the output voltage swing of amplifiers A1 and A2. So the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also depends on supply voltage—see typical performance curve “Input Common-Mode Range vs Output Voltage”.
FIGURE 2. Optional Trimming of Output Offset Voltage. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA121 is extremely high— approximately 1012Ω. However, a path must be provided for the input bias current of both inputs. This input bias current is typically 4pA. High input impedance means that this input bias current changes very little with varying input voltage.
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INA121
A combination of common-mode and differential input voltage can cause the output of A1 or A2 to saturate. Figure 4 shows the output voltage swing of A1 and A2 expressed in terms of a common-mode and differential input voltages. For applications where input common-mode range must be maximized, limit the output voltage swing by connecting the INA121 in a lower gain (see performance curve “Input Common-Mode Voltage Range vs Output Voltage”). If necessary, add gain after the INA121 to increase the voltage swing.
performance curves. Operation at very low supply voltage requires careful attention to assure that the input voltages remain within their linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power supply voltage. Typical performance curves, “Input Common-Mode Range vs Output Voltage” show the range of linear operation for ±15V, ±5V, and ±2.5V supplies. INPUT FILTERING The INA121’s FET input allows use of an R/C input filter without creating large offsets due to input bias current. Figure 5 shows proper implementation of this input filter to preserve the INA121’s excellent high frequency commonmode rejection. Mismatch of the common-mode input time constant (R1C1 and R2C 2), either from stray capacitance or mismatched values, causes a high frequency common-mode signal to be converted to a differential signal. This degrades common-mode rejection. The differential input capacitor, C 3, reduces the bandwidth and mitigates the effects of mismatch in C1 and C 2. Make C 3 much larger than C1 and C 2. If properly matched, C1 and C2 also improve ac CMR.
Input-overload can produce an output voltage that appears normal. For example, if an input overload condition drives both input amplifiers to their positive output swing limit, the difference voltage measured by the output amplifier will be near zero. The output of A3 will be near 0V even though both inputs are overloaded. LOW VOLTAGE OPERATION The INA121 can be operated on power supplies as low as ±2.25V. Performance remains excellent with power supplies ranging from ±2.25V to ±18V. Most parameters vary only slightly throughout this supply voltage range—see typical
VCM –
V+
G • VD 2
INA121 A1 40kΩ
VD 2
40kΩ
G=1+
25kΩ A3
RG
50kΩ RG
VO = G • V D
25kΩ
VD 2 A2
40kΩ
VCM
VCM +
G • VD 2
40kΩ
V–
FIGURE 4. Voltage Swing of A1 and A2.
f−3 d B = C1 –
R1
1 C1 4 π R1 C 3 + 2
+10V
G = 500
VIN
Bridge INA121
C3
R2 +
VO
RG 100Ω
INA121
Ref
VIN
C2
R1 = R2 C1 = C2 C3 ≈ 10C1
Ref
FET input allows use of large resistors and small capacitors.
FIGURE 5. Input Low-Pass Filter.
FIGURE 6. Bridge Transducer Amplifier.
®
INA121
10
VO
±6V to ±18V Isolated Power
C1
V+
V– ±15V
RG
C2
VO
INA121 Ref
–
VIN
R1
R2
INA121
1 2πR1C1
fc =
+
VO
ISO124
Ref
VIN
NOTE: To preserve good low frequency CMR, make R1 = R2 and C1 = C2.
Isolated Common
FIGURE 7. High-Pass Input Filter.
FIGURE 8. Galvanically Isolated Instrumentation Amplifier.
VIN OPA277 – VIN +
RG
INA121 Ref
C1 50nF
VO
C1 0.1µF
R1 1MΩ
R1 10kΩ INA121 1 f–3dB = 2πR1C1
OPA277
RG
R2
Ref IL =
= 1.59Hz
Make G ≤ 10 where G = 1 + 50k RG
FIGURE 9. AC-Coupled Instrumentation Amplifier.
VIN G • R2
Load
FIGURE 10. Voltage Controlled Current Source.
VAC R1
R2
C1
C2 Null
RG
Transducer
INA121
VO
Ref
FIGURE 11. Capacitive Bridge Transducer Circuit.
®
11
INA121
+5V VREF Channel 1
VIN
+ – +In
MPC800 MUX Channel 8
VIN
12 Bits Out Serial
ADS7816
INA121
RG
–In
+ –
Ref
FIGURE 12. Multiplexed-Input Data Acquisition System.
–
VIN
22.1kΩ 22.1kΩ
+ VIN
511Ω
VO
INA121 Ref
100Ω NOTE: Driving the shield minimizes CMR degradation due to unequally distributed capacitance on the input line. The shield is driven at approximately 1V below the common-mode input voltage.
OPA130
For G = 100 RG = 511Ω // 2(22.1kΩ) effective RG = 505Ω
FIGURE 13. Shield Driver Circuit.
RG = 5.6kΩ 2.8kΩ G = 10 LA
RA
RG/2
INA121
VO
Ref 2.8kΩ 390kΩ Low bias current allows use with high electrode impedances.
1/2 OPA2131
RL
VG 10kΩ
390kΩ
FIGURE 14. ECG Amplifier With Right-Leg Drive.
®
INA121
12
1/2 OPA2131
VG NOTE: Due to the INA121’s current-feedback topology, VG is approximately 0.7V less than the common-mode input voltage. This DC offset in this guard potential is satisfactory for many guarding applications.
PACKAGE OPTION ADDENDUM www.ti.com
3-Oct-2003
PACKAGING INFORMATION ORDERABLE DEVICE
STATUS(1)
PACKAGE TYPE
PACKAGE DRAWING
PINS
PACKAGE QTY
INA121P
ACTIVE
PDIP
P
8
50
INA121PA
ACTIVE
PDIP
P
8
50
INA121U
ACTIVE
SOIC
D
8
100
INA121U/2K5
ACTIVE
SOIC
D
8
2500
INA121UA
ACTIVE
SOIC
D
8
100
INA121UA/2K5
ACTIVE
SOIC
D
8
2500
(1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
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