Transcript
FlexLight X1 Keynote Photonics
April, 2011 Cannot be reproduced without permission from Keynote Photonics Copyright Keynote Photonics, LLC
X1 Overview uC
HDMI-A
• •
.95” 1080P or .96” WUXGA DMD Dual-Channel HDMI 60 Hz, 1080P
HDMI I/F
HDMI-B
Data
System Sync IIC
Lamp or LED Synchronization
•
Integrated Sequences
Bit-Raster
GPIO
Generator FlexBridge FPGA
zzzz
•
IIC accessible registers to configure.
•
Multiple Triggers (VSYNC or Ext. Trigger)
•
External Sync Out
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and Timing
DLP Chipset
+12 VDC
•
Formatting
LAMP/LED Control
Comparison Discovery 4100
FlexLight X1
System Sync IIC GPIO
HDMI I/F Data
•
High Bandwidth, Flexible (up to 32 K bit-plane/sec)
•
TI provided .DLL API interface
•
1080P, WUXGA, XGA
•
User programmed control processor (“C”). Open source.
•
Integrated sequences and support for lamp and solid-state illumination sources.
•
Versatile bit-pattern generation.
Formatting and Timing
DLP Chipset
•
LAMP/LED
Dual-port HDMI interface.
Control
Bit-Raster Generator
+12 VDC
User developed FPGA VHDL solution and sequence required.
uC
HDMI-A HDMI-B
•
FlexBridge
•
1080P, WUXGA
•
Mid-range bandwidth (~13 K bit-plane/sec out)
FPGA
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Signal Input Modes •Single Port
1080P, 60 Hz, 30-bits/pixel Any HDMI input
•Dual Port, 60 Hz
1920x1024, 60 Hz x 2 @ 60 bits/pixel (960x1080, 150 Hz x 2 @ 30 bits/pixel planned)
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X1 Pattern Capability Binary patterns for each bit-plane •
Horizontal, Vertical •
Variable duty cycle, variable frequency
•
Phase shift (Offset)
3-Phase Sine Patterns •
Horizontal, Vertical
•
Independent color amplitude
User Defined 1D Function •
Horizontal, Vertical
•
Independent color amplitude
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Bit-Plane Mapping 54.6+%7*809%:;3<0=%!"#$/!$&$%.*/01,=%'$()*+,-.*/01%
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•Each bit-plane is loaded into the DMD sequentially.
•The order and duration of bit-planes from
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•Dual-port mode support up to 60 bit-
planes/pixel. Single-port support up to 30 <=>?@# bit-planes/pixel.
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PWM Modes • Video • 2D Video • 3D Video (60 Hz, 120 Hz) • Non-Video • Gray Code • 3-Phase • Bit-Plane Direct Cannot be reproduced without permission from Keynote Photonics Copyright Keynote Photonics, LLC
Gray Code Some applications require the use of simple on and off patterns that require relatively few intensity steps. However the “on” time of the PWM is desired to be contiguous in time to provide a faster shutter time on the camera system to minimize possible blurring of the object of interest.
Example 3-Phase Structured Light Input (HDMI or BRG) Sequence: 3-Phase
Output (camera)
ϕ1 ϕ2 time
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ϕ3
Bit-Plane Direct 4 Bit-plane Example !"#$%&'()*+*
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Summary • User programmable platform without VHDL. Adaptable to other DMD sizes.
• Ideal for applications or early development needing mid-range DLP performance.
• Stand-alone or host-PC operating configurations.
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Thank You !
