Transcript
To our customers,
Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com
April 1st, 2010 Renesas Electronics Corporation
Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry.
Notice 1.
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. Renesas Electronics products are classified according to the following three quality grades: “Standard”, “High Quality”, and “Specific”. The recommended applications for each Renesas Electronics product depends on the product’s quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as “Specific” without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as “Specific” or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is “Standard” unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. “Standard”:
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(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
HAT3021R Silicon N/P Channel Power MOS FET Power Switching REJ03G0415-0200 Rev.2.00 Oct.06.2004
Features • Capable of 4.5 V gate drive • Low drive current • High density mounting
Outline SOP-8 7 8 D D
2 G
5 6 D D
4 G
8
7
65
3 1 2 S1
S3
Nch
Pch
4
1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain
Absolute Maximum Ratings (Ta = 25°C) Item
Symbol
Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel temperature
VDSS VGSS ID ID(pulse)Note1 IDR Pch Note2 Tch
Ratings Nch
Pch
80 ±20 3.4 20.4 3.4 1.5
–80 ±20 –2.6 –15.6 –2.6 1.5 150
Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s
Rev.2.00, Oct.06.2004, page 1 of 10
Unit V V A A A W °C °C
HAT3021R
Electrical Characteristics (Ta = 25°C) • N Channel Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 4. Pulse test
Rev.2.00, Oct.06.2004, page 2 of 10
Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on)
Min 80 ±20 — — 1.0 — — 4.2 — — — — — — —
Typ — — — — — 90 100 7.0 400 57 24 7.3 1.1 1.3 6.0
Max — — ± 10 1 2.5 115 145 — — — — — — — —
Unit V V µA µA V mΩ mΩ S pF pF pF nC nC nC ns
tr
— — — — —
4.0 39 3.5 0.83 30
— — — 1.08 —
ns ns ns V ns
td(off) tf VDF trr
Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 80 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 1.7 A, VGS = 10 V Note4 ID = 1.7 A, VGS = 4.5 V Note4 ID = 1.7 A, VDS = 10 V Note4 VDS = 10 V VGS = 0 f = 1 MHz VDD = 25 V VGS = 10 V ID = 3.4 A VGS = 10 V, ID = 1.7 A VDD ≅ 30 V RL = 17.6 Ω Rg = 4.7 Ω IF = 3.4 A, VGS = 0 Note4 IF = 3.4 A, VGS = 0 diF/ dt = 100 A/ µs
HAT3021R • P Channel Item Drain to source breakdown voltage
Symbol V(BR)DSS
Min –80
Typ —
Max —
Unit V
Test Conditions ID = –10 mA, VGS = 0
Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance
V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off)
±20 — — –1.0 — — 2.0 — — — — — — — — —
— — — — 165 200 3.3 930 90 56 16 2.1 2.4 20 12 40
— ±10 –1 –2.5 210 290 — — — — — — — — — —
V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns
IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = –80 V, VGS = 0 VDS = –10 V, I D = –1 mA ID = –1.3 A, VGS = –10 V Note4 ID = –1.3 A, VGS = – 4.5 V Note4 ID = –1.3 A, VDS = –10 V Note4 VDS = –10 V VGS = 0 f = 1MHz
tf VDF trr
— — —
5.5 –0.83 30
— –1.08 —
ns V ns
Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 4. Pulse test
Rev.2.00, Oct.06.2004, page 3 of 10
VDD = –25 V VGS = –10 V ID = -2.6 A VGS = –10 V, ID = –1.3 A VDD ≈ –30 V RL = 23.0 Ω Rg = 4.7 Ω IF = –2.6 A, VGS = 0 Note4 IF = –2.6 A, VGS = 0 diF/ dt =100A/µs
HAT3021R
Main Characteristics • N Channel Power vs. Temperature Derating
3.0
2.0
1.0
10 10 µs 0µ 1m s s
10
ID (A)
Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s
PW DC
1
Drain Current
Pch (W) Channel Dissipation
Maximum Safe Operation Area
100
4.0
=1
0m
s(
Op
era
0.1 Operation in
1s
tio
n(
PW
this area is limited by RDS(on)
ho
t)
≤1
No
0 ste 4 )
0.01 Ta = 25°C
0
50
100
Ambient Temperature
150
200
0.001 1 shot Pulse 0.1 1
10
100
Drain to Source Voltage VDS (V)
Ta (°C)
Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics
3.2 V
5
3.0 V
VGS = 2.8 V
VDS = 10 V Pulse Test ID (A)
4.5 V 10 V
Drain Current
Drain Current
Typical Transfer Characteristics 10
3.4 V
ID (A)
10
5
Pulse Test
500
5 Drain to Source Voltage VDS
Drain to Source Saturation Voltage vs Gate to Source Voltage Pulse Test
400
300 200
ID = 2 A
100
1A 0.5 A
0
15 5 10 20 Gate to Source Voltage VGS (V)
Rev.2.00, Oct.06.2004, page 4 of 10
0
10 (V)
5 (V)
Static Drain to Source on State Resistance vs. Drain Current 1000
Static Drain to Source on State Resistance RDS(on) (mΩ)
Drain to Source Voltage VDS(on) (mV)
0
Tc = 75°C 25°C −25°C 2 3 4 Gate to Source Voltage VGS
100
VGS = 4.5 V 10 V
10 0.1
Pulse Test 1 Drain Current
10 ID (A)
100
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance vs. Temperature 250 Pulse Test ID = 0.5 A, 1 A, 2 A
200
150 VGS = 4.5 V 0.5 A, 1 A, 2 A
100
50 0 -25
10 V
0 25 50 75 100 125 150 Case Temperature Tc (°C)
Forward Transfer Admittance vs. Drain Current
100 30
Tc = –25°C
10 3 1 0.3 0.1
25°C 75°C
0.01 0.01
1
3
10
ID (A)
Typical Capacitance vs. Drain to Source Voltage Ciss
500
50
20 di / dt = 100 A / µs VGS = 0, Ta = 25°C 1
3 Reverse Drain Current
200 100 50
Coss
20
Crss
10 5
VGS = 0 f = 1 MHz
2
0
10 IDR (A)
VDD = 50 V 25 V 10 V
VDS
12
40
8
20
0
4
VDD = 50 V 25 V 10 V 2
4
Gate Charge
Rev.2.00, Oct.06.2004, page 5 of 10
6
8
Qg (nC)
40
50
0 10
td(off)
50 Switching Time t (ns)
60
VGS
16
VGS
80
30
Switching Characteristics (V)
ID = 3.4 A
20
100
20
Gate to Source Voltage
100
10
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics VDS (V)
0.3
1000
10
Drain to Source Voltage
0.03 0.1
Drain Current
Body-Drain Diode Reverse Recovery Time
100
VDS = 10 V Pulse Test
0.03
Capacitance C (pF)
Reverse Recovery Time trr (ns)
Static Drain to Source on State Resistance RDS(on) (mΩ)
HAT3021R
20
tf
10 5
td(on) tr
2 VGS = 10 V, VDD = 30 V Rg = 4.7 Ω, duty ≤ 1 % 1 0.1 0.2 1 2 0.5 5 Drain Current ID (A)
10
HAT3021R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A)
10 10 V
5
5V
VGS = 0 V, –5 V
Pulse Test 0
0.4
0.8
1.2
1.6
Source to Drain Voltage
2.0
VSD (V)
Normalized Transient Thermal Impedance γs (t)
Normalized Transient Thermal Impedance vs. Pulse Width 10
D=1 0.5
1
0.2 0.1 0.05
0.1
θch - f(t) = γs (t) x θch - f θch - f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm)
0.02 1 0.0 lse t pu o h 1s
0.01
PDM
D=
0.001
PW T
PW T
0.0001 10 µ
100 µ
1m
10 m
100 m 1 10 Pulse Width PW (S)
Switching Time Test Circuit
1000
90%
D.U.T. RL Vin
Vin 10 V
V DS = 30 V
Vout
10% 10% 90%
td(on)
Rev.2.00, Oct.06.2004, page 6 of 10
10000
Switching Time Waveform Vout Monitor
Vin Monitor Rg
100
tr
10% 90% td(off)
tf
HAT3021R • P Channel Power vs. Temperature Derating
3.0
10 µs
2.0
1.0
10
ID (A)
Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s
Drain Current
Pch (W) Channel Dissipation
Maximum Safe Operation Area
100
4.0
PW
1
DC
10 0 1 m µs s
=1
0m
s(
Op
era
0.1
1s
tio
n(
PW
Operation in this area is 0.01 limited by RDS(on)
ho
t)
≤ 1Note 0s 4 )
Ta = 25°C
0
50
100
Ambient Temperature
150
200
0.001 1 shot Pulse 0.1 1
10
100
Drain to Source Voltage VDS (V)
Ta (°C)
Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics –5.0
Typical Transfer Characteristics –5
-10 V -4.5 V
–4
–2.5 VGS = -2.8 V
Drain Current
ID (A)
ID (A) Drain Current
VDS = 10 V Pulse Test
-3.0 V
–3
–2 Tc = 75°C 25°C
–1
−25°C
Pulse Test
–1000
–5 Drain to Source Voltage VDS
Drain to Source Saturation Voltage vs Gate to Source Voltage Pulse Test
–800
–600
–400
ID = –2 A
–200
–1 A –0.5 A
0
–4 –8 –12 Gate to Source Voltage
Rev.2.00, Oct.06.2004, page 7 of 10
0
–10 (V)
–16 –20 VGS (V)
–2 –4 –6 Gate to Source Voltage
–8 VGS
–10 (V)
Static Drain to Source on State Resistance vs. Drain Current 1000 Pulse Test
Static Drain to Source on State Resistance RDS(on) (mΩ)
Drain to Source Voltage VDS(on) (mV)
0
VGS = –4.5 V 100
10 –0.1
–10 V
–1 Drain Current
–10 ID (A)
Static Drain to Source on State Resistance vs. Temperature 500 Pulse Test
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance RDS(on) (mΩ)
HAT3021R
–2 A
400 ID = –0.5 A, –1 A 300 VGS = 4.5 V 200
–0.5 A, –1 A, –2 A
100
10 V
0 -25
0 25 50 75 100 125 150 Case Temperature Tc (°C)
Forward Transfer Admittance vs. Drain Current
10 5
Tc = –25°C
2 1 0.5 25°C 0.2 75°C
0.1 0.05
VDS = 10 V Pulse Test
0.02 0.01 0
–0.03 –0.1 –0.3 Drain Current
Reverse Recovery Time trr (ns)
100
Capacitance C (pF)
50
20
10 –0.1
di / dt = –100 A / µs VGS = 0, Ta = 25°C
2000
Ciss
1000 500 200 100
Coss
50
Crss
20 10
0
–0.3 –1 –3 –10 Reverse Drain Current IDR (A)
–8
VGS
–12
–80
–16 ID = –2.6 A 4 8 12 16 Gate Charge Qg (nC)
Rev.2.00, Oct.06.2004, page 8 of 10
–20 20
VGS
–4
50 Switching Time t (ns)
VDS
(V)
VDD = –50 V –25 V –10 V
VDD = –50 V –25 V –10 V
–30
–40
–50
100
0
–40
–20
Switching Characteristics
0
–20
–10
Drain to Source Voltage VDS (V)
Gate to Source Voltage
VDS (V)
ID (A)
VGS = 0 f = 1 MHz
Dynamic Input Characteristics
Drain to Source Voltage
–10
10000 5000
–100 0
–3
Typical Capacitance vs. Drain to Source Voltage
Body-Drain Diode Reverse Recovery Time
–60
–1
20
td(off) tr td(on)
10 tf
5 2 1 –0.1
VGS = –10 V, VDS = –30 V Rg = 4.7 Ω, duty ≤ 1 % –1 Drain Current
–10 ID (A)
HAT3021R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A)
–5.0 –10 V –5 V
–2.5 VGS = 0V, 5 V
Pulse Test 0
–0.4
–0.8
–1.2
–1.6
Source to Drain Voltage
–2.0
VSD (V)
Normalized Transient Thermal Impedance γs (t)
Normalized Transient Thermal Impedance vs. Pulse Width 10
1
D=1 0.5 0.2
0.1
0.1
θch - f(t) = γs (t) x θch - f θch - f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm)
0.05
0.02 0.01
0.01
e
uls
PDM
p ot
D=
h
1s
PW T
PW T
0.001 10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Switching Time Test Circuit Vout Monitor
Vin Monitor Rg
Switching Time Waveform Vin 10%
D.U.T. RL
90% Vin -10 V
V DD = -30 V Vout td(on)
Rev.2.00, Oct.06.2004, page 9 of 10
90%
90%
10%
10% tr
td(off)
tf
HAT3021R
Package Dimensions As of January, 2003 Unit: mm
3.95
4.90 5.3 Max 5 8
1
1.75 Max
*0.22 ± 0.03 0.20 ± 0.03
4
0.75 Max
+ 0.10
6.10 – 0.30
1.08
1.27
*0.42 ± 0.08 0.40 ± 0.06
0.14 – 0.04
+ 0.11
0˚ – 8˚ + 0.67 0.60 – 0.20
0.15 0.25 M *Dimension including the plating thickness Base material dimension
Package Code JEDEC JEITA Mass (reference value)
FP-8DA Conforms — 0.085 g
Ordering Information Part Name HAT3021R-EL-E
Quantity 2500 pcs
Shipping Container Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.2.00, Oct.06.2004, page 10 of 10
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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© 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0
