Transcript
IRFH9310PbF HEXFET® Power MOSFET
VDS
-30
RDS(on) max
V S S
6 mm
mΩ nC
RG (typical)
110 2.8
ID
-21
A
(@VGS = 10V)
Qg (typical)
(@TA = 25°C)
D
S
D 5 mm
4.6
G
D
Ω
D
PQFN 5mm x 6mm
Applications
• Charge and Discharge Switch for Notebook PC Battery Application
Features and Benefits Resulting Benefits
Features
Low RDSon (≤ 4.6mΩ) Industry-Standard PQFN Package RoHS Compliant Containing no Lead, no Bromide and no Halogen
Orderable part number
Package Type
IRFH9310TRPBF
PQFN 5mm x 6mm
Lower Conduction Losses results in Multi-Vendor Compatibility ⇒ Environmentally Friendlier
Standard Pack Form Quantity Tape and Reel 4000
Note
Absolute Maximum Ratings VDS VGS ID @ TA = 25°C ID @ TA = 70°C ID @ TC = 25°C ID @ TC = 70°C ID @ TC = 25°C IDM PD @TA = 25°C PD @ TA = 70°C TJ TSTG
Max. -30 ± 20
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V (Silicon Limited) Continuous Drain Current, VGS @ -10V (Silicon Limited) Continuous Drain Current, VGS @ -10V (Package Limited)
c
Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range
f f
-21 -17 -107 - 86 -40 -170 3.1 2.0 0.025 -55 to + 150
Units V
A
W W/°C °C
Notes through are on page 2 1
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IRFH9310PbF
Static @ TJ = 25°C (unless otherwise specified) Min.
Typ.
Max.
Units
BVDSS
Drain-to-Source Breakdown Voltage
Parameter
-30
–––
–––
V
∆ΒVDSS/∆TJ RDS(on)
Breakdown Voltage Temp. Coefficient
––– –––
0.020 3.7
––– 4.6
V/°C
Static Drain-to-Source On-Resistance
mΩ
Conditions VGS = 0V, ID = -250µA Reference to 25°C, ID = -1mA VGS = -10V, ID = -21A VGS = -4.5V, ID = -17A
e e
–––
5.7
7.1
VGS(th)
Gate Threshold Voltage
-1.3
-1.9
-2.4
V
∆VGS(th)
Gate Threshold Voltage Coefficient
–––
-5.8
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
––– –––
––– –––
-1.0 -150
µA
VDS = -24V, VGS = 0V VDS = -24V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
––– –––
––– –––
-100 100
nA
VGS = -20V VGS = 20V
gfs Qg
Forward Transconductance Total Gate Charge
39 –––
––– 58
––– –––
S nC
110 17
165 –––
nC
Qg Qgs
h Total Gate Charge h
Gate-to-Source Charge
––– –––
Qgd
Gate-to-Drain Charge
–––
28
–––
RG td(on)
Gate Resistance Turn-On Delay Time
––– –––
2.8 25
––– –––
tr td(off)
Rise Time Turn-Off Delay Time
––– –––
47 65
––– –––
tf Ciss
Fall Time Input Capacitance
––– –––
70 5250
––– –––
Coss Crss
Output Capacitance Reverse Transfer Capacitance
––– –––
1300 880
––– –––
h
h h
VDS = VGS, ID = -100µA
VDS = -10V, ID = -17A VDS = -15V,VGS = -4.5V,ID = - 17A VGS = -10V VDS = -15V ID = -17A
Ω VDD = -15V, VGS = -4.5V ns
ID = -1.0A
e
RG = 1.8Ω See Figs. 19a & 19b VGS = 0V
pF
VDS = -15V ƒ = 1.0MHz
Avalanche Characteristics Parameter EAS
Single Pulse Avalanche Energy
IAR
Avalanche Current
Diode Characteristics
c
d
Parameter
Min.
IS
Continuous Source Current
ISM
(Body Diode) Pulsed Source Current
Typ.
Typ.
Max.
Units
–––
170
mJ
–––
-17
A
Max.
–––
–––
-3.1
–––
–––
-170
Units A
c
(Body Diode)
Conditions MOSFET symbol showing the integral reverse
D
G
p-n junction diode.
S
e
VSD
Diode Forward Voltage
–––
–––
-1.2
V
TJ = 25°C, IS = -3.1A, VGS = 0V
trr
Reverse Recovery Time
–––
42
63
ns
TJ = 25°C, IF = -3.1A, VDD = -24V
Qrr
Reverse Recovery Charge
–––
42
63
nC
di/dt = 100/µs
Thermal Resistance Parameter
g
RθJC
Junction-to-Case
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient (t<10s)
f
f
Typ.
Max.
–––
1.6
–––
40
–––
35
e
Units °C/W
Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 1.1mH, RG = 50Ω, IAS = -17A. Pulse width ≤ 400µs; duty cycle ≤ 2%. When mounted on 1 inch square copper board.
Rθ is measured at TJ of approximately 90°C. For DESIGN AID ONLY, not subject to production testing.
2
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IRFH9310PbF
1000
1000
100 BOTTOM
TOP
-ID, Drain-to-Source Current (A)
-ID, Drain-to-Source Current (A)
TOP
VGS -10V -5.0V -4.5V -3.5V -3.3V -3.1V -2.9V -2.7V
100
10
1
2.7V
≤60µs PULSE WIDTH
BOTTOM
10 -2.7V ≤60µs PULSE WIDTH Tj = 150°C
Tj = 25°C
1
0.1 0.1
1
10
0.1
100
1000
100
1.6 RDS(on) , Drain-to-Source On Resistance (Normalized)
-I D, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
100
10 T J = 25°C
TJ = 150°C 1
VDS = -15V ≤60µs PULSE WIDTH 0.1
ID = -21A
VGS = -10V
1.4
1.2
1.0
0.8
0.6
1
2
3
4
5
-60 -40 -20 0
Fig 3. Typical Transfer Characteristics 100000
Fig 4. Normalized On-Resistance vs. Temperature 12.0
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
-V GS, Gate-to-Source Voltage (V)
ID= -17A
C oss = C ds + C gd
10000
Ciss Coss Crss
1000
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
-VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
1
-V DS, Drain-to-Source Voltage (V)
-V DS, Drain-to-Source Voltage (V)
10.0 VDS= -24V VDS= -15V VDS = -6.0V
8.0 6.0 4.0 2.0 0.0
100 1
10
0
100
25
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage www.irf.com © 2014 International Rectifier
50
75
100
125
QG Total Gate Charge (nC)
-VDS, Drain-to-Source Voltage (V)
3
VGS -10V -5.0V -4.5V -3.5V -3.3V -3.1V -2.9V -2.7V
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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IRFH9310PbF 1000
-I D, Drain-to-Source Current (A)
-I SD, Reverse Drain Current (A)
1000
OPERATION IN THIS AREA LIMITED BY R DS(on) 100µsec
100
100 T J = 150°C
T J = 25°C
10
1msec 10
1
T A = 25°C Tj = 150°C Single Pulse
VGS = 0V 1.0
0.1 0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
0
1
10
100
-VDS, Drain-to-Source Voltage (V)
-VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area 2.2 -V GS(th), Gate threshold Voltage (V)
25
20 -I D, Drain Current (A)
10msec
DC
15
10
5
2.0 1.8 1.6
ID = -100µA
1.4 1.2 1.0
0 25
50
75
100
125
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T A , Ambient Temperature (°C)
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Ambient Temperature
Thermal Response ( Z thJA ) °C/W
100 D = 0.50 10
0.20 0.10 0.05
1
0.02 0.01
0.1
0.01
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + T A
SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 4
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IRFH9310PbF RDS(on), Drain-to -Source On Resistance ( mΩ)
RDS(on), Drain-to -Source On Resistance (m Ω)
12 ID = -21A 10 8 T J = 125°C
6 4
T J = 25°C
2 0 2
4
6
8
10
12
14
16
18
8 Vgs = -4.5V 6
4 Vgs = -10V 2
0
20
0
20
-V GS, Gate -to -Source Voltage (V)
60
100
120
50000
ID TOP -2.0A -3.1A BOTTOM -17A
40000
Power (W)
600
400
200
30000
20000
10000
0 1E-8 1E-7 1E-6 1E-5 1E-4 1E-3 1E-2 1E-1
0 25
50
75
100
125
150
Time (sec)
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
D.U.T *
Fig 15. Typical Power vs. Time
Driver Gate Drive
+
+
*
D.U.T. ISD Waveform Reverse Recovery Current
+
• • • •
di/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
+ -
Re-Applied Voltage
Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
Body Diode
VDD
Forward Drop
Inductor Current Inductor Curent Ripple ≤ 5%
Reverse Polarity of D.U.T for P-Channel
P.W. Period VGS=10V
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
D=
Period
P.W.
-
-
*
80
Fig 13. Typical On-Resistance vs. Drain Current
800
RG
40
-I D, Drain Current (A)
Fig 12. On-Resistance vs. Gate Voltage EAS , Single Pulse Avalanche Energy (mJ)
10
ISD
* VGS = 5V for Logic Level Devices
Fig 16. Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs 5
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IRFH9310PbF
Id Vds Vgs
L VCC
DUT
0
20K 1K
Vgs(th)
SS
Qgodr
Fig 17a. Gate Charge Test Circuit
I AS
D.U.T
RG
IAS
-V GS -20V
tp
Qgs2 Qgs1
Fig 17b. Gate Charge Waveform
L
VDS
Qgd
VDD A
DRIVER 0.01Ω
tp V(BR)DSS 15V
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
VDS
RD td(on)
VGS RG
t d(off)
tf
VGS
D.U.T.
-
+
10% V DD
-VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 19a. Switching Time Test Circuit
6
tr
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90% VDS
Fig 19b. Switching Time Waveforms
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IRFH9310PbF PQFN Package Details
PQFN Part Marking INTERNATIONAL RECTIFIER LOGO
6
DATE CODE
ASSEMBLY SITE CODE (Per SCOP 200-002)
XXXX XYWWX XXXXX
PART NUMBER MARKING CODE (Per Marking Spec.)
PIN 1 IDENTIFIER LOT CODE (Eng Mode - Min. last 4 digits of EATI #) (Prod Mode - 4 digits SPN code)
TOP MARKING (LASER)
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ 7
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IRFH9310PbF PQFN Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
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IRFH9310PbF Qualification Information† Qualification level
Moisture Sensitivity Level
Consumer
††
(per JEDEC JESD47F
†††
guidelines) MSL2
PQFN 5mm x 6mm
†††
(per JEDEC J-STD-020D
)
Yes
RoHS Compliant
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/ Applicable version of JEDEC standard at the time of product release. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/
Revision History Date 8/19/2014
Comments • Updated datasheet as per new IR Corporate Template • Updated data sheet with latest PQFN Tape and Reel Diagram.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 9
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