Hmc832lp6g Eval. Pcb Schematic Pdf

Transcript

Analog Devices Welcomes Hittite Microwave Corporation NO CONTENT ON THE ATTACHED DOCUMENT HAS CHANGED www.analog.com www.hittite.com THIS PAGE INTENTIONALLY LEFT BLANK 6 5 4 3 2 1 REVISIONS REV ECN# ZONE B CP120985 ----- C CP121326 ----- DESCRIPTION CHANGE AS PER CP120985 CHANGE AS PER CP121326 NAME DATE D. ACEVAL 07/10/2012 D. ACEVAL 10/12/2012 D D 2 3.3V JP1 3.3V 50 Ohm Co-Planar Trace 1 XREFP R19 R44 100K 51 C28 C25 4.7UF 0.47UF A1 CEN DEPOP VTUNE C R30 A 0.001uF R15 11 12 N/C 13 N/C 14 N/C 16 XREFP 17 DVDD 19 18 CEN N/C 3 1 DEPOP 0.47UF U2 10UF R1 R28 0 0 4.7UF TP1 390 C36 430 DEPOP C3 C43 200pF C4 390PF DEPOP C2 0.027uF 3.3V C18 C14 0.47UF C20 4.7UF C16 0.47UF 0.47UF DEPOP Lock Detect J7 1 2 NC NC NC NC 390 B C13 0.001UF C10 R2 R4 47NH 22PF Header to USB Board 270pF L1 C15 V_IO C40 VCCCP R16 DEPOP C1 R3 C19 BIAS VCCPD NC 2 AVDD 40 31 50 Ohm Co-Planar Trace 4 N/C NC RFOUT_P SDI C9 J3 SEN VTUNE 5 VPPCP 39 30 0.001uF OUT_P EN LOOP FILTER 0.47UF 6 CP CONTROL N/C 29 15 NC NC NC NC 50 Ohm Co-Planar Trace EN 38 RFOUT_N 28 OUT_N C21 7 N/C VCC1 NC NC 8 VDDLS PUMP CHARGE 37 J4 N/C MODULATOR N/C C26 1,2,4,6...62 9 NC NC 27 N/C CAL VCCPS 26 DIVIDER 10 N/C N/C 35 25 DETECTOR FREQ. PHASE N/C VCC2 VCCHF 24 34 22PF RVDD DIVIDER N VTUNE N/C 0.47UF 23 LD/SDO C23 N/C 33 C24 0.47UF DIVIDER R 32 22 N/C SCK 21 N/C N/C R39 0 C22 1 B NOTICE OF PROPRIETARY PROPERTY: THIS DOCUMENT AND THE INFORMATION CONTAINED IN IT ARE THE PROPRIETARY PROPERTY OF HITTITE MICROWAVE CORPORATION. IT MAY NOT BE COPIED OR USED IN ANY MANNER NOR MAY ANY OF THE INFORMATION IN OR UPON IT BE USED FOR ANY PURPOSE WITHOUT THE EXPRESSED WRITTEN CONSENT OF AN AUTHORIZED AGENT OF HITTITE MICROWAVE CORPORATION. VCC1 N/C HMC832LP6GE 20 DEPOP 36 C 3.3V 4 3 6 5 8 7 10 9 12 11 SCK SDI SDO SEN REG_EN(AD4) SSW-106-01-T-D R40 TP4 20K HITTITE MICROWAVE CORPORATION R41 20K A 20 Alpha Rd Chelmsford, MA 01824 DEPOP TITLE SCH, EVAL CUSTOMER PROJECT DRAWING #: DRAWN BY 6 5 4 3 2 SHEET 130-00451-00 D.YOUNG 1 CODE ID NO. DATE 1CN88 11/18/10 1 OF SIZE 2 REV C 12-10-2012_14:08 C 6 5 TPLL/TCXO DIVIDER CONTROL D0 0 1 0 1 2 1 50 Ohm Co-Planar Trace TPLL R43 VCXO R38 R20 0 C34 10 C29 4.7UF 0.47UF C37 C38 0.1UF 0.001UF VDD 2 NC 5 DEPOP C35 4 50 Ohm Co-Planar Trace C27 R42 0.1UF GND 3 R37 OUT D DEPOP VCRTL EN NC Y1 1 D D1 0 0 1 1 3 6 POWER DOWN DIVIDE BY 1 DIVIDE BY 5 DIVIDE BY 10 4 50.000MHz XREFP 0 R32 0.1UF R18 0 100 R21 0 C31 R35 0.033UF 4.7K R36 DEPOP DEPOP 2.2UF U3 C44 0.1UF C C45 1 50 Ohm Trace 2 51 LKDOP 4 R31 TP5 GND REFIN 3 0.1uF R17 VCC PFD/CP LKD 1/N VCOIN D0 D1 1.1K LOCK DETECT CP 8 7 C30 6 5 0.1uF HMC1031MS8E D1 GREEN R33 LED 1 4 2 3 36 0 R25 R24 150 150 C51 R47 220K R26 0.047uF TDA02H0SB1 100K V_IO RD2 14 HV2 13 HV1 16 RD1 15 NC 100K R23 C TPLL/TCXO SW1 R34 NC NC J5 C32 C33 DEPOP REF IN R22 DEPOP B 1 C54 2 DEPOP 0.1 DEPOP 10UF RD2 14 HV2 13 HV1 16 RD1 15 C6 3 0.1UF 4 C8 0.47uF TP3 GND REG_EN(AD4) 100 GND BAND 50 EN GAP 50 REF 300 7 RD4 8 PTATB C5 2 VDD 5 HV3 6 RD3 1 +5.5V VR1 VR2 VR3 VR4 12 9 C49 C52 0.01uF C50 0.01uF C55 0.01uF 0.01uF HMC860LP3E B JP3 R8 11 10 1 2 0.1 9 C7 4.7uF JP4 1 R12 R13 DEPOP 66.5K 2 0.1 C46 DEPOP DEPOP C11 0.047uF A A RECOMMENDED DESIGN PRACTICE IS TO CONNECT THE REGULATOR ENABLE PIN # 3 THROUGH A 4.7 KOHM RES. TO THE SYSYTEM MICROCONTROLLER/FPGA FOR POWER MANAGEMENT CONTROL. SMALL SERIES RESISTORS ARE REQUIRED IN REGULATOR OUTPUT PATHS AS SHOWN TPLL/TCXO HMC1060LP3E DEPOP R11 C56 10 VCCCP DEPOP R9 AD4 4.7K 6 U1 R14 R49 0.2 R6 DEPOP TP2 0.47uF 3.3K C42 R27 C53 R45 4.7uF VR4 11 HV4 JP2 REF 8 R7 VR3 RD4 R5 4.7K EN RD3 0.047uF 4 VR2 BAND GAP 7 0.047uF R29 3 GND 6 C41 0.1uF 2 R46 R48 12 NC NC NC NC C39 10uF 3.3V C48 VR1 5 C47 VDD HV3 1 U4 4.7uF VCC1 C12 0.047uF HITTITE MICROWAVE CORPORATION JP5 R10 1 A 20 Alpha Rd Chelmsford, MA 01824 2 0.1 C17 4.7uF TITLE R50 SCH, EVAL CUSTOMER 4.7K PROJECT DRAWING #: DRAWN BY 5 4 3 2 SHEET 130-00451-00 D. ACEVAL 2 CODE ID NO. DATE 1CN88 11/18/10 1 OF SIZE 2 REV C 12-10-2012_15:00 C