Introduction Features

Transcript

INTRODUCTION This service manual provides a variety of service information. It contains the mechanical structure of the CDR/RW Drive and the electronic circuits in schematic form. This CD-R/RW Drive was manufactured and assembled under our strict quality control standards and meets or exceeds industry specifications and standards. This CD-R/RW drive is an internal drive unit designed for use with IBM PC, HP Vectra, or compatible computer. It can write as much as 650 Mbytes of digital data into CD-R/RW disc, and can read as much as 650 Mbytes of digital data stored in a CD-ROM, CD-R and CD-RW disc. This CD-R/RW Drive can easily meet the upcoming MPC level 3 specification, and its Enhanced Intelligent Device Electronics (E-IDE) and ATAPI interface allows Plug and play integration in the majority of today’s PCs without the need of an additional interface card. FEATURES 1. General 1) Enhanced IDE interface. 2) Internal 5.25 inch, halfheight CD-R/RW Drive. 3) 2 Mbytes buffer memory. 4) Audio CD like tray loading of a disc without using a caddy. 5) Power loading and power ejecting of a disc. The disc can also be ejected manually. 6) Supports Power saving mode and Sleep mode. 7) Vertical and Horizontal operation. 2. Supported disc formats 1) Reads and writes data in each CD-ROM, CD-ROMXA, CD-I FMV, Video CD, and CD-EXTRA 2) Reads data in Photo CD (Single and Multi session). 3) Reads and writes standard CD-DA. 4) Reads and writes CD-R discs conforming to “Orange Book Part 2”. 5) Reads and writes CD-RW discs conforming to “Orange Book Parts 3”. 3. Supported write method 1) Disc at once (DAO), Session at once (SAO), Track at once (TAO), Variable packet, Fixed packet, and Multi-session. 4. Performance 1) Random 100 ms average access time. 2) Max 4,800 kB/sec (Max 32X) Sustained Transfer rate. 3) Supports real time error correction and real time layered error correction at each speed. 4) Supports CD-R write operation at double speed, quadruple speed, and eight speed. 5) Supports CD-RW write operation at double speed and quadruple speed. 6) PIO Mode 4 & Multi DMA Mode 2 Support. 7) MPC-3 Spec compliant. 5. Audio 1) Output 16 bit digital data over ATA interface. 2) 4 Times Digital Filter for CD Audio 3) Software Volume Control 4) Equipped with audio line output and headphone jack for audio CD playback. 5) Front panel Volume Control for Headphone Output. 3 SPECIFICATIONS 1. SYSTEM REQUIREMENTS -CPU: IBM Compatible Pentium 233MHZ (or faster) (For 8X Write speed, 266MHz or faster recommended.) -32MB Memory or greater 2. SUPPORTING OPERATING SYSTEM • DOS 3.1 or Higher • Windows ‘95/’98 • OS/2 Warp (Ver 3.0) • Solaris Ver 2.4 or higher • Linux Slackware Ver 2.3 • Windows NT 4.0 or later 3. GENERAL 1) Host Interface.......................................................................................................................ATAPI compliant 2) Read Function • Acceptable discs ...............................................................CD-ROM Mode1 (basic format), CD-ROM XA CD-Audio Mixed Mode (Audio and Data Combined) Photo-CD (Single and Multi-Session) CD-I Ready, Video CD CD-Plus/CD-Extra, CD-R (Conforming to “Orange Book Part2”) CD-RW (Conforming to “Orange Book Part3”) 3) Write function • Applied Format..................................................................CD-ROM Mode-1 CD-ROM XA CD-Audio Mixed Mode (Audio and Data Combined) Video CD CD-Plus/CD-Extra, • Writing Method ..................................................................Disc at once(DAO) Session at once(SAO) Track at once(TAO) Variable packet writing Fixed packet writing Multi-session 4) Cache memory (R/W) .........................................................2 Mbyte 5) Disc diameter ......................................................................12 cm (8 cm Read only) 6) Data capacity (Yellow-Book) • User Data/Block ................................................................2,048 bytes/block (Mode 1 & Mode 2 Form 1) 2,336 bytes/block (Mode 2) 2,324 bytes/block (Mode 2 Form 2) 2,352 bytes/block (CD-DA) 7) Rotational Speed CD-Audio.............................................................................6x~15x(CAV) Approx.3000 rpm CD-RW data ........................................................................8x~20x(CAV) Approx.4000 rpm CD-ROM/CD-R data............................................................14x~32x(CAV) Approx. 7000 rpm 8) MTBF • 120, 000 POH at an operating duty of 10% at room temperature. 4. DRIVE PERFORMANCE 1) Data Transfer Rate * Sustained Data Transfer Rate ..........................................150 Kbytes/s (1x) 300 Kbytes/s (2x) 600 Kbytes/s (4x) 1,200 Kbytes/s (8x) 2,400 Kbytes/s (16x) 2,100 to 4,800 Kbytes/s 14 to 32x CAV 4 * Burst Data Transfer Rate (ATAPI) ....................................16.67 Mbytes/sec (PIO Mode 4) 16.67 Mbytes/sec (MULTI-DMA Mode 2) 2) Average Access Time Random Access ..................................................................100 ms Typical (Max.32X) : INCLUDING LATENCY 3) Data Buffer Capacity ...........................................................2 Mbytes 5. POWER REQUIREMENTS 1) Voltage +5 V DC with + 5% tolerance, less than 100 mVp-p Ripple voltage +12 V DC with + 5% tolerance, less than 100 mVp-p Ripple voltage 2) Current • Hold Track State ...............................................................+5V DC 1.0A, +12 V DC 0.8A • Seeking & Spin up ............................................................+5 V DC 1.2A, +12 V DC 1.0A AUDIO OUT 6. AUDIO PERFORMANCE Item Typical Limit Test Signal Test Condition Note Output Level 0.7 Vrms + 10 % 1KHz 0 dB No Filter at 47 kΩ S/N 75 dB 70 dB 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ THD 0.2 % 0.25 % 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ Channel Separation 70 dB 65 dB 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ Frequency Response + 2dB + 3 dB 20Hz~18KHz 0 dB No Filter at 47 kΩ H/P Output Level 0.6Vrms + 20 % No Filter H/P Volume MAX at 32 Ω 1KHz 0dB * CED-8080B/CED-8083B DIFFERENCES TABLE Funtion MODEL CED-8080B CED-8083B 2x/4x/8x Data writing 2x/4x Data writing • CD-RW Writing speed 2x/4x Data writing 2x/4x Data writing • CD-ROM Reading speed 32x Data transfer 32x Data transfer • CD-R Writing speed 5 LOCATION OF CUSTOMER CONTROLS Front Panel T COMPAC Disc Tray WRITE READ Stop/Eject Button Play/Skip Button Volume Control Drive Activity Indicators Headphone Jack 1. Disc tray This is the tray for the disc. Place the disc on the ejected disc tray, then lightly push the tray (or push the eject button) and the CD will be loaded. NOTE: Don’t pull out or push in the disc tray forcibly. This might cause damage to the loading section of the drive. 2. Stop/Eject button This button is pressed to open the CD tray. This button works only when power is supplied to the drive. If an Audio CD is playing, pressing this button will stop it, and pressing it again will open the tray. 3. Play/Skip button When an Audio CD is in the disc drawer, pressing this button will start playing Audio CDs from the first track. If an Audio CD is playing, pressing this button will skip to the next track. 6 4. Volume control This is used to adjust the output volume of the headphone jack. It can’t be used to adjust the output volume for the audio output connectors on the rear panel. NOTE : Turn the volume down before turning on the power. Sudden loud noises can damage your hearing. 5. Headphone jack This jack is for connecting headphones or minispeakers. 6. Drive activity indicators Two colored LEDs are used to indicate the operation of CD-R/RW Drive. (1) Read The orange color is displayed when the spindle motor begins the Spin up operation: accessing data, reading data, playing Audio, and up loading tray. (2) Write The green color is flashed during disc writing sessions. Rear Panel IDE Interface Connector Analog Audio Output Connector ACE INTERF DIGITAL AUDIO D G ANALOG AUDIO R G L CS M S L A POWER2 +5 GND +1 1 2 39 40 Jumper Connector Power Connector Digital Audio Output Connector 1. Power Connector Connects to the power supply (5-and 12-V DC) of the host computer. NOTE : Be careful to connect with the proper polarity. Connecting the wrong way may damage the system (and is not guaranteed). Usually this connector can only be attached one-way. 2. IDE Interface Connector Connect to the IDE (Integrated Device Electronics) Interface using a 40-pin flat IDE cable. NOTE : Do not connect or disconnect the cable when the power is on, as this could cause a short circuit and damage the system. Always turn the power OFF when connecting or disconnecting the cable. 3. Jumper Connector This jumper determines whether the drive is configured as a master or slave. Changing the master-slave configuration takes effect after power-on reset. 4. Analog Audio Output Connector Provides output to a sound card (analog signal). Generally you need this to play a regular audio CD. 5. Digital Audio Output Connector Provides output to a sound card (digital signal). 7 DISASSEMBLY 1. CABINET and CIRCUIT BOARD DISASSEMBLY 1-1. Bottom Chassis A. Release 4 screws (A) and remove the Bottom Chassis in the direction of arrow (1). (See Fig.1-1) 1-3. Cabinet and Main Circuit Board A. Remove the Cabinet in the direction of arrow (4). (See Fig. 1-3) B. Release 2 hooks (a) and remove the CD Tray drawing forward. C. Remove the Main Circuit Board in the direction of arrow (5). D. At this time, be careful not to damage the 4 connectors, are positioned at left side, of the Main Circuit Board. 2. MECHANISM ASSY DISASSEMBLY (1) Cabinet Hooks (a) (4) (A) Bottom Chassis (5) (A) (A) (A) Fig. 1-1 1-2. Front Bezel Assy A. Insert and press a rod in the Emergency Eject Hole and then the CD Tray will open in the direction of arrow (2). B. Remove the Tray Door in the direction of arrow (3) by pushing the stoppers forward. C. Release 3 stoppers and remove the Front Bezel Assy. Main Circuit Board Fig. 1-3 2-1. Pick-up Unit A. Release 2 screws (B). B. Separate the Pick-up Unit in the direction of arrow (6). Tray Door (B) (B) (3) Stoppers Pick-up Unit (6) (2) CD Tray Front Bezel Assy Emergency Eject Hole Mechanism Assy Fig. 1-2 8 Fig. 1-4 2-2. Pick-up A. Release 1 screw (C) and remove the Pick-up. Pick-up Unit Pick-up (C) Fig. 1-5 2-3. Sled Motor Assy A. Release 2 screws (D),(E) and remove the Sled Motor Assy. Sled Motor Assy (D) (E) Fig. 1-6 9 TROUBLESHOOTING GUIDE Reset or Power Check. Check it after connecting the power cable only on interface cable for NO Reset or Power ON. Are the pin 41 and 44 of PN201 +12V and +5V respectively after the power cable connecting? NO • Check the power(12V, 5V) short. • Check PC power cable. • Repair the PC power supply. YES Does the pin 1 of IC101 change 0V to 5V at the power supply initial input mode? NO • Check the IC101(RESET IC). • Check the IC102(BA033S), IC201 (OTI-9790), IC301(HD64F3062) YES NO Are the X201 and X301 oscillating? • Check the X201, X301. • Check the IC201, IC301. YES • Is the pin 4 of IC103 3.9V? • Is the pin 32 of IC401 2.0V? • Is the pin 4 of IC102 3.3V? NO • Check the IC103(BA3939). • Check the IC401(CXA2551R). • Check the IC102(BA033S). YES • Is the pin 7 of IC514 2.5V? • Is the pin 1 and 2 of IC514 2.0V? NO Check the IC514(NJM3414). YES • Is the pin 1 of IC511 8.0V? • Is the pin 1 of IC512 8.0V? NO • Check the IC511(NJM7808). • Check the IC512(NJM7808). YES OK 49 System Check. Load tray without inserting disc. Does Tray operate normally? NO Go to “Tray operating is abnormal” YES NO Go to “Sled operating is abnormal” Does Pick-up move to inside? YES Does Spindle Motor rotate in a moment? NO Go to “Spindle operating is abnormal” NO Go to “Focus Actuator operating is abnormal” YES Does Lens move Up/Down? YES NO Does Laser turn on? Go to “Laser is abnormal” YES After eject tray, Inset CD-ROM Disc and reloading. Does Disc stop? YES Go to “Spindle control is abnormal 1” NO Does Disc rotate continuously as Disc recognition is abnormal? YES Go to “Spindle control is abnormal 2” NO After eject tray, Inset CD-R Blank Disc and reloading. YES Go to “Spindle control is abnormal3” Does Disc stop? NO Does Disc rotate continuously as Disc recognition is abnormal? NO OK 50 YES Go to “Disc recognition is abnormal” Tray operating is abnormal. (Tray open/close doesn’t work) NO Is the input voltage 0V at IC301 pin 52 when push the SW802? • Check the connection of IC201 pin 52. • Replace the SW802(Eject s/w) YES NO Is there Tray control signal input? (IC501 pin 26) • Check the connection of IC409 pin 12. • Replace the IC409(M62352). • Check the communication line between IC409 and IC301(MICOM). YES Is there Tray drive voltage output? (IC501 pin 15, 16) NO YES NO Is TRAY_MUTE signal “L”? (IC501 pin 20) • Check the connection of IC301 pin 25. • Replace the IC301. YES When PN301 is open, Is there Tray drive signal output? NO • Replace the IC501(BA5983FM). YES • Check the Tray Connector(PN301). • Check the Motor Line and Motor. 51 Sled operating is abnormal. Is there Sled control signal output? (IC301 pin 85) NO NO Check the connection of IC301 pin 85 Replace the IC301 (MICOM). YES Is there Sled drive voltage input? (IC501 pin 23) NO • Check the connction of IC502 pin 17. • Replace the IC502(BA5925) YES Is there Sled drive voltage output? (IC501 pin 17, 18) NO NO Check the connection of IC301 pin 26. Is Act_Mute signal ‘L’? (IC501 pin 9) YES YES Replace the IC501 (BA5983). Is there HALL/SLDOUT signal input? (IC301 pin 82) NO YES Is there SLED FG signal input? (IC301 pin 97) Is there HALL 1 signal input? (IC508 pin 3) NO NO Check the IC502(BA5925). YES OK 52 • Check the Connector(PN501). • Replace the SLED Motor. YES Replace the IC508 (BU4053). Spindle operating is abnormal Is there Spindle control signal input? (IC510 pin 22) NO YES Is there DMO signal input? (IC509 pin 5) NO • Check the connection of IC201 pin 2. • Replace the IC201(OTI-9790). YES Is there Spindle control signal output? (IC509 pin 7) NO • Replace the IC509(NJM3404). YES Replace the IC508(BU4053). Is there Spindle drive voltage output? (IC510 pin 2, 4, 7) YES NO NO Is SPNON signal “H”? (IC510 pin 23) • Check the connection of IC301 pin 99. • Replace the IC301(MICOM). YES NO Is SBRK signal “L”? (IC510 pin 18) • Check the connection of IC301 pin 94. • Replace the IC301(MICOM). YES • Check the Spindle Connector(PN502) • Replace the Spindle Motor. Is there a SPNFG signal input? (IC301 pin 7, IC201 pin 95) NO • Check the connection of IC510 pin 19. • Replace the IC510(BA6664FM). YES OK 53 Focus Actuator operating is abnormal Is there Focus Search control signal input? (IC501 pin 3) NO • Check the connection of IC201 pin 207. • Check the communication line between IC201 and IC301. • Replace the IC201 (OTI-9790) YES Is there Focus Search drive voltage output? (IC501 pin 13,14) NO NO Is Act_Mute signal “L”? (IC501 pin 9) • Check the connection of IC301 pin 26. • Replace the IC301(MICOM). YES YES • Check the connection of PN401 pin 1, 4. • Check the Pick-up Connector(PN401). • Replace the IC501(BA5983). • Replace the Pick-Up. Spindle control is abnormal 1 (CD-ROM Disc) Does FOCUS Servo operate normally? NO • Go to “Focus Servo is unstable” YES NO NO Is there RFAC signal input? (IC201 pin 163) YES Go to “Spindle operating is abnormal” 54 Is there a output normally? (IC401 pin 71, 72) YES • Replace the IC413(EL2245). • Replace the IC401(CXA2551R). Spindle control is abnormal 2 (CD-ROM Disc) NO Is there RRF signal input? (IC413 pin 3) Go to “RF output is abnormal” YES NO Is there RFDC signal input? (IC401 pin 85) Replace the IC413(EL2245). YES Does Tracking Servo operate normally? NO Go to “Track Servo is unstable” YES Go to “Disc recognition is abnormal” Spindle control is abnormal 3 NO Is there WBLIN signal input? (IC201 pin 132) NO Is there ATFM signal output? (IC401 pin 25) Go to “RF output is abnormal” YES YES Replace the IC401(CXA2551R). NO Is there DMO signal output? (IC202 pin 2) Replace the IC201(OTI-9790). YES Go to “Spindle operating is abnormal” 55 Disc recognition is abnormal NO Is there CDR/RW signal input normally? (IC601 pin 33) YES Is there RECD1, RECD2 signal output normally? (IC401 pin 48, 49) NO Go to “RF output is abnormal” YES Go to “Track Servo is unstable” Replace IC301 (MICOM) RF output is abnormal Is there PICK UP (A, B, C, D) output normally? (PN401 pin 8, 9, 14, 15) NO • Check the PICK UP FFC. • Replace the PICK UP. YES Is RRF signal output normal? (IC401 pin 86) • First Recognition try: Over 1.7 Vpp • Second Recognition try: Over 0.5 Vpp YES OK 56 No • Check the connection between PN401 and IC401. • Replace the IC401(CXA2551R). Go to “Laser is abnormal” Focus Servo is unstable Is FE signal output normal in Focusing Up/Down? (IC401 pin 56) NO Check the IC401(CXA2551R). YES Is FAQ signal output normal in Focusing Up/Down? (IC201 pin 207) Go to “RF output is abnormal” NO Replace the IC201(OTI-9790) YES Go to “Focus Actuator operating is abnormal” Track Servo is unstable Is TE signal output normal in Focusing ON and Tracking OFF? (IC401 pin 57) NO Is PICK UP (E, F, G, H) output normal? (PN401 pin 16, 7, 13, 10) NO • Check the PICK UP FFC. • Replace the PICK UP. YES YES Check the IC401(CXA2551R). YES Go to “RF output is abnormal” Is TE signal input normal in Focusing ON and Tracking OFF? (IC201 pin 198) NO Check the IC403 (NJM3403) YES Is there TAO signal output in Tracking ON? (IC201 pin 208) NO Replace the IC201(OTI-9790). YES Check the Driver IC(IC501) and P/U referring to “Focus Actuator operating is abnormal”. 57 Laser is abnormal Execute ‘B.Calibration Data’ of ‘How to use Test Tool (Dragon)’ NO Is EEPROM Data valid? YES Execute ‘D.LD Inspection’ of ‘How to use Test Tool(Dragon)’ Execute ‘C.LD Power Setup’ of ‘How to use Test Tool(Dragon)’ YES OK? NO YES OFF LEVEL NG? Normal NO YES VRDC NG? E NO YES VWDC1 NG? NO G 58 F LD CHECK (Not Read) E Execute ‘E. LD On’ of ‘How to use Test Tool (Dragon) : ‘VRDC Loop [Read Mode]’ NO PN401 Pin 32(ENBL)=H? • Check the connection of IC601 pin 20. • Check and replace the IC601(CPLD). YES IC401 Pin 12(RREF): CED-8080B:0.8+/-0.3V, CED-8083B:1.4+/-0.3V? NO • Check the connection of IC409 Pin 18. • Check and replace the IC409(DAC). YES NO • Check the connection of PN401 pin 19. • Check and replace the PN401, PICK UP. NO • Check the connection of IC401 pin 13. • Check and replace the IC401. IC401 Pin 16(FPDO): 2.9+/-0.3V? YES PN401 Pin 25(VRDC) : CED-8080B:0.9+0.5V, CED-8083B:0.6+0.5V? YES Execute ‘D. LD Inspection’ of ‘How to use Test Tool(Dragon)’ YES VRDC NG? NO Check the P/U connector and then replace the P/U. Normal 59 LD CHECK (Not Recorded) F Execute ‘E. LD On’ of ‘How to use Test Tool(Dragon)’: ‘VWDC-1 Loop’ NO • Check the connector of IC601 pin 20. • Check and replace the IC601(CPLD). NO • Check the connection of IC601 pin 18,29 and 34. • Check and replace the IC601(CPLD). NO • Check the connection of IC409 pin 4. • Check and replace the IC409(DAC). NO • Check the connection of PN401 pin 19. • Check and replace the PN401, PICK UP. PN401 Pin 32(ENAB) = ‘H’? YES PN401 Pin 31(W/XR) = ‘H’? YES IC401 Pin 5(WREF) : 0.5+/-0.2V? YES IC401 Pin 16(FPDO) : 2.9+/-0.3V? YES PN401 Pin 27 (VWDC1) : 1.2+/-0.8V? NO • Check the connection of IC401 pin 10. • Check the connection of IC409 pin 13. • Check and replace the IC401, IC409. YES Execute ‘D. LD Inspection’ of ‘How to use Test Tool(Dragon)’ YES VWDC NG? NO Check the P/U connector and replace the P/U. 60 Normal G Execute ‘E.LD On’ of ‘How to use Test Tool(Dragon)’ : ‘VWDC-2’ YES NO P/N401 Pin 30(ODON) = ‘H’? • Check the connection of IC601 pin 21 and 30. • Check and replace the IC601(CPLD). YES NO PN401 Pin 31(W/XR) = ‘H’? • Check the connection of IC601 pin 18 and 34. • Check and replace the IC601(CPLD). YES PN401 Pin 26(VWDC2) : CED-8080B:3.4+0.4V, CED-8083B:2.5+0.4V? NO • Check the connection of IC409 pin 19. • Check and replace the IC409(DAC). YES Check the P/U connector and replace the P/U. 61 In case of writing fail. Normal Case NO Check the Media CD-R or CD-RW? Check disc Label. YES Does the disc have any Dust, Scratch, Fingerprint...? NO Remove the Dust, Fingerprint and if the disc has long width Scratch, change it. YES Is the write Tool(version) supported by LG CD-RW Drive? NO Use LG bundle Software (Write Tool & Version) - Easy CD Creator 3.5c Direct CD 2.5d... YES Check disc information on Writng Tool. [If you get some data information with “Non Recordable Disc” Message, the disc is finalized -Finalized Disc : unrecordable Disc any more] NO Finalized Disc? Eject Disc. YES If CD-R disc, use new CD-R disc. If CD-RW disc, erase the disc. 62 Go to “Writing Part Check” Writing Part Check. Refer “Laser is abnormal”. Load tray with CD-R/RW Disc. Run the Writing Tool (Easy CD Creator). Run the Writing with Tool (Easy CD Creator). The blink alternates between LED1 and LED2 when Writing start (OPC operation)? NO Do the IC301(MICOM) pin 2 and pin 7 output toggle signals during Writing? • Check the connection between YES IC301 pin 2, 7 and LED. • Check and replace the LED803, 804. NO YES • Check the communication lines between IC301 and IC201. • Check and replace the IC301. Does Writing finish without any error? NO YES NO Is the written file read normally? Eject Tray. YES Go to “ALPC Logic Circuit Check”. YES Is the re-written file readed normally? NO Check the connection of IC201 pin 187 and replace the IC201. NO Is ROPCSH input signal Pulse when CD-R writing? (IC401 pin 43) YES OK Go to “BETA Measurement Circuit Check”. 63 ALPC Logic Circuit Check. Execute ‘E. LD On’ of ‘How to use Test Tool(Dragon)’ : ‘CD-R Recording Mode’ NO • Check the connection of IC301 pin 20. • Check and replace the IC301. NO • Check the connection of IC301 pin 14. • Check and replace the IC301. NO • Check the connection of IC201 pin 166. • Check and replace the IC201. IC601 Pin 33 (CDR/RW) = ‘H’? YES IC601 Pin 34(WR/RE) = ‘H’? YES IC601 Pin 27(WGATE) = ‘H’? YES NO IC401 Pin 50(WLDON) = ‘H’? • Check the connection of IC601 pin 13. • Check and replace the IC601. YES Are IC601 pin 29(EFM1), 30(EFM2), 42(RESAMP1), 2(RESAMP2), 41(ROPC1) pulse signals? NO • Check the connection lines of IC201. • Check and replace the IC201. YES Are IC401 pin38(WFPDSH), 39(RFPDSH), 40(WBLSH), 41(SPDSH), 42(MPDSH) pulse signals? NO • Check the connection lines of IC601. • Check and replace the IC601. YES Are PN401 pin 30 (ODON), 31(W/XR) pulse signals? NO • Check the connection lines of IC601 pin 21, 18. • Check and replace the IC601. YES Dragon : Execute LD ‘Off’ K 64 Dragon : Execute ‘LD Off’ K Execute ‘E. LD On’ of ‘How to use Test Tool (Dragon)’ : ‘CD-RW Recording Mode’ NO • Check the connection of IC301 pin 20. • Check and replace the IC301. NO • Check the connection of IC301 pin 14. • Check and replace the IC301. IC601 Pin 33(CDR/RW): ‘L’? YES IC601 Pin 34 (WR/RE) : ‘H’? YES NO IC601 Pin 27(WGATE) : ‘H’? • Check the connection of IC201 pin 166. • Check and replace the IC201. YES NO • Check the connection of IC601 pin 13. IC401 Pin 50(WLDON) : ‘H’? • Check and replace the IC601. YES Are IC601 pin 29(EFM1), 30(EFM2), 42(RESAMP1), 2(RESAMP2), 41(ROPC1) pulse signals? NO • Check the connection lines of IC201. • Check and replace IC201. NO • Check the connection lines of YES Are IC401 pin 38(WFPDSH), 39(RFPDSH), 40(WBLSH), 41(SPDSH), 42(MPDSH) pulse signals? IC601. • Check and replace IC601. YES Are IC401 pin 30(ODON), 41(W/XR) pulse signals? NO • Check the connection of IC601 pin 21, 18. • Check and replace the IC601. YES Dragon : Execute LD ‘Off’ Dragon : Execute LD ‘Off’ Normal 65 BETA Measurement Circuit Check. After inserting Test Disc (TCD-784), 1x play. NO IC401 Pin 86(RRF) : 3+/-1.0V? • Check the connection of IC401 pin 86. • Check and replace the IC401(CXA2551R). YES RRFIN: 2+/0.7V? (IC401 PIN85) NO • Check the connection of IC407. • Check and replace the IC407. NO • Check the connection of IC301 pin 20. • Check and replace the IC301(MICOM). YES IC405 Pin 10 (CDR/RW) : ‘H’? YES NO IC301 Pin 78(RFBETA) : 2+/-1.0V? YES Normal 66 Is BETA signal normal? (IC405 pin 14) YES Check and replace the IC405(BU4052) NO • Check the connection of IC401 pin 82. • Check and replace the IC401. No audio output Insert the audio Disc. AUD_MUTE : ‘L’? (IC301 Pin 8) NO • Check and replace the IC301. YES Do LOUT, ROUT signals output? (IC201 Pin 151, 154) NO • Check and replace the IC201. YES Do audio Line signals output? (PN201 Pin51, 54) NO • Check the connection of L/R OUT. YES Adjust H/P volume max. (VR801) YES Do audio signals output? (IC801 Pin1,7) NO • Check and replace the IC801. YES Does the audio signal output at the headphone jack(JK801)? NO • Check and replace the JK801. Normal 67 In case of audio play switch not working. Is IC301 pin 51 5V before pushing PLAY KEY (SW801)? NO • Check the connection of IC301 pin51. • Replace the IC301. YES Is IC301 Pin 51 0V pushing the SW801? YES Replace the IC301. 68 NO • Check the connection of SW801. • Replace SW801. GLOSSARY ATIP Absolute Time in Pre-groove. With an additional modulation of the “Wobble”, the “Groove” contains a time code information. Wobble The pre-groove in the Disc is not a perfect spiral but is wobbled. With : – A typical amplitude of 30 nm – A spatial peried of 54~64 µm CW Continuous Wave. The laser light output is at a constant level. DOW Direct Over-Write. The action in which new information is recored over previously recorded information in CD-RW disc. Overwrite The action in which new information is recorded over previously recorded information. (Pre-)Groove The guidance track in which clocking and time code information is stored by means of an FM modulated wobble. Land Land is characterized in the following way: When radial signals are concerned,land is defined as the area between the grooves. When HF signal are concerned,land is defined as the area between the marks(pits) in tangential direction. Hybrid Disc A Multisession disc of which the first Session is mastered. On a hybrid disc, recorded and mastered information may co-exist. Mastered Information,stored as pits on the disc during the manufacturing process of the disc. Information (when making the master) OPC Optimum Power Control. Procedure is determined optimum recording power according to CDR/RW Media in recording start step. ROPC Running OPC. The purpose is to continuously adjust the writing power to the optimum power that is required. When the optimum power may change because of changed conditions of disc and change in operating temperature. Jitter The 16 value of the time variation between leading and trailing edges of a specific (I3 … I11) pit or land as measured by Time Interval Analysis. Deviation The difference between a fixed value of Pit length and Land length. TOC Table Of Contents : in the Lead-in Area the subcode Q-channel contains information about the Tracks on the disc. Packet Writing A method of writing data on a CD in small increments. Two kinds of packets can be written : Fixed-length and Variable-length. Write Strategy The shape of the HF write signal used to modulate the power of the laser. The Write Strategy must be used for recordings necessary for disc measurements. Information Wobble, ATIP, Disc Identification, Write Power, Speed Range OPC Parameters, etc are Area recorded in the Information area of CD-RW Disc Finalization The action in which (partially) unrecorded or logically erased tracks are finished and the Lead-in and/or Lead-out areas are recorded or overwritten with the appropriate TOC subcode. Logical Erase A method to remove information from a disc area by overwriting it with an EFM signal containing mode 0 subcode A logically erased area is equivalent to an unrecorded Physical Erase The action in which previously recorded information is erased by overwriting with a CW laser output. After a Physical Erase action, the erased area on the CD-RW disc is in the unrecorded state again. Session An area on the disc consisting of a Lead-in area, a Program area, a lead-out area. Multi session A session that contains or can contain more than one session composed Lead-in and Lead-out 10 The differences of CD-R/CD-RW discs and General CD-ROM 1. Recording Layer Recordable CD has a wobbled pre-groove on the surface of disc for laser beam to follow track. Track pitch(p) Read-only Disc DISC) CD-ROM (READ-ONLY A a=30nm Iw um 1.6 O a T 11 3~ Radial Direction Radial Error Signal 0.4~0.5 um Land Groove CD-R and CD-RW Disc a Average center (Pit)Groove Land Actual center The Groove wobble 2. Disc Specification CD-ROM CD-R CD-RW Standard Yellow Book Orange Book II Orange Book III Record Not available Write once Re-writable I 11/Itop (HF Modulation) > 0.6 > 0.6 0.55 > M11> 0.70 4-15 mW 6-14 mW Write Laser Power(mW) Read Laser Power(mW) < 0.5 mW < 0.7 mW < 1.0 mW Jitter < 35 nsec < 35 nsec < 35 nsec Reflectivity (Rtop) 70 % 65 % 15 % ~ 25 % 15 3. Disc Materials 1) CD-ROM disc • • • • It is composed of Silver _ colored aluminum plate and Reflective layer. Groove (Pit) of aluminum plate make a track. Laser wavelength : 780 nm, Laser Power (Read): 0.5mW Signal is detected by the difference of reflective beam intensity between “pit” and “Land” on the disc. Label Printing Protective Layer Reflective Layer Substrate (Polycarbonate) Pit Laser Beam 2) CD-R disc • It is so-called WORM (Write Once Read Many) CD. • It is composed of polycarbonate layer, Organic dye layer, Reflective layer, and Protective layer.Gold/Silver Reflective layer is used to enhance the reflectivity • According to the kinds of Organic dye layer, it is divided by Green CD, Gold CD, Blue CD. • Laser Wavelength : 780 nm, Laser Power (read) : 0.7 mW • Recording Power : 1x(4~8mW), 2x(8~10mW), 4x(10~13mW), 6x(12~15mW). • When some part of dye layer is exposed to laser heat, it’s color changs black.Therefore, writing and reading is enabled by the difference of reflectivity between changed part and unchanged part. • Polycarbonate layer has Pre_Groove which make a Track. Pigment Reflective Layer Color Phtalocyanine Gold/Silver Yellow/White Cyanine Gold/Silver Dark Green/Bright Green Azo Gold/Silver Dark Blue Label Printing Protective Layer Reflective Layer Organic Dye Layer Substrate (Polycarbonate) Laser Beam 16 Groove 3) CD-RW Disc Label Printing Protective Layer Dielectric Layer(TL) Reflective Layer Dielectric Layer(UL) Substrate (Polycarbonate) Groove Laser Beam • It is composed of polycarbonate layer, alloy(silver, arsenic) layer, aluminum reflectivity layer, protective layer. • An crystalized alloy layer is transformed into noncrystalized by the laser heat. Therefore, writing and reading is enabled by the difference of reflectivity. • It is possible to overwrite about 1000 times. • Laser Wavelength : 780 nm, Laser Power (Read) : 1.0mW • Recording Power : Erase (4~8mW), Write (12~16mW) • When disc rewriting, new data is overwritten previously recorded data. • Polycarbonate layer has a Pre-Groove which make a track. 4. Reading process of Optical Disc Lens H D θ Beam Spot Numerical aperture: NA=nsinθ, n: Refractive index Focus depth : H = λ/NA laser spot diameter : D = λ/NA2 Focusing Lens Laser Spot at Constant Read Intensity Previously Recorded Marks Groove Land Mirror Reflected Light Signal I11 I3 IG IL I0 Itop Laser Spot Position (Time) 17 5. Writing Process of CD-R Disc Incident Laser Power (Write) (Read) (Read) a b cd e f Laser Spot Position (Time) g a b Laser Spot Below "ORP"– Mark Too Short Reflected Light Signal c At Optimum Record Power ("ORP") Above "ORP" – Mark Too Long d e f Recorded Mark g Time Reflected Light Signal a b cd e f g Laser Spot Position (Time) 6. Writing process of CD-RW Disc Amorphous Crystal phase Melting/ quenching Erase Power Read Power Heating/ gradual cooling Erased state (higher reflectivity) Write Power Recorded state (lower reflectivity) Groove Crystal 18 Amorphous 7. Organization of the PCA, PMA and Lead-in Area 1) Layout of CD-ROM disc Disc Center Diameter 120 mm Diameter 46 mm Diameter 15 mm Center hole Clamping and Label Area Information Area Read Only Disc Program Area Lead-in Area Lead-out Area 2) Layout of CD-R/RW disc Disc Center Diameter 120 mm Diameter 45 mm Diameter 15 mm Center hole Clamping and Label Area Information Area Unrecorded Disc PCA PMA Program Area Lead-in Area Lead-out Area Test Area : for performing OPC procedures. Count Area : to find the usable area immediately in T.A Test Area Count Area Tsl : start time of the Lead-in Area, as encoded in ATIP out PMA : Program Memory Area in Tsl-00:35:65 Tsl-00:15:05 Tsl-00:13:25 Tsl 99:59:74 00:00:00 19 8. Function of PCA and PMA area 1) PCA (Power Calibration Area) • PCA area is used to determine the correct Laser Power for a disc. – Method 1 : PCA area is divided by a track. – Method 2 : The previous Calibration value is referred. – Method 3 : ROPC is used to determine Laser Power value automatically in data writing. • CD-R Disc can write maximum 99 Tracks but CD-RW Disc can write unlimited tracks because it has a rewritable function. 2) PMA (Program Memory Area) • It has a track information (track No, track Start/End time) of every track before writing completed. – PMA area has the last written point and the next writable point of a disc. – In case of CD to CD copy, some writer may not write PMA area. * When Disc is Finalized, PMA information is transferred to the Lead_In area so that general Driver can read it. * Because PCA and PMA area exist before Lead-In area, General CD Player or CD-ROM Drive can’t read these areas. 9. OPC and ROPC 1) OPC (Optimum Power Control) • This is the first step of writing process, because CD writer has its own laser power value and media have different writing characteristics, – This is determined by the Writing characteristic, speed, temperature, and humidity. – Laser wavelength is determined by the environmental temperature (775~795nm) and Optical Laser Power is determined by the test and retry. HF Signal • Asymmetry and optimum writing Power – EFM signal Asymmetry is determined by the writing power. Therefore, Optical Power which has the same value to the preset power value can be estimated by measuring HF signal Asymmetry on the PCA area. • Measurement of Asymmetry * Parameter setting (Beta) : Using AC coupled HF signal before equalization Beta = (A1+A2)/(A1-A2) A1 0 A2 Time 20 P << Po Time P = Po Time P >> Po 2) ROPC (Running Optimum Power Control) • Variable primary factor of Optimum Power – Change of Power sensitivity on the Disc. (limited to 0.05 *Po) – Wavelength shift of the laser diode due to the operating temperature change. – Change of the Spot aberration due to the Disc skew, Substrate thickness, Defocus. Incident recording pulse – Change of Disc or Optics conditions due to the long term OPC ==> It is necessary to adjust continuously to obtain the Optimum Power. Sampled timing B Sample Disc Reflectivity (Read power) Level B • Principle of Running OPC – To meet the factors mentioned above, a horizontal _ direction movement of a curve is uesd. – Beta = f(B-level) = constant on the Recorded Disc – Procedure of ROPC a. Reference B-level is determined during OPC Procedure. b. During Recording, B-level value is controlled to have a close Reflected recording pulse Reference B-level value. c. Normalization of B-level is used to eliminate the effect of reflectivity fluctuation. ==> The reflected B-level value is normalized by the disc reflectivity itself. Sampled at timing B normalized to recording power 11T Level B with Pwo Sample B-level (Write Power) Pwo decided by OPC Recording Power OPC CD-R/RW Media Program Area Write Strategy Determination PMA Area PCA Test Area Lead-In Area PCA Count Area Lead-out Area ROPC 10. Writing Process of DISC * Recording Capacity of CD-R/RW (74Minute Recording media) • (2048 Byte/Sector) X (75 Sector/Second) X (60 Second/Minute) X 74 Minute = 681,984,000 Bytes = 682 Mbytes • But the actual recording capacity is about 650 Mbytes. (according to the ISO 9660 standard, approximately 30 Mbytes are used to make directory structure and volume names.) 21 INTERNAL STRUCTURE OF THE PICK-UP 1. Connection diagram of the Pick-up *KRS-202A : CED-8080B’S *KRS-220C : CED-8083B’S 2 Axis Actuator 1 1 2 3 4 5 6 VCC GND H G IC1 A D B C F E Vc GND C1 12 R3 PDVc 13 G 7 14 D 15 C 16 E 6 C5 C6 G Q2 7 8 PDIN VREF Vcc IOUT IINR IIN2 IC2 GND RAMP IIN3 ENBLE OUTEN2 OSCEN OUTEN3 Vcc C7 R7 R8 R9 22 L2 A VOUT RFREQ B 8 D 5 F 8 PDVcc R1 4 7 11 D 3 PDGND 12 G 2 6 9 FPD 1 FGND 10 C3 R2 FCS + 5 A C9 R6 4 H C C4 TRK + 9 L1 S TRK - 3 10 11 C2 Q1 FCS - 2 S 16 L3 17 - 18 FPDVc 19 FPDO 20 Vcc 21 Vcc 22 CFREQ 23 CMOD 24 PGND 25 VRDC 26 VWDC2 27 VWDC1 15 28 GND 14 29 OSCEN 30 WE2 LD 13 12 R5 R4 11 10 9 C8 31 WE1 32 ENBL 2. Pin Description Pin No. Symbol I/O Function 1 FCS- I Focus coil- 2 TRK- I Tracking coil- 3 TRK+ I Tracking coil + 4 FCS+ I Focus coil + 5 FGND _ Frame GND 6 PGND _ PDIC GND 7 F O PDIC F OUT 8 B O PDIC B OUT 9 A O PDIC A OUT 10 H O PDIC H OUT 11 VCC I PDIC VCC 12 VC I PDIC VC 13 G O PDIC G OUT 14 D O PDIC D OUT 15 C O PDIC C OUT 16 E O PDIC E OUT 18 FPDVC I LD Power Monitor Amp VC 19 FPDO O LD Power Monitor Amp Out 20 Vcc (5V) I LD Analog Voltage +5V 21 Vcc (5V) I LD Analog Voltage +5V 22 CFREQ I Change Frequency 23 CMOD I Change Modulation 24 PGND _ LD Power GND 25 VRDC I Read Power Analog Control Voltage Input 26 VWDC 2 I Overdrive Analog Control Voltage Input 27 VWDC 1 I Overdrive Analog Control Voltage Input 28 GND _ LD GND 29 OSCEN I Module Control SW L : off, H : on 30 WE2 I Write Enable 2 L : Write 2 ON 31 WE1 I Write Enable 1 L : Write 1 ON 32 ENBL I LD Drive Current OFF SW, L : LD off 17 23 3. Signal detection of the P/U Infrared Iaser Pick-Up module Focusing Tracking Photo Diode 1) Focus Error Signal ==> (A+C)-(B+D) This signal is generated in RF IC (IC401 : CXA2551R) and controls the pick-up’s up and down to focus on Disc. 2) Tracking Error Signal (DPP Method) ==> {(A+D)-(B+C)}- k x {(F+H)-(E+G)} This signal is generated in RF IC (IC401 : CXA2551R) and controls the pick-up’s left and right shift to find to track on Disc. 3) RF Signal ==> (A+B+C+D) This signal is converted to DATA signal in DSP IC (IC201 : OTI-9790). Track Center Tp/2 Sub1 F,E D,C A,B Main Sub2 H,G Tp k[(F+H) - (E+G)] Offset (A+D) - (B+C) TE 24 (A+D) - (B+C) - k[(F+H) - (E+G)] 13 6 IC601 (CPLD) 5 WLDON WFPDSH FPDVC RFPDSH FPAO 50 38 11 39 17 16 + IVON Gain Adj FPDG 10K + - -8~+7.75dB 0.25db Step 10K 9K H:ON L:OFF 20K + + 20K (Write) 20K 20K 20K (Read) 20K 20K IC401(CXA2551R) S/H S/H 20K 14 5K 5K + + RREF 10K VRDC VRDCN WREF 10K APCCSW VWDCN RLDON H: ON L: OFF 19 8 7 5 10 6 9 12 14 R413 C422 R441 13 R474 C445 Q404 C427 C443 Q401 3 R471 18 R476 19 C459 R472 Q402 R438 5V Q403 C446 IC409 (M62352) 4 R404 Q405 ERGCNT R475 VWDC2 VWDC1 W LDON VRDC FPDO 26 27 25 19 P/U (PN401) DESCRIPTION OF CIRCUIT 1. ALPC (Automatic Laser Power Control) Circuit 1-1. ALPC Loop Circuit 25 1-2. ALPC (Automatic Laser Power Control) Circuit Operation This circuit consists of Feedback Loop to maintain light output of the Laser Diode. Feedback signal, output current from PD (Photo Detector) of P/U, is used to monitor the light power of Laser Diode. RREF (Read Reference Voltage) of IC401 (CXA2551R) Pin 12, which is from DAC (IC409) Pin 18, is the reference level of this Loop Circuit. * Read Loop • When playback VRDC (Pin 14) signal of CXA2551R is output to P/U through Gain Control S/W and drives Laser Diode during playback. This S/W Circuit is designed to reduce transition time from CD-RW writing mode to playback mode. • When writing mode - CD-R Three Laser Power Levels, Read, Write and Overwrite, are used to write on CD-R disc, and Read Level is used to monitor the output laser power. For stabilizing read loop, the S/H signal (RFPDSH), which sample and hold the Read Level of laser power in the CD-R writing mode, is input through Pin 39 of CXA2551R. Hence, S/H circuit makes feedback laser power level constant. - CD-RW Three Laser Power Levels, Read, Erase and Write, are used to write on CD-RW disc, and Erase Level is used, during CD-RW writing, to monitor output laser power. It is not VRDC but VWDC that is the output signal of the control loop performed by Erase level. ERGCNT makes ALPC Loop stable when it is changed to playback mode from writing mode. * Write Loop For stabilizing Write Loop, the S/H signal (WFPDSH), which sample and hold the Erase Level of laser power in the CD-RW writing mode, is input through Pin 38 of CXA2551R. Output voltage of Write Loop, VWDC (Pin 10 of CXA2551R), is protected by the high limit diode applied to P/U. In the writing mode, the reference signal of Write Loop is WREF (Pin 3 of IC409) and it is input to Pin 5 of IC401 (CXA2551R). 26 PDIC VC GND VCC Pick up KRS-202A/220C 4 4 92 93 94 95 E,F,G,H 100 97 98 99 A,B,C,D K AGC SRF RF + _ AAF BPF AGC EQ TE CE FE 57 3 56 Slice Circuit 26 EQRFP 72 EQRFN 71 Gain Adj. Offset Adj. Gain Adj. Offset Adj. Gain Adj. Gain Adj. LPF LPF Offset Adj. CXA2551R (A+D)-(B+C) LPF IC401 ATFG IC413 AMP IC201 132 IC201 163 IC201 198 IC201 204 IC201 197 2. RF Amplifier Circuit Block Diagram 27 3. Focus/Tracking/Sled Servo Circuit 3-1. Focus, Tracking & Sled Servo Process Focus, Tracking Serve IC401 CXA2551R Pick up A,B,C,D,E,F,G,H E F A,B,C,D Focus Error Detector FE A,B,C,D Track Error Detector TE 8 C B D A E,F,G,H G H Focus, Tracking Actuator T+ T_ F+ TE F_ TE IC201 Servo control OTI9790 IC501 Driver BA5983FM FE FE A/D Level shift FAO TAO Level shift FAO D/A TAO Digital EQ Auto Adj. Circuit Sled control signal SLO Sled control IC501 Driver BA5983FM SLD+ M SLD- Level shift Sled Motor SLED -MOVE Hall sensor 4 H1 + H1 H2 + H2 - IC502 BA5925FA Speed Detector Sled Clock 28 IC301 µ-com 3-2. Focus Servo The aim of Focus Servo is to maintain the distance between object lens of P/U and disc surface, so that the detected RF signals (A, B, C, D) can be maximized. Focus Servo is based on focus error (FE) signal which is generated from focus error detection block in CXA2551R (IC401) using Astigmatism Method. Focus gain and path can be changed at the CXA2551R according to the disc, and the resulting output (FE) is input to Servo IC (IC201, OTI-9790). FE signal after first amplification in OTI-9790 is A/D converted and input to Digital Equalizer Block, most important part at the Focus Servo. At the Digital Equalizer, adjustments for Focus Bias and Loop Gain are performed. After D/A converted, Focus servo signal is output through FAO port (OTI-9790, Pin 207) and drive Focus Actuator through the Focus Drive IC (IC501, BA5983FM). 3-3. Tracking Servo The aim of Tracking Servo is to make laser beam trace the data track on disc. Tracking Error (TE) signal is generated from tracking error detection block in CXA2551R (IC401) using DPP (Differential Push-Pull) Method. DPP method uses not only main beam (A, B, C, D) but side beams (E,F and G, H) for correcting DC offset generated in Push-Pull method. The remaining procedures of TE signal processing in OTI-9790 is similar to Focus Servo. After D/A converted, Tracking servo signal is output through TAO port (OTI-9790, Pin 208) and drive Tracking Actuator through the Tracking Drive IC (IC501, BA5983FM). 3-4. Sled Servo The working distance of tracking actuator is too short to cover whole disc radius. Sled Servo make PU move by little and little so that the laser beam keep tracing the data track on disc continuously when tracking actuator reaches the working limit. Another function of Sled Servo is to seek a target point on disc, following user commands. Sled error signal is generated with accumulated tracking error signal (that is DC value of TE), which is input to Servo IC (OTI-9790, Pin 198). After compensation in OTI-9790, Sled servo signal is output through SLO (OTI-9790, Pin 3) and drive Sled Motor via IC501. Another sled control signal, SLEDMOVE from U-COM (IC301), is used in the seek mode for data access. SLEDMOVE signal is compared with feedback speed signal via Hall sensor and speed detection IC502(BA5925FV) so that the sled movement speed can be controlled accurately, and it is possible to seek data access point very fast. 29 4. Spindle Servo Circuit 4-1. Spindle Servo Process Spindle Servo Process Pick up E F IC401 CXA2551 Wobble Signal Generator 8 A D B C RF G H SRF IC201 OTi9790 Spindle Motor PLL BLOCK M CD EFM CLV CAV x32 Hall sensor IC201 OTi9790 6 Wobble Signal Demodulation IC510 BA6664FM ATIP CLV, FG Level shift ATIP CLV Control IC509 NJM3404AV 3 SPNFG, SPNREV, SPNON IC202 µ-com 4-2. Spindle Servo Spindle servo is as followings; 1) CD EFM CLV X8 : CD-DA, Video CD 2) Wobble CLV x2, x4, x8 : Blank area in CD-R, CD-RW 3) CD 15x CAV : CD-DA 4) CD 24x CAV : Recorded area in CD-RW 5) CD 32x CAV : CD-ROM, Recorded area in CD-R – Spindle Servo is controlled by IC201(OTI-9790) and servo signal is output via DMO(Pin 2). 30 • How to use Test Tool (Dragon) A. Start 1. Install CED-8080B(CED-8083B) –> PC Power ON –> Execute Windows. 2. Execute Dragon.exe on Windows (Dragon.exe & dragon.cfg should be on same Directory). 3. If you use CED-8080B(CED-8083B) “E4 Dragon Ver xxx(E5 Dragon Ver xxx)” will be displayed on the Window. 4. Select Setup/Setup I/F on the menu bar. 5. Select ATAPI I/F and then Click OK(Don’t “Select Transfer Rate”) 6. Select Setup/Target Select on the menu bar. 7. Select Number of Host(#0 or #1) appropriately, then “CED-8080B(CED-8083B)” displays on “Target Device” 8. Select “CED-8080B(CED-8083B)” on Target Device, and then Click OK. [Target Select window] [I/F Setting window] B. Check Calibration Data 1. Select Calibration/Calibration on the menu bar. 2. Click Read on Calibration window –> Calibration Data values display. 3. Check Data Values. [CED-8080B] CD-R VRDC DAC : 30~150 VWDC1 : 48~112 VWDC2 : 50~155 VWDC2 Offset : 0~35 [CED-8083B] CD-R VRDC DAC : 30~150 VWDC1 : 48~150 VWDC2 : 50~120 VWDC2 Offset : 0~35 4. Close Calibration window. [Calibration window] 69 C. LD Power Setup (VWDC1 / VWDC2 re-setup) 1. Remove disc on the tray. 2. Select LD Inspection/Laser Power Setup on the menu bar, and then Laser Power Setup window will appear in sight. 3. Setup LD Power meter (Frequency : 780nm, Measure Range : 0.01mW unit). 4. Click VRDC button on the LD Power Setup window. Pick-up will move outside and Laser beam will be emitted from LD. 5. Measure LD Power with LD Powermeter. -> Type the result on the blank. (If you don’t have LD Powermeter, Type the P/U value without ‘.’ Down to two places of decimals. ex) 11.34mW -> 1134) 6. Click VWRDC1 button on the LD Power Setup window and follow above step 4~5. 7. Click Setup and Setup Result will display with OK or NG. 8. Close LD Power Setup window. [LD Power Setup window] D. LD Inspection(VRDC/VWDC/FPD Level Check) 1. Remove disc on the Tray. 2. Select LD Inspection/Laser Inspection on the menu bar, and then Laser Power Test Window will appear. 3. Click Trigger button and the result will display with OK or NG. 4. Close Laser Power Test window. [LD Power Test window] 70 E.LD On 1. Remove disc on the Tray. 2. Select LD Inspection/LD ON on the menu bar, and then Laser On window will appear. 3. Select LD ON Mode and Click On button, then LD On. 4. Execute Test (Measure LD Power). 5. Click Off button, then LD Off. 6. Close Laser On window. * Speed setting is valid on “CD-R Recording Mode” & “CD-RW Recording Mode”. Continous Laser beam is emitted in the “VRDC Loop Mode”, “VWDC-1 Loop Mode” and “VWDC-2 Mode”, and Pulse_Type Laser output is emitted in the “CD-R Recording Mode” and “CD-RW Recording Mode”. [LD On window] 71 MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION IC401 (CXA2551R) : RF Signal Processor for CD-R/RW XTOK XTOR XTAND AGCON FE TZC TEIN TE RFCT RFCTC1 RFCTC2 GND RFRP VCC MPXOUT MSPP RFRPIN EQRFP SRFO EFGH AUX PHO1 BHO2 PHO2 EQRFN Block Diagram 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 WLDON 49 ERGCNT 48 SCLK 47 SDATA 46 XLAT 45 DVCC 44 DGND 43 ROPCSH 42 MPDSH 41 SPDSH 40 WBLSH 39 REPDSH 38 WFPDSH 37 DSPVCC 36 BGIREF 35 VTIREF 34 VCC 33 VC 32 DVC 31 GND 30 VCT1 29 VCT2 28 CNT_VC 27 CAV_CNT 26 ATFG PH/BH BH01 76 PHC1 77 BHC1 78 RZC 79 RECD2 80 RECD1 81 BETAOUT 82 PHC2 83 BHC2 84 RRFIN 85 RRF 86 GND 87 MCLK 88 VCC 89 WRF 90 MPP 91 HIN 92 GIN 93 MPX BETA RFEO RFRP FE TE REGISTER VC BIAS S/H MATRIX FIN 94 EIN 95 HAVC 96 DIN 97 CIN 98 BIN 99 AIN100 APC OPAMP ATIP ATFM SMFB SMOUT AGC3C AGC2C AGC1C SMIN 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 VRDCN VRDC VCC FPDO FPDIN GND CEO 7 8 RREF CEM 5 6 FVREF 3 4 WREF APCCSW VWDC1 VWDC2 VWDCN VWDC 2 SWRF 1 CEP CE 31 • Pin Description Pin No. 1 Name CEP I/O – Pin Description Center Error Amp Input (+) 2 CEM – Center Error Amp Input (-) 3 CEO O Center Error Amp Output 4 SWRF O Write RF Servo Signal Output (for Running OPC) 5 WREF I Power Sertting Voltage Input for Write APC 6 APCCSW – APC Time Constant Control for Write 7 VWDC1 O VWDC1 Voltage Output 8 VWDC2 O VWDC2 Voltage Output 9 VWDCN – APC Amp Input (-) for Write 10 VWDC O APC Amp Output for Write 11 FVREF I Reference Voltage Input for APC 12 RREF I Power Setting Voltage Input for Read APC 13 VRDCN I APC Amp Input (-) for Read 14 VRDC O APC Amp Output for Read VCC I Analog Positive Power Source Pin 15 34 67 89 16 FPDO I/O Laser Monitor Output/Laser Monitor Voltage Input 17 FPDIN I Laser Monitor Diode Contact Pin GND I Analong Ground Pin SMIN I OP Amp Input 18 31 63 87 19 32 20 SMFB – OP Amp Input (-) 21 SMOUT O OP Amp Output 22 AGC3C O External CAP Connector Pin for AGC Response Speed Setting 23 AGC2G O External CAP Connector Pin for AGC Response Speed Setting 24 AGC1G O External CAP Connector Pin for AGC Response Speed Setting 25 ATFM O Wobble Signal Output 26 ATFG O ATIP FG Output 27 CAV_CNT I CAV Speed Control Voltage Input 28 CNT_VC I CAV Speed Control Reference Voltage Input 29 VCT2 – Decoupling Pin for VC Voltage 30 VCT1 – Decoupling Pin for DVC Voltage 32 DVC O DSPVCC/2 Voltage Output. Internal Reference Voltage. 33 VC O VCC/2 Voltage Output. Internal Reference Voltage. 35 VTIREF – Resistance Connector Pin for Reference Current Setting 36 BGIREF – Resistance Connector Pin for Reference Current Setting 37 DSPVCC I DSP Positive Power Source Pin 38 WFPDSH I Sample Pulse Input for Write APC Pin No. Name I/O Pin Description 39 RFPDSH I Sample Pulse Input for Read APC 40 WBLSH I Sample Pulse Input for Wobble Signal 41 SPDSH I Sample Pulse Input for Side Beam Signal 42 MPDSH I Sample Pulse Input for Main Beam Signal 43 ROPCSH I Sample Pulse Input for Running OPC 44 DGND I Digital Ground Pin 45 DVCC I Digital Positive Power Source Pin 46 XLAT I Latch Input for Resister Settings 47 SDATA I Data Input for Resister Settings 48 SCLK I Clock Input for Resister Settings 49 ERGCNT I Gain Control Pin for Erase 50 WLDON I Write LD Control Pin 51 AGCON I AGC Control Pin 52 XTAND O Off-Track Detecition Output 53 XTOR O Tracking Amplitude Detection Pin 54 XTOK O Tracking Amplitude Error Detection Pin 55 TZC O Tracking Zero – Cross Signal Output 56 FE O Focus Error Signal Output 57 TE O Tracking Error Signal Processor 58 TEIN I Input for Tracking Signal Processor 59 RFCTC2 – Recording Area Detection Signal 2 60 RFCTC1 – Recording Area Detection Signal 1 61 RFCT O RFRP Slice Level Output 62 RFRP O Radial Contrast Signal Output 64 RFRPIN I CAP Connector Pin for MSPP 65 MSPP O Main Beam–Side Beam Signal Output 66 MPXOUT O Multiplexer Output for Signal Monitoring 68 AUX I Auxiliary Input Pin for Signal Monitoring 69 EFGH O Side Beam Signal Summing Output 70 SRFO O RF Sample Signal Output 71 EQRFP O RF Equalizer Output 72 EQRFN O RF Equalizer Output 73 PHO2 O RRFIN Signal Peak Hold Output 74 BHO2 O RRFIN Signal Bottom Hold Output 75 PHO1 O RRF Signal Peak Hold Output 76 BHO1 O RRF Signal Bottom Hold Output 77 PHC1 – CAP Connector Pin for RRF Signal Peak Hold 78 BHC1 – CAP Connector Pin for RRF Signal Bottom Hold 79 RZC O RF Zero–Cross Detection Signal Output 80 RECD2 O Recording Area Detection Signal 2 81 RECD1 O Recording Area Detection Signal 1 82 BETAOUT O Output for BETA Measure 33 Pin No. Name I/O Pin Description 83 PHC2 – CAP Connector Pin for RRFIN Signal Peak Hold 84 BHC2 – CAP Connector Pin for RRFIN Signal Bottom Hold 85 RRFIN I CAP Connector Pin for RRF 86 RRF O Read RF Signal Output 88 MCLK I Main Clock Input 90 WRF O Write RF Signal Output 91 MPP O Main Push–Pull Signal Output 92 HIN I Side Beam Signal (H) Input 93 GIN I Side Beam Signal (G) Input 94 FIN I Side Beam Signal (F) Input 95 EIN I Side Beam Signal (E) Input 96 HAVC I Main–Side Beam Signal Reference Voltage Input 97 DIN I Main Beam Signal (D) Input 98 CIN I Main Beam Signal (C) Input 99 BIN I Main Beam Signal (B) Input 100 AIN I Main Beam Signal (A) Input 34 IC201(OTI-9790) : ATAPI Interface, Write and DSP Signal Processor Block Diagram DPLL VPSET Register MONIT EFMR3 EFMR2 EFMR1 EFM ASY PANICIN ESFS EEFS WGATE HFSW EFM1…3 WRSMP EFCK EFMNT1-4 E11TP E11TS RESMP1,2 ROPC1…3 MONIT0 CIRC DRAM Interface DEFS Decoder DSFS 4K SRAM SUBIN Subcode Interface CIRC LRCKIN SDIN Encoder BTCK 4K SRAM CD-DA Interface C2PO JBSYNC ATAPI Interface 1X/2X CLV PLLC0,1 Register PLL PLL Buffer Manager nX-1X 1 HDASP# HA[2:0] HPDIAG# IOCS16# HIRQ DMACK# HIORDY HRD# HWR# HDRQ HD[15:0] HRST# ARST# CS3FX# CS1FX# 0 Audio RCASL# RCASH# RWE# RRAS0# RA11/RRAS1# RA10/RRAS2# RA9/RRAS3# RAD[8:0] SUBCK 34.5744MHz MIO0 MIO1 MIO2 DOUT MIO3 L R RD[15:0] ROE# OTI-9790 NXSYNC Bit USB ASYNC+ MSF CLK Generator D48MHz ASYNC Microcontroller Interface TON Bit Spindle Motor Controller CD-SERVO Spindle/Focus/Tracking/Sled 0 1 PRST# UAD[7:0] UALE UA[15:0] URDY UWR# URD# UCSO# UCS1# UINT0# UINT1# SDINT# CPUTYPE SLO FOO TRO TC VREF 2VREF FE TEBC BS TE RPBC RP RX TX CE LDON FLAGA…D TEST0,1 DMCON Bit DMO XIN XOUT C34M CLKOUT ATIP Demodulator MON FGIN SBRK REVDET WBLIN Sector Processor D+ 35 • Pin Description Clock Pin No. Pin Name Type Description 149 XIN I Crystal In : System Clock (33.8688MHz) 148 XOUT O Crystal Out: System Clock 141 CLKOUT O Clock Output C34M O Set to 34.5744MHz 8 CD ENCODER/DECODER Interface Pin No. 168 Pin Name PANICIN Type IS 132 WBLIN IS Panic Input : Write abort Input Wobble In : Wobble Input–Digital Signal 167 HFSW O High Frequency Modulation Switch 166 WGATE O Write Gate 180 WRSMP O Write Level Sample : Sample hold signal of write levels on reading 183 EFM1 O EFM 1 : EFM output 184 EFM2 O EFM 2 : EFM output 185 EFM3 O EFM 3 : EFM output 169 EFMNT1/ EMFNRZ 170 Description EFMNT1 : EFM pit pattern length indicator/ O EFMNT2/ EFMNRZ : EFM Signal Output EFMNT2 : EFM pit pattern length indicator/ 69M O 69M : 69.1488MHz 171 EFMNT3 O EFMNT3 : EFM pit pattern length indicator 172 EFMNT4 O EFMNT4 : EFM pit pattern length indicator 175 E11TP O EFM11T Pit Pattern : EFM11T Pit pattern indicator 176 E11TS O EFM11T Space Pattern : EFM11T Pit pattern indicator 177 EFCK O EFM Bit Clock : EFM bit Clock generated from internal clock in CD encoder 181 RESMP1 O Read Level Sample1 : Sample hold signal of read levels on writing 182 RESMP2 O Read Level Sample2 : Sample hold signal of read levels on writing 186 ROPC1 O Running OPC1 : Sample hold signal 1 of reflected beam for running OPC during write 187 ROPC2 O Running OPC2 : Sample hold signal 2 of reflected beam for running OPC during write 188 ROPC3 O Running OPC3 : Sample hold signal 3 of reflected beam for running OPC during write 133 MONIT0 O Monitor 0 : Test pin controlled by Register 03Eh 179 EEFS O EFm Frame Sync 178 ESFS O Encoder Subcode Frame Sync WOBBLE Motor Interface Pin No. Pin Name Type 6 REVDET IS Reverse Detect Motor Drive : Indicates spindle motor is rotating in reverse direction 7 FG I FG IN : HG (tachometer) pulse input 12 MON O Motor Drive On : Enables spindle motor drive 13 SBRK O Short Brake : Stops spindle motor by applying a short pulse to the motor winding 36 Description CD-SERVO Interface Pin No. 2 Pin Name DMO Type OA Description Spindle Motor Servo Output 3 SLO OA Sled Servo Output 207 FOO OA Focus Servo Output : Focus servo feedback signal 208 TRO OA Tracking Servo Output : Tracking servo feedback signal 194 TEBC OA Tracking Error Balance Control 197 FE IA Focus Error 198 TE IA Tracking Error 201 BS IA Beam Strength : This input from the preamplifier is the sum of the E and F 202 RPBC OA Ripple Balance Control 203 RP IA Ripple of RF 191 RX IS RP Zero Crossing : Used for fine search 192 TX IS TE Zero Crossing : Track crossing signal input used in conjunction with RX to photodiode outputs when using a 3-beam pick-up perform fine searches 204 CE IA Center Position Error 142 LDON O Laser Diode On 193 TC IS Track Count Input : High-frequency track crossing signal input used to perfrom 137 FLAGA O Servo Monitor Flag A : FLAGA is used to output one of four internal servo signals. rough searches and to increment the internal track counter. FLAGA can also be used as a general output port. 138 FLAGB O Servo Monitor Flag B : FLAGA is used to output one of four internal servo signals. FLAGB can also be used as a general output port. 139 FLAGC O 140 FLAGD O Servo Monitor Flag C : FLAGA is used to output one of four internal servo signals. FLAGC can also be used as a general output port. Servo Monitor Flag D : FLAGA is used to output one of four internal servo signals. FLAGD can also be used as a general output port. CD-DSP PIN Pin No. Pin Name Type Description 163 EFM IA EFM Analog Data 162 ASY OA Asymmetry DAC Output 161 EFMR1 IA EFM Analog Data Bias 1 160 EFMR2 IA EFM Analog Data Bias 2 159 EFMR3 IA EFM Analog Data Bias 3 136 MONIT O CD-DSP Monitor Output : MONIT is used to output several internal CD-DSP signals 37 AUDIO Interface Pin No. Pin Name Type Description 143 MIO0 I/O Multi Purpose I/O 144 MIO1 O Multi Purpose I/O 145 MIO2 O Multi Purpose I/O 146 DOUT O Digital Audio Output : Bi-phase serial audio output that follows the EIAJ CP1201 standard. 147 MIO3 I/O Multi Purpose I/O 151 L OA Left Channel Audio Output 154 R OA Right Channel Audio Output Note: MIO3-0 can be programmed to control an external audio DAC. ATAPI LOCAL BUS Interface Pin No. Pin Name Type 53 HRST# IS ATA Host Reset : ATA drive reset 59 HA2 62 HA1 IS ATA Host Address : Address signals/USB 48 MHz clock 60 HA0/48M 72 HD15 76 HD14 78 HD13 80 HD12 82 HD11 86 HD10 88 HD9 90 HD8 91 HD7 89 HD6 87 HD5 85 HD4 81 HD3 79 HD2 77 HD1 73 HD0 56 CS1FX#/ USBD- 57 I/OPUB I/OS CS3FX#/ Description ATA Host Data Bus/SCSI Controller Data Bus ATA Host Chip Select 1FX, 3FX/ USB D+, D- differential I/O data USBD+ 64 IOCS16# OOD ATA 16-Bit I/O 65 HIRQ I/O ATA Host Interrupt Request/SCSI Controller Interrupt Request 54 61 71 HDRQ HDASP# PUB I/O ATA Host Interface HPDIAG# I/OPUB ATA Host Interface O ATA DMA Request/DMA Acknowledge : ATAPI DMA request DMA acknowledge when connected to SCSI controller 38 Pin No. 67 Pin Name Type DMACK# I/O Description ATA DMA Acknowledge/DMA Request : ATAPI DMA acknowledge DMA request when connected to SCSI controller IORDY/ 68 DDMARDY#/ OTS DSTROBE ATA Host I/O Ready : I/O channel ready UDMA : DDMARDY#, device DMA ready; DSTROBE, device data strobe HRD#/ 69 HDMARDY#/ I/OPUA HSTROBE 70 HWR#/ UDMA : HDMARDY#, host DMA ready; HSTROBE, host data strobe I/OPUA STOP 131 ARST ATA Host Read Strobe/SCSI DMA Read Strobe ATA Host Write Strobe/SCSI DMA Write Strobe UDMA : Host stop OTS ATAPI Reset SYSTEM CONTROLLER Interface Pin No. 95 Pin Name Type PRST# IS Description System Reset : Internal state machines are reset and all registers are set to default. The assertion and negation signal of PRST# can be ASYNC to XIN but needs to be longer then 1 XIN, because the signal goes through a de-glitch circuit. 106 UCS0# IS Chip Select 0 : Enables access to internal registers 107 UCS1# IS Chip Select 1 : Enables access to buffer memory Read Enable/Data Strobe : Read enable/data strobe input for read 104 URD# IS If CPUTYPE = VCC (Intel) – This pin is read enabled. If CPUTYPE = GND (Motorola) – This pin is data strobe. Write Enable/Data read Status : Write enable/data read write status input for read 105 UWR# IS If CPUTYPE = VCC (Intel) – This pin is write enabled. If CPUTYPE = GND (Motorola) – This pin is read/write status. 110 URDY I/OPU Ready : Data ready Select use/no use by setting internal registers When accessing internal registers or buffer memory, this signal is asserted after fixing driven data. If no access, this pin is Hi-Z. Hi-Z status at reset. 113 SDINT# 112 UINT1# 111 UINT0# 103 UAD7 102 UAD6 101 UAD5 SDINT# : CD-DSP and CD-Servo system input. OPU System Interrupt Request 1 & 0 : CD-Decoder/-Encoder interrupt Signals selected by bits INTSEL4-0 in the INTMODE Register (005h,4-0) I/O Address and Data : Address and data are multiplexed in the same pin. 100 UAD4 If I/O only data, fix UALE to GND. 99 UAD3 These Signals ARE Hi-Z when chip is reset. 98 UAD2 97 UAD1 96 UAD0 39 Pin No. Pin Name 123 UA7 124 UA6 125 UA5 126 UA4 127 UA3 128 UA2 129 UA1 130 UA0 115 UA15 116 UA14 117 UA13 118 UA12 119 UA11 120 UA10 121 UA9 122 UA8 114 UALE Type Description IL Address : Use these pins if the microcontroller has a separate address and data bus. IL Address : Use these pins when accessing 64 KB buffer memory window. IS Address Latch Enable : Use this pin if the microcontroller has multiplexed addess and data bus. CPU Type Select : Microcontroller type (86 type/68type) select 94 CPUTYPE IS VCC = Intel GND = Motorola Buffer Memory Interface Pin No. Pin Name 39 RAD11 40 RAD10 41 RAD9 42 RAD8 43 RAD7 44 RDA6 45 RAD5 48 RAD4 49 RAD3 50 RAD2 51 RAD1 52 RAD0 20 RD15 21 RD14 24 RD13 25 RD12 26 RD11 27 RD10 28 RD9 29 RD8 14 RD7 15 RD6 40 Type O Description RAM Addess : Addess for DRAM These pins are multiplxed address output I/OPUA RAM Data : Data for DRAM Possible to set bus size (16 bit/8bit) by setting internal registers Pin No. Pin Name Type Description 16 RD5 17 RD4 18 RD3 19 RD2 33 RD1 32 RD0 38 RRAS0# O Row Address Strobe 0 : RAS for DRAM 30 RCASH# O Column Address Strobe High : CAS0 for DRAM – If 16 bit bus is selected, this pin RAM Data : Data for DRAM I/OPUA Possible to set bus size (16 bit/8bit) by setting internal registers used by strobe 31 RCASL# O Column Address Strobe Low 37 RWE# I/O Write Enable 0 : WE0 for DRAM 36 ROE# I/O Write strobe of RD [7:0] when 16 bit data bus is selected Output Enable : OE for DRAM Power Supply Pin No. Pin Name Description 9 VDD5 5 Volts VDD Digital Power 3.3 Volts VSS Digital Ground 10, 22, 34, 46, 55, 63, 74, 83, 92, 108, 134, 173, 189 11, 23, 35, 47, 58, 66, 75, 84, 93, 109, 135, 174, 190 152, 153, 157, 158, 199, 206 AVDD Analog Power 3.3 Volts 1, 150, 155, 156, AVSS Analog Ground 164, 196 VREF Reference voltage 2.1 Volts 205 2VREF Reference voltage 4.2 Volts 165, 195, 200 41 IC301 (HD64F3062) : MICOM Port 3 P40 /D0 P41 /D1 P42 /D2 P43 /D3 P44 /D4 P45 /D5 P46 /D6 P47 /D7 P30 /D8 P31 /D9 P32 /D10 P33 /D11 P34 /D12 P35 /D13 P36 /D14 P37 /D15 VSS VSS VSS VSS VSS VCC VSS VCC VCC Block Diagram Port 4 Address bus P53 /A 19 MD 1 Port 5 Data bus (upper) MD 2 Data bus (lower) EXTAL P27 /A 15 Clock pulse generator STBY RES P26 /A 14 H8/300H CPU P25 /A 13 Port 2 XTAL RESO/FWE* NMI LWR/P66 Port 6 HWR/P65 P20 /A 8 P17 /A 7 P16 /A 6 Port 1 P15 /A 5 BREQ/P6 1 WAIT/P6 0 P13 /A 3 P11 /A 1 P10 /A 0 Watchdog timer (WDT) Port 8 CS0 /P8 4 16-bit timer unit CS3 /IRQ1 /P8 1 IRQ0 /P8 0 Serial communication interface (SCI) x 2 channels 8-bit timer unit Programmable timing pattern controller (TPC) P95 /SCK1 /IRQ 5 P94 /SCK 0/IRQ 4 A/D converter Port 9 CS2 /IRQ2 /P8 2 P14 /A 4 P12 /A 2 RAM ADTRG/CS1 /IRQ3 /P8 3 P23 /A 11 P21 /A 9 ROM (mask ROM or flash memory) BACK/P62 P24 /A 12 P22 /A 10 Bus controller Interrupt controller ø/P67 AS/P6 3 P51 /A 17 P50 /A 16 MD 0 RD/P64 P52 /A 18 D/A converter P93 /RxD1 P92 /RxD0 P91 /TxD 1 P90 /TxD 0 * Functions as RESO in the mask ROM versions and as FWE in the flash memory version. 42 AN0 /P7 0 AN1 /P7 1 AN2 /P7 2 AN3 /P7 3 AN4 /P7 4 AN 5/P7 5 DA 0/AN 6/P7 6 DA 1/AN 7/P7 7 AVSS AVCC V REF TCLKA/TP0 /PA 0 TCLKB/TP1 /PA1 Port 7 TCLKC/TIOCA0 /TP2 /PA2 A 23 /TICOA1 /TP 4 /PA 4 TCLKD/TIOCB0 /TP3 /PA3 A 22 /TICOB1 /TP 5 /PA 5 A 21 /TIOCA2 /TP 6 /PA 6 A 20 /TIOCB2 /TP 7 /PA 7 CS 7 /TMO0 /TP8 /PB0 CS 6 /TMIO 1 /TP 9 /PB1 Port A CS5 /TMO 2 /TP10/PB2 CS4 /TMIO 3 /TP11/PB3 TP12/PB4 TP13 /PB5 TP14 /PB6 TP15 /PB7 Port B •Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Port Name Assign Vcc Vcc CS7/TMO0/TP8/PB0 LED2 CS6/TMIO1/TP9/PB1 /PRST CS5/TMO2/TP10/PB2 /UCS1 CS4/TMIO3/TP11/PB3 /UCS0 TP12/PB4 ADSEL TP13/PB5 LED1 TP14/PB6 AUD_MUTE TP15/PB7 FWE_ON RESO/FWE FWE Vss Vss P90/TxD0 ATIP/EFM P91/TxD1 BTS_TXD P92/RxD0 WR/RD P93/RxD1 BTS_RXD IRQ4/SCK0/P94 /SDINT IRQ5/SCK1/P95 TP15 D0/P40 SDATAO D1/P41 SCLK D2/P42 CDR/RW D3/P43 /EPCS Vss Vss D4/P44 /CXACS D5/P45 /DACS D6/P46 TRAY_Mute D7/P48 ACT_MUTE D8/P30 UAD0 D9/P31 UAD1 D10/P32 UAD2 D11/P33 UAD3 D12/P34 UAD4 D13/P35 UAD5 D14/P36 UAD6 D15/P37 UAD7 Vcc Vcc A0/P10 UA0 A1/P11 UA1 A2/P12 UA2 A3/P13 UA3 A4/P14 UA4 A5/P15 UA5 A6/P16 UA6 A7/P17 UA7 Vss Vss A8/P20 UA8 A9/P21 /OPEN_SW A10/P22 /LOAD_SW A11/P23 RECD1 A12/P24 RECD2 A13/P25 TESTMODE0 I/O I O O O O O O O O I I O O O I I O O O O O I O O O O I/O I/O I/O I/O I/O I/O I/O I/O I O O O O O O O O I O I I I I I Description 5V LED2 control output OTI9790 Reset control output OTI9790 Register Select1 OTI9790 Register Select0 HALL/Seld Out Select LED1 control output Audio mute output Flash writing enable output Flash writing mode setting GND Atip/EFM Select Output Serial communication transmit Write/Read Select output Serial communication receive OTI9790 Servo Interrupt Input for Test Serial data output Interface clock output CDR/CDRW Select output E2PROM selection GND CXA2551 interface latch signal output D/A interface latch signal output Tray Motor Drive Mute control FCS, TRK, and SLD ON/OFF DATA IN / OUT DATA IN / OUT DATA IN / OUT DATA IN / OUT DATA IN / OUT DATA IN / OUT DATA IN / OUT DATA IN / OUT 5V Address output Address output Address output Address output Address output Address output Address output Address output GND Address output Open switch input Load switch input Recording area detection signal input Recording area detection signal input Test Mode 0 43 No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 44 Port Name Assign A14/P26 /PLAY_KEY A15/P27 /EJECT_KEY A16/P50 XTOR A17/P51 MA/SL A18/P52 TESTMODE1 A19/P53 FLAGB Vss Vss P60/WAIT URDY P61/BREQ AGCON P62/BACK ROPCON P67/Pi SDATAI /STBY /STBY /RES /RESET NMI NMI Vss Vss EXTAL EXTAL XTAL XTAL Vcc Vcc P63/AS AS P64/RD /URD P65/HWR /UWR P66/LWR /LWR MD0 MD0 MD1 MD1 MD2 MD2 AVcc AVcc Vref VREF P70/AN0 ASYM1 P71/AN1 ASYM2 P72/AN2 BETA/Jitter P73/AN3 MPXO P74/AN4 HALL/SLDOUT P75/AN5 TP40 P76/AN6/DA0/Q104 TRKJMP P77/AN7/DA1/Q103 SLDMOVE AVss AVss IRQ0/P80 ESFS IRQ1/CS3/P81 UINT0 IRQ2/CS2/P82 UINT1 IRQ3/CS1/ADTRIG/P83 ADTRIG CS0/P84 CS0/P84 Vss Vss TP0/TCLKA/PA0 FLAGA TP1/TCLKB/PA1 SBRK TP2/TCLKC/TIOCA0/PA2 SPNFG TP3/TCLKD/TIOCB0/PA3 OPCING TP4/TIOCA1/A23/PA4 SLDFG TP5/TIOCB1/A22/PA5 SPDON TP6/TIOCA2/A21/PA6 SPN8/12M TP7/TIOCB2/A20/PA7 SPNBOOST I/O I I I I I I I I O O I I I I I I I I O O O O I I I I I I I I I I I O O I I I I I O I I O I O I O O O Description Play_key input Eject_key input Tracking error amplitude detection input Master / slave detection input Test Mode 1 OTI9790 FLAGB (RFZC) Input GND Data ready input Wobble AGC enable output ROPC Enable output E2PROM data input Standby input RESET input Nonmaskable interrupt input Ground Crystal resonator connection input Crystal resonator connection input 5V Data read latch output Data write latch output Input for setting the operation mode Input for setting the operation mode Input for setting the operation mode Analog 5V A/D reference input (4V) ASYM1/B-Level 0 Analog input ASYM2/B-Level 1 Analog input Beta/Jitter analog input (reserved) Multiplexer input for signal monitoring HALL/SLDOUT Analog input for Test Track Jump control Analog output Sled control Analog output Analog GND Encode subcode frame sync input OTI9790 Interrupt 0 input OTI9790 Interrupt 1 input A/D conversion external trigger input NC GND OTI9790 FLAGA (TEZC) input Spindle Motor Short Brake output Spindle FG signal input RRF AC Coupling control output Sled FG signal input SPINDLE Start/Stop control output 8/12cm Disc control output Spindle gain selection output IC409(M62352GP) 1) The M62352 is an integrated circuit semiconductor of CMOS structure with 12 channels of built-in D-A converters with output buffer operational amplifiers. 2) Outputs of 12 channels are used for adjustment/control of servo circuits and references. Block Diagram GND Ao2 Ao1 DI CLK LD Do Ao12 Ao11 Vcc 20 19 18 17 16 15 14 13 12 11 8-BIT R-2R D-A 12-BIT SHIFT REGISTER D-A D01 2 3 4 5 6 D7 D-A D8 9 10 D11 1 Ch2 8-BIT LATCH 12 L D-A 11 L L ADDRESS DECODER (8) (12) (12) 8-BIT LATCH Ch3 L 4 8-BIT R-2R D-A L 5 D-A L 6 D-A (12) L 7 D-A L 8 D-A L 9 D-A L 10 D-A D-A BUFFER OP AMP 1 2 3 4 5 6 7 8 9 10 Vss (VrefL) Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Ao9 Ao10 VDD (VrefU) • Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 Pin Name VrefAO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 Vref+ Description GND B-level Reference Write power reference Write power reference HAVC Offset Track SPP Reference Reserved Hall Bias Sled Offset 4V Pin No. 11 12 13 14 15 16 17 18 19 20 Pin Name VCC AO11 AO12 ED LD CLK DO AO1 AO2 GND Description 5V Tray Control VWDC protect reference Serial data output terminal LD terminal input Serial clock input terminal Serial data input terminal Read power reference VWDC2 Power reference GND 45 IC501 (BA5983 FM) 1) It controls the sled movement in track search mode and takes the tray to open/close. 2) It controls the Focus/Tracking Actuator receiving the focus error or tracking error signal from IC201. Block Diagram 25 24 23 22 21 20 19 18 17 CH3 10K Standby CH4 10K + - + - Vcc + Vcc 16 10K 10K 10K 10K 10K 10K 10K 20K - 20K LEVEL SHIFT + 10K - LEVEL SHIFT + LEVEL SHIFT + 10K 15 CH4 + - 26 + 27 + - 28 - LEVEL SHIFT + 10K - 10K 10K 10K 10K 2 3 4 5 6 7 8 9 10 11 10K 12 10K + - + + - CH2 1 10K 10K + - + - + Standby CH1, 2, 3 Vcc CH1 13 10K 14 • Pin Description Pin No. Pin name 46 Description Pin No. Pin name Description 1 BIAS IN Bias amplifier input 15 VO4(+) Driver CH4 positive output 2 OPIN1(+) Driver CH1 positive input 16 VO4 (-) Driver CH4 negative output 3 OPIN1(-) Driver CH1 negative input 17 VO3(+) Driver CH3 positive output 4 OPOUT 1 Driver CH1 output 18 VO3 (-) Driver CH3 negative output 5 OPIN2(+) Driver CH2 positive input 19 PowVcc2 PowVcc (CH3,4) 6 OPIN2(-) Driver CH2 negative input 20 STBY2 CH4 standby control 7 OPOUT 2 Driver CH2 output 21 GND GND 8 GND GND 22 OPOUT 3 CH3 output 9 STBY1 CH1~3 standby control 23 OPIN3(-) CH3 negative input 10 PowVcc1 PowVcc (CH1,2) 24 OPIN3(+) CH3 positive input 11 VO2 (-) Driver CH2 negative output 25 OPOUT 4 CH4 output 12 VO2 (+) Driver CH2 positive output 26 OPIN4(-) CH4 negative input 13 VO1 (-) Driver CH1 negative output 27 OPIN4(+) CH4 positive input 14 VO1(+) Driver CH1 positive output 28 PreVcc PreVcc IC510 (BA6664FM) : Spindle Motor Drive IC It drives the spindle motor receiving the spindle control signal at IC301 (MICOM) and IC201 (OTI-9790). RNF 28 DRIVER VM TSD Block Diagram 2 CURRENT SENSE AMP + - A2 4 GAIN SWITCH GAIN CONTROL A3 VCC GND 8 H1+ 9 H1- 10 H2 + 11 H2 - 12 FG VM Vcc PS HALL AMP PS + - + - + + + + - 23 TORQUE SENSE AMP 13 EC 22 21 VCC FR VCC 20 FG2 R D Q CK Q 19 SB SHORT BRAKE 18 17 + - SERVO SIGNAL ECR H3 + Hall 3 VCC 25 24 7 Hall 2 GSW 26 TL A1 Hall 1 RNF 27 BRAKE MODE 16 Hall Bias 15 H3 - 14 CNF BR VH FIN • Pin Description Description Pin No. Pin Name 1 N.C. N.C. 2 A3 Output3 for motor 3 N.C. N.C. 4 A2 Output2 for motor 5 N.C. N.C. 6 N.C. N.C. 7 A1 Output1 for motor 8 GND GND 9 H + 1 Positive input for hall input Amp1. 10 H 1 Negative input for hall input Amp1. 11 H2+ Positive input for hall input Amp2. 12 H 2 Negative input for hall input Amp2. 13 H + 3 Positive input for hall input Amp3. 14 H 3 Negative input for hall input Amp3. 15 VH Hall bias terminal 16 BR Brake Mode terminal 17 CNF Capacitor connection pin for phase compensation 18 SB Short brake terminal 19 FG2 3 Phase synthesized FG signal output terminal 20 FR Rotation detect signal output terminal 21 ECR Torque control standard voltage input terminal 22 EC Torque control voltage input terminal 23 PS START/STOP Switch 24 FG FG signal output terminal 25 VCC Power supply for signal division 26 GSN Gain Switch 27 VM1 Power supply for driver division 28 RNF FIN FIN Resistance connection pin for output current sense GND 47 IC502 (BA5925FV) It detects the speed of the moving sled, and transfers the sled control signal from IC201 (OTI-9790) to IC501 (BA5983FM) Block Diagram 26 25 24 23 22 5K 10K + - + - 10K 5K 10K Vcc 20 19 17 16 15 EDGE 6.8K LEVEL SHIFT + - 18 17K 10K 10K 50K 50K 21 + - 27 + - 28 8.2K 2 3 23K 44K 1K 4 5 + - + - 44K 20K 40K 44K 100K + - 1 100K 40K 20K 40K 44K + - 8.2K 40K 40K 40K 100K 40K + - + - 20K + - 40K + - 20K + - LOGIC 8.2K + - 100K 8.2K 1K 6 7 8 9 10 STBY 23K 11 12 13 14 • Pin Description Pin No. 48 Pin Name Description Pin No. Pin Name Description 1 GND GND 15 IN2+ OP Amp 2 Positive Input 2 HA+ Hall Amp A Positive Input 16 IN2- OP Amp 2 Negative Input 3 HA- Hall Amp A Negative Input 17 OUT2 OP Amp 2 Output 4 A+ Hall Amp A Output 18 EDGE Edge Pulse Detect Pin 5 CA+ Differential Circuit A Input 19 VLO VL Amp Output 6 BIAS_IN Bias Amp Input 20 VL- VL Amp Negative Input 7 CB+ Differential Circuit B Input 21 VCC VCC 8 B+ Hall Amp Output 22 HB_IN Hall Bias Input 9 HB- Hall Amp B Negative Input 23 VH+ Hall Bias Positive Output 10 HB+ Hall Amp B Positive Input 24 VH- Hall Bias Negative Output 11 IN1+ OP Amp 1 Positive Input 25 SW_CONT Switch Buffer Amp Output Control Pin 12 IN1- OP Amp 1 Negative Input 26 SW_OUT Switch Buffer Amp Output 13 OUT1 OP Amp 1 Output 27 SW_IN1 Switch Buffer Amp Input 1 14 STBY Standby Control Pin 28 SW_IN2 Switch Buffer Amp Input 2 72 BA6664FM MOTOR DRIVE Spindle Motor Tray Motor BA5983FM F.T.S.T DRIVE FCS TRK SLED Motor Laser Power BA5925 Sled Speed Optical Pick-up KRS-202A/220C AT93C86 1kB EEPROM Address/Data OPC/ROPC Circuit Timing Signals Audio Mute H/P Amp DSP+Servo DECODER ENCODER ATIP Demodulator Write Strategy I/F OTI9790 Data I/F Cable Line Out Headphone Jack L,R L,R 2MB DRAM H O S T 1. Block Diagram of CD-R/RW Drive M62352 12ch 8bit DAC H8/3062 System Controller 20MHZ RF/Servo Signal 17.43MHz CPLD Laser Control S/H Signal Gen. S/H CXA2551R RF Amp Wobble ALPC 33.86MHz BLOCK DIAGRAM 12V Act _Mute UA[0:8], UAD[0:15] URDY, URD, UWR /UCS0, 1 DSP/Servo /ATAPI /PRST IC201 OTI-9790 8V IC511 NJM7808 Regulator IC501 BA5983 FCS/TRK/SLD/TRY Driver 8V IC512 NJM7808 Regulator +12V L101 Bead GND 41 44 /EPCS SDATA, SCLK /DACS SDATA, SCLK /CXACS /RESET RESET IC302 AT93C86 EEPROM IC409 M62352 DAC 2V_ACT 32 OP Amp NJM3414 IC514 2V CXA2551 ASP IC401 (3.9V) 4V BA3939 Regulator BA033S Regulator XC61AN 3.3V IC103 IC102 IC101 SDATA, SCLK L102 Bead IC301 HD64F3062 µ-COM GND PN201 42 43 +5V From HOST 2.5V 5V 2. Power Block Diagram 73 74 MD U,V,W HU,HV,HW TRY+/SLD+/FCS+/TRK+/- A,B,C,D,E,F,G,H IC510 BA6664 Drive IC501 BA5983 Drive HA+/H1+/-,H2+/- IC401 CXA2551 ASP IC403 NJM3404 EC IC508 BU4053 IC412 TC7W08 IC509 NJM3404 SPDL FG SLO DMO FAO/TAO /UCS0,1,URDY,URD,UWR UA[0:8],UAD[0:15] BS RX RPBC TEBC TE TX CE WBLIN WGATE,LDON EFCK,EEPS EFM1,2,3 IC411 NJM3404 IC601 XC9536 CPLD IC414 NC7SZ66 IC409 M62352,DAC IC301 HD64F3062 µ-COM SLD_MOV IC509 BA5925 Sled Speed SLD FG TRY CTL MPXO IC403 NJM3404 IC404 NJM2903 RECD1,2,XTOR PHO1 RFRP,RFCT CE ATFG TZC TE FE WFPDSH, RFPDSH, WBLSH, SPDSH, MPDSH W/XR, OSCEN,ENBL,ODON IC201 OTI-9790 3. System Control Block Diagram MD VWDC2 WREF RPOWER VRDC, VWC1 FPDO A,B,C,D,E,F,G,H IC409 M62352 DAC IC401 CXA2551 ASP H/P Out SDATA,SCLK /DACS BLEBEL0 BETA,ASYM1,2 EQRFN,EQRFP RRF RRFIN PHO1 IC801 H/P Amp Line out IC301 HD64F3062 µ-COM IC405 BU4052B IC413 EL2245CS IC403 NJM3403 ERGCNT,WBLON WFPDSH,RFPDSH,WBLSH,SPDSH,MPDSH W/XR,OSCEN,ENBL,ODON Q804 Mute Control /UCS0,1,URDY,URD,UWR UA[0:8],UAD[0:15] (1.2V) Rout Lout BS WGATE,LDON EFCK,EEPS EFM1,2,3 EFM(RFAC) RFDC(1V) IC601 XC9536 CPLD IC201 OTI-9790 4. Write/Read Block Diagram 75 5. Block Diagram 5 * CED-8080B : Optical Pick-up KRS-202A * CED-8083B : Optical Pick-up KRS-220C 33.86MHz I/F cable H O S T OTI9790 CXA2551R RF Amp. Wobble ALPC 4 *Optical Pick-up KRS-202A/220C Disc Motor unit GRS-R02A/ OSM-32A 3 SPINDLE MOTOR FOCUS COIL DSP + Servo DECODER ENCODER ATIP Demodulator Write Strategy I/F SLED MOTOR CPLD Command LOADING MOTOR 20MHz H8/3062 System Controller BA6664FM MOTOR DRIVE DRAM Data Laser Control TRACKING COIL Data AUDIO Circuitry Beta BA5983FM F.T.S.F DRIVE Headphone Jack RF ROPC Circuit R-ch A1,A2, B Level L-ch 2 +8V A 76 +3.3V 3.9V Reg. +3.9V Line-out 8V Reg. 1 3.3V Reg. +5V +5V GND GND GND GND +12V +12V B C D 5 EXPLODED VIEW 008 431 009 012 034 005 435 011 014 006 013 420 4 004 015 PBM00 (MAIN C. B. A) A01 016 010 3 028 430 030 021 402 430 402 402 029 402 001 021 007 031 022 050 003 2 A02 002 020 400 023 020 402 500 413 025 413 024 026 413 027 1 419 413 402 A B C 11 D 12 E F G H