Transcript
PD - 94436C
IRF2804 IRF2804S IRF2804L
AUTOMOTIVE MOSFET
HEXFET® Power MOSFET
Features l l l l l
Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
D
VDSS = 40V RDS(on) = 2.0mΩ
G
Description
ID = 75A
S
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
D2Pak IRF2804S
TO-220AB IRF2804
TO-262 IRF2804L
Absolute Maximum Ratings Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
280
A
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (See Fig. 9)
200
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
IDM
Pulsed Drain Current
PD @TC = 25°C
Maximum Power Dissipation
330
W
VGS
Linear Derating Factor Gate-to-Source Voltage
2.2 ± 20
W/°C V
670
mJ
EAS
75
c
1080
EAS (tested)
Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
i
c
d
1160 See Fig.12a,12b,15,16
h
A mJ °C
-55 to + 175
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw
10 lbf•in (1.1N•m)
Thermal Resistance Parameter RθJC RθCS
Junction-to-Case Case-to-Sink, Flat, Greased Surface
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient (PCB Mount, steady state)
j
Typ.
Max.
Units
–––
0.45
°C/W
0.50
–––
–––
62
–––
40
HEXFET® is a registered trademark of International Rectifier.
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1 08/27/03
IRF2804/S/L Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆ΒVDSS/∆TJ
Drain-to-Source Breakdown Voltage
RDS(on) SMD
RDS(on) TO-220 Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs IDSS IGSS
Min. Typ. Max. Units V
Conditions
40
–––
–––
VGS = 0V, ID = 250µA
Breakdown Voltage Temp. Coefficient
–––
0.031
–––
V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
1.5
2.0
mΩ
–––
1.8
2.3
2.0
–––
4.0
f = 75A f
VGS = 10V, ID = 75A VGS = 10V, ID
V
VDS = VGS, ID = 250µA
Forward Transconductance
130
–––
–––
S
VDS = 10V, ID = 75A
Drain-to-Source Leakage Current
–––
–––
20
µA
VDS = 40V, VGS = 0V
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
nA
VGS = 20V
nC
ID = 75A
VDS = 40V, VGS = 0V, TJ = 125°C
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
160
240
VGS = -20V
Qgs
Gate-to-Source Charge
–––
41
62
VDS = 32V
Qgd
Gate-to-Drain ("Miller") Charge
–––
66
99
VGS = 10V
td(on)
Turn-On Delay Time
–––
13
–––
tr
Rise Time
–––
120
–––
ID = 75A
td(off)
Turn-Off Delay Time
–––
130
–––
RG = 2.5Ω
tf
Fall Time
–––
130
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.) from package and center of die contact VGS = 0V
ns
VGS = 10V nH
f
VDD = 20V
f
Between lead,
D
G
S
Ciss
Input Capacitance
–––
6450
–––
Coss
Output Capacitance
–––
1690
–––
Crss
Reverse Transfer Capacitance
–––
840
–––
ƒ = 1.0MHz, See Fig. 5
Coss
Output Capacitance
–––
5350
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
1520
–––
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
2210
–––
VGS = 0V, VDS = 0V to 32V
pF
VDS = 25V
Diode Characteristics Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
280
ISM
(Body Diode) Pulsed Source Current
–––
–––
1080
VSD
(Body Diode) Diode Forward Voltage
–––
–––
1.3
V
p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V
trr Qrr
Reverse Recovery Time Reverse Recovery Charge
––– –––
56 67
84 100
ns nC
TJ = 25°C, IF = 75A, VDD = 20V di/dt = 100A/µs
ton
Forward Turn-On Time
c
A
D
showing the integral reverse
G S
f
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C, L=0.24mH, RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use above this value. ISD ≤ 75A, di/dt ≤ 220A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
2
MOSFET symbol
Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production. This is applied to D 2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Max R DS(on) for D2Pak and TO-262 (SMD) devices.
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IRF2804/S/L
10000
10000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
1000
TOP TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
10
4.5V
1000
VGS V GS
15V 15V 10V 10V 8.0V 8.0V 7.0V 7.0V 6.0V 6.0V 5.5V 5.5V 5.0V BOTTOM 5.0V 4.5V BOTTOM 4.5V
100
4.5V
20µs PULSE WIDTH Tj = 25°C
20µs PULSE WIDTH Tj = 175°C
1
10 0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
300
G fs , Forward Transconductance ( S)
ID, Drain-to-Source Current (Α)
1
T J = 175°C 100
T J = 25°C 10
VDS = 10V 20µs PULSE WIDTH
1
250
T J = 25°C
200
T J = 175°C
150
100
50
VDS = 10V 20µs PULSE WIDTH 0
4.0
5.0
6.0
7.0
8.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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9.0
0
40
80
120
160
200
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance vs. Drain Current
3
IRF2804/S/L
12000
20
10000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
C, Capacitance (pF)
Coss = Cds + Cgd 8000
Ciss 6000
4000
Coss
2000
Crss
VDS= 32V VDS= 20V VDS= 8.0V
16
12
8
4
0
0 1
ID= 75A
10
0
100
120
160
200
240
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
10000
1000.0
OPERATION IN THIS AREA LIMITED BY RDS(on) ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
80
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
T J = 175°C
100.0
10.0
1.0 T J = 25°C VGS = 0V
0.1 0.2
0.6
1.0
1.4
1.8
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
4
40
1000
100
1msec
10
1 2.2
100µsec
Tc = 25°C Tj = 175°C Single Pulse 0
1
10msec 10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF2804/S/L
2.0
LIMITED BY PACKAGE
ID , Drain Current (A)
250 200 150 100 50 0
ID = 75A VGS = 10V
1.5
(Normalized)
RDS(on) , Drain-to-Source On Resistance
300
1.0
0.5
25
50
75
100
125
150
175
-60 -40 -20
T C , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
Thermal Response ( Z thJC )
1
D = 0.50 0.20
0.1
0.10 0.05 0.02 0.01
0.01
SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF2804/S/L
1600
DRIVER
L
VDS
D.U.T
RG
+ V - DD
IAS VGS 20V
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp
EAS, Single Pulse Avalanche Energy (mJ)
15V
ID 31A 53A BOTTOM 75A TOP
1200
800
400
0 25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms QG
10 V QGS
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T.
50KΩ 12V
.2µF .3µF
D.U.T.
+ V - DS
VGS(th) Gate threshold Voltage (V)
4.0
ID = 250µA 3.0
2.0
1.0 -75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage vs. Temperature
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IRF2804/S/L
10000
Avalanche Current (A)
Duty Cycle = Single Pulse 1000
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
0.01 100
0.05 0.10 10
1 1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
800
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 75A 600
400
200
0 25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
7
IRF2804/S/L
D.U.T
Driver Gate Drive
+
+
-
P.W.
D.U.T. ISD Waveform Reverse Recovery Current
+
V DD
• dv/dt controlled by RG • Driver same type as D.U.T. • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test
P.W. Period
*
RG
D=
VGS=10V
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
-
Period
+
Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
Re-Applied Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent ISD
Ripple ≤ 5%
*
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V DS V GS RG
RD
D.U.T. +
-V DD
10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit VDS 90%
10% VGS td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF2804/S/L TO-220AB Package Outline Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103)
10.54 (.415) 10.29 (.405)
-B-
3.78 (.149) 3.54 (.139)
4.69 (.185) 4.20 (.165)
-A-
1.32 (.052) 1.22 (.048)
6.47 (.255) 6.10 (.240)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1
2
3
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 1.40 (.055) 3X 1.15 (.045)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
0.93 (.037) 0.69 (.027)
0.36 (.014)
3X M
B A M
0.55 (.022) 0.46 (.018)
2.92 (.115) 2.64 (.104)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE : THIS IS AN IRF1010 WITH ASSEMBLY LOT CODE 9B1M
A
INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
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PART NUMBER IRF1010 9246 9B 1M
DATE CODE (YYWW) YY = YEAR WW = WEEK
9
IRF2804/S/L D2Pak Package Outline Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L"
INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE
10
PART NUMBER F 530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
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IRF2804/S/L TO-262 Package Outline Dimensions are shown in millimeters (inches)
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C"
INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE
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PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
11
IRF2804/S/L D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
FEED DIRECTION 1.85 (.073) 1.65 (.065)
1.60 (.063) 1.50 (.059)
11.60 (.457) 11.40 (.449)
0.368 (.0145) 0.342 (.0135)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL 10.90 (.429) 10.70 (.421)
1.75 (.069) 1.25 (.049)
4.72 (.136) 4.52 (.178)
16.10 (.634) 15.90 (.626)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941) 4
330.00 (14.173) MAX.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362) MIN.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/03
12
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/
