Transcript
IRFB4110PbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
VDSS RDS(on) typ. max. ID (Silicon Limited)
D
G
Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead Free l RoHS Compliant, Halogen-Free
Package Type
IRFB4110PbF
TO-220
c
ID (Package Limited)
S
Base Part Number
100V 3.7mΩ 4.5mΩ 180A 120A
D
G
D
S
TO-220AB
G
D
S
Gate
Drain
Source
Standard Pack Form
Quantity
Tube
50
Orderable Part Number IRFB4110PbF
Absolute Maximum Ratings Symbol
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Units
c 130c 180
A
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
120
IDM
Pulsed Drain Current
670
PD @TC = 25°C
Maximum Power Dissipation
370
W
Linear Derating Factor
2.5
VGS
Gate-to-Source Voltage
± 20
W/°C V
dv/dt TJ
Peak Diode Recovery
5.3
TSTG
Storage Temperature Range
d
f
300
Soldering Temperature, for 10 seconds (1.6mm from case)
x
Avalanche Characteristics Single Pulse Avalanche Energy
IAR
Avalanche Currentd
EAR
Repetitive Avalanche Energy
e
g
x
10lb in (1.1N m)
Mounting torque, 6-32 or M3 screw EAS (Thermally limited)
V/ns °C
-55 to + 175
Operating Junction and
190
mJ
See Fig. 14, 15, 22a, 22b
A mJ
Thermal Resistance Symbol
Parameter
Typ.
Max.
–––
0.402
Case-to-Sink, Flat Greased Surface
0.50
–––
Junction-to-Ambient
–––
62
RθJC
Junction-to-Case
RθCS RθJA
1
k
j
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Units °C/W
April 28, 2014
IRFB4110PbF
Static @ TJ = 25°C (unless otherwise specified) Symbol
Parameter
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units 100 ––– ––– 2.0 ––– ––– ––– –––
––– ––– 0.108 ––– 3.7 4.5 ––– 4.0 ––– 20 ––– 250 ––– 100 ––– -100
Conditions
V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 5mA mΩ VGS = 10V, ID = 75A V VDS = VGS, ID = 250µA µA VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V
d
g
Dynamic @ TJ = 25°C (unless otherwise specified) Symbol
Parameter
Min. Typ. Max. Units
gfs Qg Qgs Qgd
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge
160 ––– ––– –––
––– 150 35 43
––– 210 ––– –––
S nC
RG td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
–––
1.3 25 67 78 88 9620 670 250 820 950
––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Ω
i
Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)
h
––– ––– ––– ––– ––– ––– ––– ––– –––
ns
pF
Conditions VDS = 50V, ID = 75A ID = 75A VDS = 50V VGS = 10V
g
VDD = 65V ID = 75A RG = 2.6Ω VGS = 10V VGS = 0V VDS = 50V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V VGS = 0V, VDS = 0V to 80V
g
j h
Diode Characteristics Symbol IS
Parameter Continuous Source Current
VSD trr
(Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM ton
Reverse Recovery Current Forward Turn-On Time
ISM
di
Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.033mH RG = 25Ω, IAS = 108A, VGS =10V. Part not recommended for use above this value.
2
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Min. Typ. Max. Units –––
––– 170
–––
–––
c
670
A
Conditions MOSFET symbol showing the integral reverse
D
G
S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V VR = 85V, ––– 50 75 ns TJ = 25°C T = 125°C I ––– 60 90 J F = 75A di/dt = 100A/µs ––– 94 140 nC TJ = 25°C TJ = 125°C ––– 140 210 ––– 3.5 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
g
ISD ≤ 75A, di/dt ≤ 630A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
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IRFB4110PbF 1000
1000
BOTTOM
VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V
TOP
100
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V
BOTTOM
100
4.5V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
10
10 0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
3.0 RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
1000
100
T J = 25°C
10 T J = 175°C 1
VDS = 25V ≤60µs PULSE WIDTH 0.1
ID = 75A VGS = 10V
2.5
2.0
1.5
1.0
0.5 1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
100000
12.0
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 75A
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Ciss
10000
Coss 1000 Crss
100
10.0
VDS= 80V VDS= 50V
8.0 6.0 4.0 2.0 0.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3
4.5V
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0
50
100
150
200
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Submit Datasheet Feedback
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IRFB4110PbF 10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
T J = 25°C
10
1
OPERATION IN THIS AREA LIMITED BY R DS(on)
1000 100
100µsec 10 1msec
1
VGS = 0V 0.01
0.1 0.0
0.5
1.0
1.5
0.1
2.0
Limited By Package
ID, Drain Current (A)
140 120 100 80 60 40 20 0 50
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
180
25
100
1000
125 Id = 5mA 120 115 110 105 100 95 90 -60 -40 -20 0 20 40 60 80 100120140160180
TC , Case Temperature (°C)
T J , Temperature ( °C )
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
800 EAS , Single Pulse Avalanche Energy (mJ)
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
ID 17A 27A BOTTOM 108A
700
TOP
600 500 400 300 200 100 0
0.0 0
20
40
60
80
100
120
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy 4
10
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
160
1
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Energy (µJ)
10msec
DC
Tc = 25°C Tj = 175°C Single Pulse
0.1
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25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent Submit Datasheet Feedback
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IRFB4110PbF
Thermal Response ( Z thJC )
1 D = 0.50 0.1
0.20 0.10 0.05
0.01
0.02 0.01
τJ
R1 R1 τJ τ1
R2 R2
R3 R3 τC
τ2
τ1
τ3
τ2
τ3
Ci= τi/R i Ci= τi/Ri
0.001
SINGLE PULSE ( THERMAL RESPONSE )
0.0001 1E-006
τC
Ri (°C/W) 0.09876251 0.2066697 0.09510464
τi (sec) 0.000111 0.001743 0.012269
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and Tstart =25°C (Single Pulse)
0.01 0.05
10
0.10
1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 0.1 1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
250
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 108A
200
150
100
50
0 25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature 5
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IRFB4110PbF 25
3.5
IF = 30A V R = 85V
20
TJ = 25°C TJ = 125°C
3.0 2.5
IRR (A)
VGS(th), Gate threshold Voltage (V)
4.0
ID = 250µA ID = 1.0mA ID = 1.0A
2.0 1.5
15
10
5
1.0 0
0.5 -75 -50 -25 0
0
25 50 75 100 125 150 175 200
200
600
800
1000
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
560
25
20
IF = 45A V R = 85V
480
IF = 30A V R = 85V
TJ = 25°C TJ = 125°C
400
TJ = 25°C TJ = 125°C
QRR (nC)
15
10
320 240
5
160 80
0 0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt 560
QRR (nC)
IRR (A)
400
diF /dt (A/µs)
T J , Temperature ( °C )
480
IF = 45A V R = 85V
400
TJ = 25°C TJ = 125°C
320 240 160 80 0
200
400
600
800
1000
diF /dt (A/µs)
Fig. 20 - Typical Stored Charge vs. dif/dt 6
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IRFB4110PbF
D.U.T
Driver Gate Drive
-
-
-
*
D.U.T. ISD Waveform Reverse Recovery Current
+
RG
• • • •
dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
P.W. Period VGS=10V
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
+
D=
Period
P.W.
+
+ -
Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
Re-Applied Voltage
Body Diode
VDD
Forward Drop
Inductor Current Inductor Curent ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V
D.U.T
RG VGS 20V
DRIVER
L
VDS
tp
+ V - DD
IAS tp
A
0.01Ω
I AS
Fig 21a. Unclamped Inductive Test Circuit LD
Fig 21b. Unclamped Inductive Waveforms
VDS
VDS
90%
+ VDD -
10%
D.U.T
VGS
VGS Pulse Width < 1µs Duty Factor < 0.1%
td(on)
Fig 22a. Switching Time Test Circuit
tr
td(off)
tf
Fig 22b. Switching Time Waveforms Id Vds Vgs
L DUT
0
VCC Vgs(th)
1K
Qgs1 Qgs2
Fig 23a. Gate Charge Test Circuit 7
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Qgd
Qgodr
Fig 23b. Gate Charge Waveform Submit Datasheet Feedback
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IRFB4110PbF TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
PART NUMBER
IRFB4110 PYWW? LC
LC
OR
DATE CODE P = LEAD-FREE Y = LAST DIGIT OF YEAR WW = WORK WEEK ? = ASSEMBLY SITE CODE
INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
PART NUMBER
IRFB4110 YWWP LC
LC
DATE CODE Y = LAST DIGIT OF YEAR WW = WORK WEEK P = LEAD-FREE
TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFB4110PbF Qualification information† †
Industrial
Qualification level
(per JEDEC JESD47F
Moisture Sensitivity Level
††
guidelines)
TO-220
RoHS compliant
N/A Yes
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/ Applicable version of JEDEC standard at the time of product release.
Revision History Date
4/28/2014
Comment • Updated data sheet with new IR corporate template. • Updated package outline & part marking on page 8. • Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1. • Updated typo on the Fig.19 and Fig.20, unit of Y-axis from "A" to "nC" on page 6.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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