Transcript
IRFHM8235PbF VDSS
25
V
VGS max RDS(on) max (@ VGS = 10V) (@ VGS = 4.5V)
±20
V
Qg (typical) ID (@TC (Bottom) = 25°C)
7.7
HEXFET® Power MOSFET
m
13.4
S
7.7
S
S
D
nC
25
G
D D
A
D
D
PQFN 3.3X3.3 mm
Applications Control MOSFET for synchronous buck converter
Features Low Thermal Resistance to PCB (<4.1°C/W) Low Profile (<1.05mm) Industry-Standard Pin out Compatible with Existing Surface Mount Techniques RoHS Compliant, Halogen-Free MSL1, Consumer Qualification
Base part number
Package Type
IRFHM8235PbF
PQFN 3.3 mm x 3.3 mm
Benefits Enable better Thermal Dissipation Increased Power Density results in Multi-Vendor Compatibility Easier Manufacturing Environmentally Friendlier Increased Reliability
Standard Pack Form Quantity Tape and Reel 4000
Orderable Part Number IRFHM8235TRPbF
Absolute Maximum Ratings
Parameter
Max.
Units V
VGS
Gate-to-Source Voltage
± 20
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
16
ID @ TA = 70°C
Continuous Drain Current, VGS @ 10V
13
ID @ TC(Bottom) = 25°C
Continuous Drain Current, VGS @ 10V
50
ID @ TC(Bottom) = 100°C
Continuous Drain Current, VGS @ 10V
32
ID @ TC = 25°C IDM
Continuous Drain Current, VGS @ 10V (Source Bonding Technology Limited) Pulsed Drain Current
PD @TA = 25°C
Power Dissipation
3.0
PD @TC(Bottom) = 25°C
Power Dissipation
30
Linear Derating Factor TJ
Operating Junction and
TSTG
Storage Temperature Range
A
25 240
0.024 -55 to + 150
W W/°C °C
Notes through are on page 10
1
2016-2-23
IRFHM8235PbF
Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage BVDSS Breakdown Voltage Temp. Coefficient BVDSS/TJ RDS(on) Static Drain-to-Source On-Resistance VGS(th) VGS(th) IDSS
Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
gfs Qg Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss
Min. 25 ––– ––– ––– 1.35 ––– ––– ––– ––– ––– 43 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Typ. ––– 19 6.2 10.3 1.8 -5.9 ––– ––– ––– ––– ––– 16 7.7 1.9 1.3 2.7 1.5 4.0 6.4 1.6 7.9 16 7.5 5.2 1040 300 120
Max. ––– ––– 7.7 13.4 2.35 ––– 1.0 150 100 -100 ––– ––– 12 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Units Conditions V VGS = 0V, ID = 250µA mV/°C Reference to 25°C, ID = 1.0mA VGS = 10V, ID = 20A m VGS = 4.5V, ID = 16A V V = VGS, ID = 25µA mV/°C DS VDS = 20V, VGS = 0V µA VDS = 20V, VGS = 0V, TJ = 125°C VGS = 20V nA VGS = -20V S VDS = 10V, ID = 20A nC VGS = 10V, VDS = 13V, ID = 20A VDS = 13V VGS = 4.5V nC ID = 20A
nC
VDS = 16V, VGS = 0V
VDD = 13V, VGS = 4.5V ID = 20A ns RG=1.8 VGS = 0V pF VDS = 10V ƒ = 1.0MHz
Avalanche Characteristics Parameter Single Pulse Avalanche Energy
EAS
Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage Reverse Recovery Time trr Qrr Reverse Recovery Charge
––– ––– ––– ––– –––
2
Junction-to-Ambient Junction-to-Ambient
Units mJ
Conditions MOSFET symbol ––– 25 showing the A integral reverse ––– 240 p-n junction diode. ––– 1.0 V TJ = 25°C, IS = 20A, VGS = 0V 10 15 ns TJ = 25°C, IF = 20A, VDD = 13V 4.9 7.4 nC di/dt = 300A/µs
Parameter
RJA RJA (<10s)
Max. 41
Min. Typ. Max. Units
Thermal Resistance RJC (Bottom) Junction-to-Case Junction-to-Case RJC (Top)
Typ. –––
D
G S
Typ. –––
Max. 4.1
–––
42
––– –––
42 28
Units
°C/W
2016-2-23
IRFHM8235PbF
1000
1000 VGS 10V 7.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
100
10
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
1 2.5V
0.1
BOTTOM
10 2.5V 1
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
Tj = 150°C
0.01
0.1 0.1
1
10
100
0.1
1
VDS, Drain-to-Source Voltage (V)
1.6
100
10 TJ = 150°C TJ = 25°C 1 VDS = 10V 60µs PULSE WIDTH
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current (A)
100
Fig 2. Typical Output Characteristics
1000
ID = 20A VGS = 10V
1.4
1.2
1.0
0.8
0.6
0.1 1.0
2.5
4.0
5.5
7.0
8.5
10.0
11.5
-60 -40 -20 0
VGS, Gate-to-Source Voltage (V)
10000
Fig 4. Normalized On-Resistance vs. Temperature 14.0
VGS = 0V, f = 1 MHZ C iss = Cgs + C gd , Cds SHORTED C rss = Cgd
VGS, Gate-to-Source Voltage (V)
ID= 20A
C oss = C ds + C gd
Ciss
1000
Coss Crss
100
20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
C, Capacitance (pF)
10
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
12.0
VDS= 20V VDS= 13V
10.0
VDS= 5.0V
8.0 6.0 4.0 2.0 0.0
10 0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3
VGS 10V 7.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
0
2
4
6
8
10 12 14 16 18 20
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 2016-2-23
IRFHM8235PbF
1000 ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100 TJ = 150°C TJ = 25°C
10
1
OPERATION IN THIS AREA LIMITED BY RDS(on)
100
100µsec 1msec
10 Limited by source bonding technology
1
DC 0.1
Tc = 25°C Tj = 150°C Single Pulse
VGS = 0V
0.01
0.1 0.0
0.5
1.0
1.5
2.0
0.1
2.5
1
10
100
VDS , Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage 2.8
55 VGS(th), Gate threshold Voltage (V)
Limited by source bonding technology 44 ID , Drain Current (A)
10msec
33
22
11
0 25
50
75
100
125
2.4
2.0
1.6
1.2
ID = 25µA ID = 250µA ID = 1.0mA ID = 1.0A
0.8
150
-75 -50 -25
TC , Case Temperature (°C)
0
25
50
75 100 125 150
TJ , Temperature ( °C )
Fig 10. Threshold Voltage Vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
Thermal Response ( ZthJC ) °C/W
10
D = 0.50 1
0.20 0.10 0.05
0.1
0.02 0.01
0.01
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006
1E-005
0.0001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 4
2016-2-23
IRFHM8235PbF 180
24.0 EAS , Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance (m)
ID = 20A 20.0 16.0 12.0 TJ = 125°C 8.0 4.0
TJ = 25°C
ID 4.0A 8.6A BOTTOM 20A
160
TOP
140 120 100 80 60 40 20 0
0.0 2
4
6
8
10
12
14
16
18
25
20
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
VGS, Gate -to -Source Voltage (V)
Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
Avalanche Current (A)
100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 125°C and Tstart =25°C (Single Pulse) 10
1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 125°C. 0.1 1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Single avalanche event: pulse current vs. pulse width
5
2016-2-23
IRFHM8235PbF
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS tp
15V
L
VDS
D.U.T
RG
IAS 20V
tp
DRIVER
+ V - DD
A
0.01
I AS
Fig 16a. Unclamped Inductive Test Circuit
Fig 16b. Unclamped Inductive Waveforms
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
Id Vds Vgs
Vgs(th)
Qgs1 Qgs2
Fig 18a. Gate Charge Test Circuit 6
Qgd
Qgodr
Fig 18b. Gate Charge Waveform 2016-2-23
IRFHM8235PbF
Placement and Layout Guidelines
The typical application topology for this product is the synchronous buck converter. These converters operate at high frequencies (typically around 400 kHz). During turn-on and turn-off switching cycles, the high di/dt currents circulating in the parasitic elements of the circuit induce high voltage ringing which may exceed the device rating and lead to undesirable effects. One of the major contributors to the increase in parasitics is the PCB power circuit inductance. This section introduces a simple guideline that mitigates the effect of these parasitics on the performance of the circuit and provides reliable operation of the devices. To reduce high frequency switching noise and the effects of Electromagnetic Interference (EMI) when the control MOSFET (Q1) is turned on, the layout shown in Figure 19 is recommended. The input bypass capacitors, control MOSFET and output capacitors are placed in a tight loop to minimize parasitic inductance which in turn lowers the amplitude of the switch node ringing, and minimizes exposure of the MOSFETs to repetitive avalanche conditions. When the synchronous MOSFET (Q2) is turned on, high average DC current flows through the path indicated in Figure 19. Therefore, the Q2 turn-on path should be laid out with a tight loop and wide traces at both ends of the inductor to minimize loop resistance.
7
2016-2-23
IRFHM8235PbF
PQFN 3.3 x 3.3 Outline “C” Package Details 8
7
6
5
1
2
3
4
3
4
6
5
1
8
2
7
PQFN 3.3 x 3.3 Outline “G” Package Details 8
7
6
5
#1
2
3
4
#1
2
3
4
8
7
6
5
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf For more information on package inspection techniques, please refer to application note AN-1154: http://www.irf.com/technical-info/appnotes/an-1154.pdf 8
2016-2-23
IRFHM8235PbF
PQFN 3.3mm x 3.3mm Outline Part Marking
INTERNATIONAL RECTIFIER LOGO DATE CODE ASSEMBLY SITE CODE (Per SCOP 200-002)
XXXX ?YWW? XXXXX
PIN 1 IDENTIFIER
PART NUMBER MARKING CODE (Per Marking Spec)
LOT CODE
(Eng Mode - Min last 4 digits of EATI#) (Prod Mode - 4 digits of SPN code)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
PQFN 3.3mm x 3.3mm Outline Tape and Reel REEL DIMENSIONS
TAPE DIMENSIONS
CODE Ao Bo Ko
DIMENSION (MM) MIN MAX 3.50 3.70 3.50 3.70 1.10 1.30
7.90 P1 11.80 W 12.30 W1 Qty Reel Diameter
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
DIMENSION (INCH) MIN MAX .138 .146 .138 .146 .043 .051
8.10 12.20 12.50
.311 .465 .484
.319 .480 .492
4000 13 Inches
CODE Ao Bo Ko W
P1
DESCRIPTION Dimension design to accommodate the component width Dimension design to accommodate the component lenght Dimension design to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9
2016-2-23
IRFHM8235PbF
Qualification Information† Qualification Level
Moisture Sensitivity Level RoHS Compliant
Consumer†† (per JEDEC JESD47F guidelines) PQFN 3.3mm x 3.3mm
MSL1 (per JEDEC J-STD-020D†††) Yes
† ††
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/ ††† Applicable version of JEDEC standard at the time of product release.
Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.21mH, RG = 50, IAS = 20A. Pulse width 400µs; duty cycle 2%. R is measured at TJ of approximately 90°C. When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material. Please refer to AN-994 for more details: http://www.irf.com/technical-info/appnotes/an-994.pdf Calculated continuous current based on maximum allowable junction temperature. Current is limited to 25A by source bonding technology. Pulse drain current is limited to 100A by source bonding technology.
10
2016-2-23
IRFHM8235PbF
Revision History Date
Comments
6/5/2014
Updated schematic on page 1 Updated part marking on page 8 Updated tape and reel on page 9
6/30/2014
Remove “SAWN” package outline on page 8.
2/23/2016
Updated datasheet with corporate template Updated package outline to reflect the PCN # (241-PCN30-Public) for “Option C” and “Option G” on page 8.
Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
11
2016-2-23
