Transcript
StrongIRFET™ IRL7472L1TRPbF DirectFET® N-Channel Power MOSFET
Application Brushed Motor drive applications BLDC Motor drive applications Battery powered circuits Half-bridge and full-bridge topologies Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters DC/AC Inverters Benefits Optimized for Logic Level Drive Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability Lead-Free, RoHS Compliant
VDSS
40V
RDS(on) typ.
0.34m
max @ VGS = 10V
0.59m
RDS(on) typ.
0.52m
max @ VGS = 4.5V
0.97m
ID (Silicon Limited)
564A
S S D
S G
S
S S S
D
S
DirectFET™ ISOMETRIC
L8
Standard Pack
Package Type
IRL7472L1PbF
Direct FET Large Can (L8)
Form
Quantity
Tape and Reel
4000
IRL7472L1TRPbF
ID = 195A
1.4
Limited by package
500
1.2 1.0 0.8
TJ = 125°C
0.6 0.4
400 300 200 100
0.2
TJ = 25°C 0
0.0 2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
Orderable Part Number
600
1.6
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m)
Base part number
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRL7472L1TRPbF
Absolute Maximum Ratings Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 25°C IDM PD @TC = 25°C PD @TA = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
VGS TJ TSTG
1500 341 3.8 0.025 ± 20 -55 to + 175
Thermal Resistance Symbol Parameter Junction-to-Ambient RJA Junction-to-Ambient RJA Junction-to-Ambient RJA Junction-to-Case RJC Junction-to-PCB Mounted RJA-PCB
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
RG
Notes: Mounted on minimum footprint full size board with metalized back and with small clip heatsink. Used double sided cooling , mounting pad with large heatsink.
Surface mounted on 1 in. square Cu board (still air).
2
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A W W/°C V °C
308 765
mJ
See Fig.15,16, 23a, 23b
A mJ
Typ. ––– 12.5 20 ––– 1.0
Max. 40 ––– ––– 0.44 –––
Units
°C/W
Min. Typ. Max. Units Conditions 40 ––– ––– V VGS = 0V, ID = 250µA ––– 30 ––– mV/°C Reference to 25°C, ID = 5.0mA ––– 0.34 0.59 VGS = 10V, ID = 195A m ––– 0.52 0.97 VGS = 4.5V, ID = 98A 1.0 1.7 2.5 V VDS = VGS, ID = 250µA ––– ––– 1.0 VDS = 40V, VGS = 0V µA ––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C ––– ––– 100 VGS = 20V nA ––– ––– -100 VGS = -20V ––– 1.0 ––– TC measured with thermocouple mounted to top (Drain) of part.
Mounted to a PCB with small clip heatsink (still air)
© 2015 International Rectifier
A
375
Gate Threshold Voltage
Units
59
Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy EAS (Thermally limited) Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy
VGS(th)
399
Pulsed Drain Current Maximum Power Dissipation Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Operating Junction and Storage Temperature Range
Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance
Max. 564
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRL7472L1TRPbF
Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Parameter gfs Forward Transconductance Qg Total Gate Charge Qgs Gate-to-Source Charge Qgd Gate-to-Drain ("Miller") Charge Qsync Total Gate Charge Sync. (Qg - Qgd) td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss eff. (ER) Effective Output Capacitance (Energy Related) Coss eff. (TR) Effective Output Capacitance (Time Related)
Diode Characteristics Symbol Parameter IS Continuous Source Current (Body Diode) ISM Pulsed Source Current (Body Diode) VSD Diode Forward Voltage dv/dt
Peak Diode Recovery
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
Min. 232 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Typ. ––– 220 95 87 133 68 176 174 137 20082 2436 1594 2855 3544
Max. Units Conditions ––– S VDS = 10V, ID = 195A 330 ID = 195A ––– VDS = 20V nC ––– VGS = 4.5V ––– ID = 195A, VDS =0V, VGS = 4.5V ––– VDD = 20V ––– ID = 30A ns ––– RG = 2.7 ––– VGS = 4.5V ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 10kHz ––– VGS = 0V, VDS = 0V to 32V ––– VGS = 0V, VDS = 0V to 32V
Min. Typ. Max. Units Conditions MOSFET symbol ––– ––– 341 showing the A integral reverse ––– ––– 1500 p-n junction diode. ––– ––– 1.2 V TJ= 25°C, IS =195A, VGS = 0V D
G
S
–––
1.3
–––
––– ––– ––– ––– –––
57 58 103 114 3.1
––– ––– ––– ––– –––
TJ =175°C, IS =195A, VDS = 40V TJ = 25° C VR = 34V, ns TJ = 125°C IF = 195A TJ = 25°C di/dt = 100A/µs nC TJ = 125°C A TJ = 25°C
V/ns
Notes: Package limit current based on source connection technology Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.016mH, RG = 50, IAS = 195A, VGS =10V. ISD ≤ 195A, di/dt ≤ 984A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. R is measured at TJ approximately 90°C. Limited by TJmax, starting TJ = 25°C, L = 1.0mH, RG = 50, IAS = 39A, VGS =10V. Silicon limit current based on maximum allowable junction temperature TJmax.
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IRL7472L1TRPbF
10000
10000
1000 BOTTOM
VGS 15V 10V 6.0V 5.0V 4.5V 4.0V 3.5V 3.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS 15V 10V 6.0V 5.0V 4.5V 4.0V 3.5V 3.0V
100 3.0V
10
1000 BOTTOM
100
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
1 0.01
0.1
1
10
0.01
100
Fig 3. Typical Output Characteristics
10
100
2.0 RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current(A)
1
Fig 4. Typical Output Characteristics
10000
1000 TJ = 175°C
TJ = 25°C
100
10 VDS = 10V
60µs PULSE WIDTH 1.0
ID = 195A
VGS = 10V
1.7
1.4
1.1
0.8
0.5 1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-60 -40 -20 0 20 40 60 80 100120140160180 TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics 100000
VGS, Gate-to-Source Voltage (V)
Ciss
10000 Coss Crss
1000 1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com
Fig 6. Normalized On-Resistance vs. Temperature 14
VGS = 0V, f = 10 KHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
C, Capacitance (pF)
0.1
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
4
3.0V
© 2015 International Rectifier
ID= 195A
12
VDS = 32V VDS = 20V
10 8 6 4 2 0 0
60 120 180 240 300 360 420 480 540 600 QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage Submit Datasheet Feedback
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IRL7472L1TRPbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
1000
TJ = 175°C
100
TJ = 25°C
10
1000
100µsec
100
10 10msec 1
Tc = 25°C Tj = 175°C Single Pulse
VGS = 0V
1.0 0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.1
1
VSD , Source-to-Drain Voltage (V)
10
VDS , Drain-to-Source Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
DC
0.1 0.2
2.0
50 49
1msec
Limited by Package
Id = 5.0mA
1.8 1.6
48
1.4 Energy (µJ)
47 46 45 44
1.2 1.0 0.8 0.6
43
0.4
42
0.2 0.0
41 -60
-20
20
60
100
140
-5
180
TJ , Temperature ( °C )
0
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
R DS (on), Drain-to -Source On Resistance (m)
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
1.8 Vgs = 3.5V Vgs = 4.0V Vgs = 4.5V Vgs = 5.5V Vgs = 6.0V Vgs = 8.0V Vgs = 10V
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0
20 40 60 80 100 120 140 160 180 200 ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current 5
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IRL7472L1TRPbF
Thermal Response ( Z thJC ) °C/W
1 D = 0.50 0.1
0.20 0.10 0.05 0.02 0.01
0.01
SINGLE PULSE ( THERMAL RESPONSE )
0.001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 125°C and Tstart =25°C (Single Pulse)
100
10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 125°C. 1 1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width 350
TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 195A
EAR , Avalanche Energy (mJ)
300 250 200 150 100 50 0 25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature 6
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Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
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IRL7472L1TRPbF
20
IF = 117A VR = 34V
18 2.0
16
TJ = 25°C TJ = 125°C
14 1.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
2.5
ID = 250µA
1.0
ID = 1.0mA ID = 1.0A
12 10 8 6
0.5
4 2
0.0
100
-60 -40 -20 0 20 40 60 80 100120140160180
200
300
400
500
600
diF /dt (A/µs)
TJ , Temperature ( °C )
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
20 18 16
IF = 117A VR = 34V
900
TJ = 25°C TJ = 125°C
800
TJ = 25°C TJ = 125°C
700
12
QRR (nC)
IRRM (A)
14
1000
IF = 195A VR = 34V
10 8
600 500 400
6
300
4
200
2 100
200
300
400
500
100
600
100
diF /dt (A/µs)
200
300
400
500
600
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt 1000 900 800
QRR (nC)
700
IF = 195A VR = 34V TJ = 25°C TJ = 125°C
600 500 400 300 200 100 100
200
300
400
500
600
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt 7
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IRL7472L1TRPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS tp
15V
DRIVER
L
VDS
D.U.T
RG
+ V - DD
IAS 20V
tp
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms Id Vds Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRL7472L1TRPbF
DirectFET® Board Footprint, L8 Outline (Large Size Can, 8-Source Pads)
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
G = GATE D = DRAIN S = SOURCE
D
D
D
S
S
S
S
D
D
G S
S
S
S
D
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRL7472L1TRPbF
DirectFET® Outline Dimension, L8 Outline (Large Size Can, 8-Source Pads)
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS METRIC CODE MIN MAX A 9.05 9.15 6.85 7.10 B C 5.90 6.00 0.55 0.65 D E 0.58 0.62 F 1.18 1.22 0.98 1.02 G 0.73 0.77 H J 0.38 0.42 1.335 1.465 K L 2.535 2.665 5.335 5.465 L1 M 0.68 0.74 P 0.09 0.17 0.02 0.08 R
IMPERIAL MIN MAX 0.356 0.360 0.270 0.280 0.232 0.236 0.022 0.026 0.023 0.024 0.046 0.048 0.039 0.040 0.029 0.030 0.015 0.017 0.053 0.058 0.100 0.105 0.210 0.215 0.027 0.029 0.003 0.007 0.001 0.003
Dimensions are shown in millimeters (inches)
DirectFET® Part Marking
GATE MARKING
+
LOGO PART NUMBER BATCH NUMBER DATE CODE Line above the last character of the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRL7472L1TRPbF
DirectFET® Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
+
NOTE: Controlling dimensions in mm Std reel quantity is 4000 parts. Order as IRF7472L1TRPBF). REEL DIMENSIONS STANDARD OPTION (QTY 4000) IMPERIAL METRIC MIN CODE MAX MIN MAX 12.992 A N.C 330.00 N.C 0.795 B 20.20 N.C N.C 0.504 C 12.80 0.520 13.20 0.059 D 1.50 N.C N.C 3.900 E 99.00 100.00 3.940 F N.C N.C 0.880 22.40 G 0.650 16.40 0.720 18.40 H 0.630 15.90 0.760 19.40
NOTE: CONTROLLING DIMENSIONS IN MM
CODE A B C D E F G H
DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 4.69 0.476 11.90 12.10 0.154 0.161 3.90 4.10 0.623 0.642 15.90 16.30 0.291 0.299 7.40 7.60 0.283 0.291 7.20 7.40 0.390 0.398 9.90 10.10 0.059 N.C 1.50 N.C 0.059 0.063 1.50 1.60
Note: For the most current drawing please refer to IR webite at http://www.irf.com/package/ Qualification Information† Industrial * Qualification Level
(per JEDEC JESD47F†† guidelines)
Moisture Sensitivity Level
DFET (L-CAN)
MSL1 (per JEDEC J-STD-020D††) Yes
RoHS Compliant
† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability †† Applicable version of JEDEC standard at the time of product release. * Industrial qualification standards except autoclave test conditions.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 11
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