Transcript
AMMC-2008 Switching Application and Characteristics
Application Note 5228
Switch Operation Referring to the schematic diagram in Figure 1, the series connected FETs from the RF input to each RF output perform the basic SPDT switching function. The shuntconnected pair of FETs on each output leg of the switch serve to increase isolation when that leg is in the OFF state. The FETs are controlled by gate biasing through the voltage selection terminals, Vsel 1 and Vsel 2.
Referring to Figure 4, the RF Iinput and output ports may be DC- or AC-coupled, depending on the level of external voltages applied to the RF terminals. If DC-coupled, any external voltages applied to the RF ports (includes DC plus RF voltage) must be within 0 ± 0.25 volts for guaranteed switch performance, in which case the RF blocking capacitors, Cblock, are optional.
The AMMC-2008 die layout in Figure 2 shows the relationship between the Vsel connections and the RF I/O terminals.
The bypass capacitors, Cbypass, shown on Vsel 1 and Vsel 1 are also optional. These capacitors are not needed to bypass RF leakage coming from the switch. However bypass capacitors may be added if filtering of the control voltages is desired, such as in the case of potential RF modulation caused by excessive noise on the control voltages. Note that adding bypass capacitors will slow the switching speed. (See below)
The state of the AMMC-2008 is controlled by applying complementary, negative control voltages to the Vsel 1 and Vsel 2 terminals per the logic table in Figure 3. The control voltages are logic level compatible.
An equivalent circuit of the impedance presented by the Vsel terminals is shown in Figure 5. RF Input
GND RF Output 2
RF Output 1
RF In
GND
GND
GND
RF Out 1
RF Out 2
GND
Vsel 2
Vsel 1
Figure 1. Schematic Diagram of the AMMC-2008.
GND
Vsel 2
Vsel 1
Figure 2. AMMC-2008 Die Electrical Connections.
Measurement of Switching Speeds Rise time, fall time, and delay time for the AMMC-2008 were measured using the test setup shown in Figure 6. For this test, an AMMC-2008 die was mounted on a demonstration circuit with SMA connectors. SMA connectors were also used for the Vsel input connections. The switched RF output waveform from the AMMC-2008 was observed directly with a HP 54120A Digitizing Oscilloscope Mainframe with a 54121A Four Channel Test Set, which has a bandwidth of 20 GHz and 50 W inputs. The RF input to the AMMC-2008 was provided by a HP 8350B Sweep Oscillator with 83595A RF Plug-in set to a frequency of 2 GHz.
Control Voltage
Vsel2
RF Out1
RF Out2
High
Low
ON
OFF
Low
High
OFF
ON
Low
Low
X
X
High
High
X
X
Figure 3. Logic Table for Switch State. Notes: 1. -3.5 V ≤ Logic Low ≤ -2.5-V, -0.4 V ≤ Logic High ≤ +0.6 V 2. “ON” ≡ low loss state, “OFF” ≡ high isolation state, “X” ≡ indeterminate state in which the switch is partially OFF
Figure 4. Basic Switch Implementation.
This particular pulse generator provides two pulse outputs, however both are in phase while the AMMC-2008 requires complementary switching signals to be applied to Vsel 1 and Vsel 2. Figure 5. Equivalent Circuit of Vsel.
Figure 6. Test Setup for Switching Time Measurement.
2
[2]
Vsel1
While the AMMC-2008 is capable of operating up to 50 GHz, 2 GHz was selected for the input frequency to allow reasonable signal fidelity when observed on the 20 GHz oscilloscope. All three RF ports of the switch were padded with 3-dB attenuators to minimize mismatch reflections. A Colby Instruments model PG 5000A pulse generator (actually pulse sharpener) was used for the Vsel control voltages. The signal source for the pulse generator was supplied by a HP 8640B Signal Generator set to a frequency of 100 MHz, thus the output of the pulse generator was a square wave with period of 10 ns.
Switch State
[1]
The two, in-phase output pulses are shown in Figure 7 where the 10-90% rise time is seen to be on the order of 150 ps. Complimentary control voltages were created by adding a time delay equal to one-half of the pulse period to one of the pulse generator outputs. This was accomplished by adding 90 cm of additional coaxial cable length between the pulse generator output and the Vsel 2 input. The frequency of the 8640B signal generator was then adjusted from the initial 100 MHz to 98.97 to fine-tune the period of the pulse in order to make the pulses exactly complementary. The resulting complementary control voltages are shown in Figure 8.
Figure 7. In-Phase Outputs of Pulse Generator.
Figure 8. Complementary Vsel Control Voltages.
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Also from Figure 8, the pulse amplitude was measured to be slightly greater than 2 V, which is the maximum available from the pulse generator. Although the AMMC-2008 is specified for a minimum Vsel range of 2.5 V, 2 V was adequate to switch the device for switching speed measurements. The “Vsel Pick Off” in Figure 6 consists of a resistive voltage divider constructed with an 825 W series and a 51 W shunt chip resistor placed at the Vsel 2 connector. This allows the control voltage to be monitored on the digital oscilloscope, which has a 50 W input, without unduly loading Vsel.
Measured Switching Speeds Figure 9 is an oscilloscope display of the 2 GHz RF output signal from the AMMC-2008, during the switch turn-on transition. The 10-90% rise time for the envelope of the 2 GHz signal is 100 ps. A 90-10% fall time of 90 ps was measured for switch turnoff and is shown in the oscilloscope display of Figure 10. Note that the measured rise and fall times for the AMMC2008 are somewhat faster than the Vsel input control
Figure 9. Rise Time of the AMMC-2008 at 100 ps/div.
Figure 10. Fall Time of the AMMC-2008 at 100 ps/div.
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pulses. This apparent speed up occurs because the switch changes state over a smaller voltage range than supplied by the full amplitude of the control pulse. While the switch will function with Vsel as low as -1 V, performance is not guaranteed. The rise and fall time measurements also indicate the AMMC-2008 transition times are measurement limited by the speed of the pulse generator.
Figure 11 shows the delay time between application of Vsel and switch turn-on. (The turn-off characteristic is similar.) Delay time from the 50% point on the Vsel input to the 90% point on the RF envelope is 470 ps.
Effect of Vsel Bypass Capacitors As previously noted, it is not necessary to RF bypass the Vsel connections. However, if bypassing is used to prevent noise on the control lines from modulating the RF signal passing through the switch, switching speed will be considerably slower due to the added R-C time constant. As an example, adding 100 pF bypass capacitors to both Vsel 1 and Vsel 2 reduces rise and fall times from 100 ps to 1.2 ns.
Figure 11. Delay Time of the AMMC-2008 at 200 ps/div.
Figure 12. Video Feedthrough Effect, 1 ns/div.
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Video Feedthrough Distortion of a switched RF signal often occurs when the bandwidth of the RF switch extends low enough to overlap the equivalent frequency response of a high-speed control signal. When this takes place, high frequency components of the control pulse can be superposed on the RF signal. This effect is historically referred to as “video feedthrough.” When used for high speed switching applications, video feed through can easily occur with the AMMC-2008, since its RF bandwidth extends to DC. This effect is easily seen by observing the switched RF waveform with a slower time base as in Figure 12, in which the oscilloscope was set to 1 ns/div. The apparent overshoot of the RF envelope at turn-on and undershoot at turn-off is caused by a portion of the highspeed Vsel control pulse being impressed on the RF signal.
To confirm video feedthrough, the RF input to the AMMC-2008 switch was turned off. The resulting waveform shown in Figure 13 clearly shows switching transients feeding through from the control pulse to the RF output port of the switch. Two solutions to video feed through are: (a) use the slowest control pulse compatible with the switch application, and/ or (b) add a high-pass filter to the output of the switch to filter out the low frequency switching transients created by the control pulse.
Figure 13. Video Feedthrough, 1 ns/div (no RF signal applied).
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes 5989-3044EN AV02-1292EN - August 30, 2010