Transcript
DATA SHEET
BUS DOCTOR PCI EXPRESS GEN 2 PROTOCOL ANALYZER Protocol, Timing, and Statistical Analysis for Consumer Electronics and Computing Design and Test
HIGHLIGHTS Powerful 12-level trigger sequencer with support for counters and timers Supports PCI Express Gen 1 (2.5 Gb/s) and 2 (5.0 Gb/s) Extensive display capabilities for PCI Express including command, state, histogram and statistics views Supports PCI Express bus widths x1, x4 and x8
BENEFITS Patented hardware search logic makes it possible to find a PCI Express event in seconds in trace memory buffers as large as 18.4 GBs Completely non-intrusive and passive inline capture and analysis; 100% data capture at up to 5 Gb/s across all supported bus lane widths Perform PCI Express logic and protocol analysis simultaneously — two critical functions required during design One interface for all Bus Doctor types— learn a single GUI to test all bus types supported by Finisar Bus Doctor Analyzers, including CE-ATA, ATA, SCSI, SATA, Firewire (IEEE1394), Cardbus, Compact Flash, PCMCIA, PCI/X, and USB. 14 in all The Bus Doctor RX may be combined with other RX Analyzers to perform multianalysis on several buses simultaneously, ensuring interoperability between multiple bus types
PCI-Express (PCIe) is the evolutionary replacement for the venerated PCI and PCI-X interconnection standard. Today nearly all PC and server hardware utilizing an x86 architecture has incorporated a PCIe bus, making it a universal computing standard. According to In-Stat, PCIe will be used in over 440 million devices by 2010, with 37.2 million of these in communications applications. PCIe overcomes the inherent limitations of PCI by allowing for serial interconnections, higher throughput, and more efficient management of multiple peripherals with support for line signaling rates up to 5.0 Gb/s. PCIe is the key technology for removing system bus bottlenecks and improving overall performance in computing and storage applications. For these applications, PCIe provides a significant improvement in bandwidth for moving data among devices such as Host Board Adapters (HBAs), server and storage arrays, and Network Interface Cards (NICs). The Bus Doctor® Gen 2 PCI Express (PCIe) protocol analyzer enables computing, storage, silicon, and design engineers working with PCIe technology to capture, decode, and analyze PCIe bus states, command frames, and responses, and to measure bus performance. The Bus Doctor’s interface is intuitive and employs the Bus Doctor’s legendary easy-to-use GUI software, making it the ideal analyzer for anyone developing PCIe products.
BUS DOCTOR PCI EXPRESS GEN 2 PROTOCOL ANALYZER
Figure 1: Bus Doctor PCIe Analyzer Software
BUS DOCTOR RX The Bus Doctor Gen 2 PCIe protocol analyzer from Finisar is a new and powerful modular tool with advanced features, such as trace buffers as large as 18.4 GBs (twice the size of competing solutions) and 4-nanosecond capture resolution. The analyzer is able to analyze not only PCIe technology but also other consumer electronics and computing protocols such as SD/SDIO, SATA, SCSI and USB. The analyzer supports filtering, triggering, capturing and analysis of all PCIe events including primitives, training sequences, power management functions and TLP and DLLP frames. It is an appliance which is controlled by a Microsoft
Windows™ PC through a USB connection. There is no need to set up DHCP or IP addressing. Just connect the analyzer to the PC and you are ready to begin. Finisar’s powerful but intuitive and easy-to-use Bus Doctor Graphical User Interface (GUI) CE 5.0 software runs on the PC. The interface allows engineers to configure the tool and to view and analyze captured PCIe information. High-level dialogs enable the quick creation of powerful PCIe triggers and pre- and post-capture filters. These filters empower engineers to capture and analyze only those events and sequences of interest. As an example, an engineer can filter on a DLP frame in the upstream link.
The powerful trigger sequencer has 12 levels, including 2 timer and 2 counter levels. Pre-defined triggers permit users to quickly set up very complex sequences with a few mouse clicks. When an event executes a trigger, the analyzer stops its capture and marks the specific event in the Bus Doctor display. A trigger is invaluable to make sure a specific event is captured in the current trace. The analyzer can be configured to stop on an error, a protocol violation, a hang condition, etc. The Bus Doctor comes with several easy to use, pre-programmed triggers. Once data is captured, the software simplifies analysis by organizing and grouping the captured bus data into different displays. High-level command sequences are summarized in the Command Listing display. The State Listing displays a chronological list of all captured PCIe events in greater detail than what is shown in the Command Listing. PCIe primitives and frames are completely decoded in this view, allowing you to peer deep into the interactions that are taking place on the PCIe bus. The histogram’s primary purpose is a navigation aid, showing an overall map view of the entire trace. Commands, data, and errors are shown in blue, green, and red, respectively. A User Term can be defined and is shown in purple. A tree view organizes PCIe packets or frames by commands and responses. Each command in the tree view can be expanded to show command responses, status, data, and other information. For multi-lane bus types like PCIe, the Bus Doctor is capable of simultaneous multiple-lane capture analysis with source-port identification. There is a lane view for each byte value captured in sequence, from both the host and the device side.
The Bus Doctor PCIe protocol analyzer supports the latest PCIe specifications (version 2.0). It supports bi-directional capture, decode, and analysis of all PCIe primitives, DLLP, and TLPs at 2.5 Gb/s and 5.0 Gb/s line signaling speeds. In addition to supporting bus widths x1, x4 and x8, the analyzer also support SSC (Spread Spectrum Clocking). The Bus Doctor Gen 2 PCIe analyzer is available in a number of configurations to meet every design need and budget. There are options for x1, x4 and x8 solutions as well as options for Gen 1 only and Gen 1/2 solutions. There are plans for future support of Expresscard, x16, midbus, and lead probing. Please contact your Finisar sales representative for more information.
BUS DOCTOR PCI EXPRESS GEN 2 PROTOCOL ANALYZER
TECHNICAL SPECIFICATIONS Enclosure Width: Length: Height: Weight:
PROTOCOL SUPPORT 10.25” (26.0 cm) 10.0” (25.4 cm) 5.25” (13.3 cm) 3.0 lbs (1.36 kg)
Indicators ID Lights when power on VFD Vacuum fluorescent display shows configuration information, DLLP/TLP packet transmission and errors (counter); this display is user-configurable Connectors 2 SMB Trigger Outs 3 SMB Trigger Ins 2 Connectors to Taps
PCI Express specifications 1.0, 1.0a, 1.1 and 2.0 Supports 2.5 Gb/s and 5.0 Gb/s data rates Supports bus width x1, x4 and x8 Supports SSC, Power management features, Training sequences
MINIMUM SYSTEM REQUIREMENTS Windows XP Professional or Windows 2000 Professional operating system Intel® Pentium® 4, 1.7 GHz; Minimum of 512 MB system RAM; 400 MB of hard drive space for program files; 1024 x 768 graphics; USB 2.0
Power: 96-132V and 185-264V with an auto-range of 4763Hz. Auto-switching Hardware Upgrade Firmware on pod is updated automatically by Bus Doctor application
1389 Moffett Park Drive Sunnyvale, CA 94089 Phone (US Toll Free): 888.746.6484 Phone Intl: 408.400.1000 Email:
[email protected] www.finisar.com
©2007 Finisar Corporation. All rights reserved. Finisar is a registered trademark of Finisar Corporation. All other company and product names may be trademarks or registered trademarks of their respective companies. Features and specifications are subject to change without notice. 04/07
