Lm833 Dual High-speed Audio Operational Amplifier (rev. A)

Transcript

LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 DUAL HIGH-SPEED AUDIO OPERATIONAL AMPLIFIER Check for Samples: LM833 FEATURES APPLICATIONS • • • • • • • • • • • • • • • 1 Dual-Supply Operation: ±5 V to ±18 V Low Noise Voltage: 4.5 nV/√Hz Low Input Offset Voltage: 0.15 mV Low Total Harmonic Distortion: 0.002% High Slew Rate: 7 V/ms High-Gain Bandwidth Product: 16 MHz High Open-Loop AC Gain: 800 at 20 kHz Large Output-Voltage Swing: 14.1 V to –14.6 V Excellent Gain and Phase Margins Available in 8-Pin MSOP Package (3mm x 4.9mm x 0.65mm) HiFi Audio System Equipment Preamplification and Filtering Set Top Box Microphone PreAmplifier Circuit General-Purpose Amplifier Applications D (SOIC), DGK (MSOP), OR P (PDIP) PACKAGE (TOP VIEW) OUT1 1 8 VCC+ IN1– 2 7 OUT2 IN1+ 3 6 IN2– VCC– 4 5 IN2+ DESCRIPTION The LM833 is a dual operational amplifier with high-performance specifications for use in quality audio and data-signal applications. This device operates over a wide range of single- and dual-supply voltage with low noise, high-gain bandwidth, and high slew rate. Additional features include low total harmonic distortion, excellent phase and gain margins, large output voltage swing with no deadband crossover distortions, and symmetrical sink/source performance. The dual amplifiers are utilized widely in circuit of audio optimized for all preamp and high level stages in PCM and HiFi systems. LM833 is pin-for-pin compatible with industry-standard dual operation amplifiers' pin assignments. With addition of a preamplifier, the gain of the power stage can be greatly reduced to improve performance. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010, Texas Instruments Incorporated LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com ORDERING INFORMATION (1) PACKAGE (2) TA PDIP – P –40°C to 85°C SOIC – D VSSOP/MSOP – DGK (1) (2) (3) ORDERABLE PART NUMBER Tube of 50 LM833P Tube of 75 LM833D Reel of 2500 LM833DR Reel of 2500 LM833DGKR Reel of 250 LM833DGKT TOP-SIDE MARKING (3) LM833P LM833 RS_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DGK: The actual top-side marking has one additional character that designates the wafer fab/assembly site. Symbol (Each Amplifier) IN+ + IN − − OUT Typical Design Example Audio Pre-Amplifier 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC+ Supply voltage (2) 18 V VCC– Supply voltage (2) –18 V VCC+ – VCC– Supply voltage 36 V Input voltage, either input (2) (3) VCC+ or VCC– Input current (4) ±10 Duration of output short circuit (5) Unlimited D package qJA Package thermal impedance, junction to free air (6) TJ Operating virtual junction temperature Tstg Storage temperature range (7) 97 DGK package 172 P package (1) (2) (3) (4) (5) (6) (7) V mA °C/W 85 –65 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. The magnitude of the input voltage must never exceed the magnitude of the supply voltage. Excessive input current will flow if a differential input voltage in excess of approximately 0.6 V is applied between the inputs, unless some limiting resistance is used. The output may be shorted to ground or either power supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. ELECTROSTATIC DISCHARGE RATINGS MIN ESD MAX Human-Body Model (HBM) 2.5 Charged-Device Model (CDM) 1.5 UNIT kV RECOMMENDED OPERATING CONDITIONS VCC– VCC+ TA Supply voltage Operating free-air temperature range MIN MAX –5 –18 5 18 –40 85 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 UNIT V °C 3 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com ELECTRICAL CHARACTERISTICS VCC– = –15 V, VCC+ = 15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS VIO Input offset voltage VO = 0, RS = 10 Ω, VCM = 0 aVIO Input offset voltage temperature coefficient VO = 0, RS = 10 Ω, VCM = 0 IIB Input bias current VO = 0, VCM = 0 IIO Input offset current VO = 0, VCM = 0 VICR Common-mode input voltage range ΔVIO = 5 mV, VO = 0 AVD Large-signal differential voltage amplification RL ≥ 2 kΩ, VO = ±10 V Maximum output voltage swing VID = ±1 V kSVR (1) 2 3 TA = –40°C to 85°C 2 300 25 TA = –40°C to 85°C RL = 2k Ω 750 150 175 ±13 ±14 TA = 25°C 90 110 TA = –40°C to 85°C 85 VOM+ 10.7 VOM– –11.9 VOM+ 13.2 13.8 VOM– –13.2 –13.7 VOM+ 13.5 14.1 VOM– –14 –14.6 UNIT mV mV/°C 800 TA = 25°C nA nA V dB V Common-mode rejection ratio VIN = ±13 V 80 100 dB Supply-voltage rejection ratio VCC+ = 5 V to 15 V, VCC– = –5 V to –15 V 80 105 dB 15 29 –20 –37 IOS Output short-circuit current |VID| = 1 V, Output to GND ICC Supply current (per channel) VO = 0 (1) MAX 0.15 TA = –40°C to 85°C RL = 10k Ω CMMR TYP TA = –40°C to 85°C TA = 25°C RL = 600 Ω VOM MIN TA = 25°C Source current Sink current TA = 25°C 2.05 TA = –40°C to 85°C mA 2.5 2.75 mA Measured with VCC± differentially varied at the same time OPERATING CHARACTERISTICS VCC– = –15 V, VCC+ = 15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS SR Slew rate at unity gain AVD = 1, VIN = –10 V to 10 V, RL = 2 kΩ, CL = 100 pF GBW Gain bandwidth product f = 100 kHz B1 Unity gain frequency Open loop Gm Gain margin RL = 2 kΩ Φm Phase margin RL = 2 kΩ Amp-to-amp isolation f = 20 Hz to 20 kHz Power bandwidth VO = 27 V(PP), RL = 2 kΩ, THD ≤ 1% THD Total harmonic distortion VO = 3 Vrms, AVD = 1, RL = 2 kΩ, f = 20 Hz to 20 kHz zo Open-loop output impedance VO = 0, f = 9 MHz rid Differential input resistance Cid CL = 0 pF MIN TYP 5 7 V/ms 10 16 MHz 9 MHz –11 CL = 100 pF –6 CL = 0 pF 55 CL = 100 pF 40 MAX UNIT dB deg –120 dB 120 kHz 0.002 % 37 Ω VCM = 0 175 kΩ Differential input capacitance VCM = 0 12 pF Vn Equivalent input noise voltage f = 1 kHz, RS = 100 Ω 4.5 nV/√Hz In Equivalent input noise current f = 1 kHz 0.5 pA/√Hz 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 0.1 µF 10 Ω 100 kΩ 2.0 kΩ 4.3 kΩ + D.U.T. 1/2 LM833 Scope x1 RIN = 1.0 MΩ − 4.7 µF 22 µF 100 kΩ Voltage Gain = 50,000 2.2 µF 24.3 kΩ 110 kΩ 0.1 µF NOTE: All capacitors are non-polarized. Figure 1. Voltage Noise Test Circuit (0.1 Hz to 10 Hz) Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 5 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs SUPPLY VOLTAGE 600 600 VCM = 0 V VCC– = –15 V TA = 25°C 500 TA = 25°C IIB – Input Bias Current – nA IIB – Input Bias Current – nA 500 VCC+ = 15 V 400 300 200 100 400 300 200 100 0 0 -15 5 -10 -5 0 5 10 15 6 7 8 9 10 11 12 13 14 15 16 17 18 VCC+/–VCC– – Supply Voltage – V VCM – Common Mode Voltage – V INPUT BIAS CURRENT vs TEMPERATURE INPUT OFFSET VOLTAGE vs TEMPERATURE 1000 2 900 VCC– = –15 V 800 VCM = 0 V VCC+ = 15 V 1.5 VIO – Input Offset Voltage – mV IIB – Input Bias Current – nA VCC+ = 15 V 700 600 500 400 300 200 VCM = 0 V 1 0.5 0 -0.5 -1 -1.5 100 0 -55 -35 -15 5 25 45 65 85 105 125 -2 -55 -35 -15 TA – Temperature – °C 6 VCC– = –15 V 5 25 45 65 85 105 125 TA – Temperature – °C Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) INPUT COMMON-MODE VOLTAGE LOW PROXIMITY TO VCC– vs TEMPERATURE INPUT COMMON-MODE VOLTAGE HIGH PROXIMITY TO VCC+ vs TEMPERATURE 1.4 0 1.2 Input Common-Mode Voltage High Proximity to V CC+ – V Input Common-Mode Voltage Low Proximity to V CC– – V VCC+ = 3 V to 15 V 1 0.8 0.6 VCC+ = 3 V to 15 V 0.4 VCC– = -3 V to -15 V D è VIO = 5 mV 0.2 VO = 0 V 0 -55 -25 5 35 65 95 -0.2 VCC– = -3 V to -15 V D VIO = 5 mV -0.4 VO = 0 V -0.6 -0.8 -1 -1.2 -1.4 -55 125 -25 TA – Temperature – °C 35 65 95 125 TA – Temperature – °C OUTPUT SATURATION VOLTAGE PROXIMITY TO VCC+ vs LOAD RESISTANCE OUTPUT SATURATION VOLTAGE PROXIMITY TO VCC– vs LOAD RESISTANCE 10 0 9 -1 TA = 125°C -2 8 TA = 25°C -3 Output Saturation Voltage Proximity to V CC– – V Output Saturation Voltage Proximity to V CC+ – V 5 TA = –55°C -4 -5 -6 -7 -8 -9 7 6 5 TA = 125°C 4 TA = 25°C 3 TA = –55°C 2 1 -10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0 kW RL – Load Resistance – kh 0.5 1 1.5 2 2.5 3 3.5 4 4.5 kW RL – Load Resistance – k@ Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 7 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) OUTPUT SHORT-CIRCUIT CURRENT vs TEMPERATURE SUPPLY CURRENT vs TEMPERATURE 70 10 60 VCC– = –15 V 9 VID = 1 V 8 50 40 Source Sink 30 20 ICC – Supply Current – mA IOS – Output Short-Circuit Current – mA VCC+ = 15 V VCM = 0 V RL = High Impedance VO = 0 V 7 6 4 3 VCC± = ±10 V VCC± = ±5 V 2 1 10 -55 -35 -15 5 25 45 65 85 0 -55 105 125 TA – Temperature – °C 100 80 70 -15 5 25 45 65 85 105 125 PSSR vs FREQUENCY 120 VCC+ = 15 V VCC– = –15 V VCM = 0 V DVCM = ±1.5 V TA = 25°C 90 -35 TA – Temperature – °C CMRR vs FREQUENCY VCC+ = 15 V VCC– = –15 V TA = 25°C 110 100 90 80 60 PSRR – dB CMMR – dB VCC± = ±15 V 5 50 40 70 T3P 60 50 T3N 40 30 30 20 8 20 10 10 0 100 10k 100k 1.0E+06 10M 1k 1M 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+07 0 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+07 100 10k 100k 1.0E+06 10M 1k 1M f – Frequency – Hz f – Frequency – Hz Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE GAIN BANDWIDTH PRODUCT vs TEMPERATURE 30 GBW – Gain Bandwidth Product – MHz GBW – Gaind Bandwidth Product – MHz 30 25 20 15 10 5 6 7 8 20 15 10 5 0 -55 0 5 25 9 10 11 12 13 14 15 16 17 18 -35 -15 5 25 45 65 OUTPUT VOLTAGE vs SUPPLY VOLTAGE 30 VCC+ = 15 V VCC– = –15 V RL = 2 kW AV = 1 THD < 1% TA = 25°C 15 25 10 VO – Output Voltage – V VO – Output Voltage – V RL = 10 kW RL = 2 kW 5 0 -5 RL = 10 kW -10 RL = 2 kW -20 8 20 15 10 5 -15 7 125 OUTPUT VOLTAGE vs FREQUENCY 20 6 105 TA – Temperature – °C VCC+/–VCC– – Supply Voltage – V 5 85 9 10 11 12 13 14 15 16 17 18 0 100 10 10k 100k 1.E+06 10M 1k 1M 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+07 VCC+/–VCC– – Supply Voltage – V f – Frequency – Hz Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 9 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) OPEN-LOOP GAIN vs SUPPLY VOLTAGE OPEN-LOOP GAIN vs TEMPERATURE 120 110 RL = 2 kW f < 10 Hz DVO = 2/3(VCC+ – VCC–) TA = 25°C 115 AV – Open-Loop Gain – dB AV – Open-Loop Gain – dB 105 100 95 90 RL = 2 kW f < 10 Hz DVO = 2/3(VCC+ – VCC–) TA = 25°C 85 6 7 8 105 100 95 90 85 80 5 110 80 -55 9 10 11 12 13 14 15 16 17 18 VCC+/–VCC– – Supply Voltage – V 200 40 35 190 180 TA = 25°C Crosstalk Rejection – dB ZO – Output Impedance – W VCC+ = 15 V VCC– = –15 V 30 25 20 15 AV = 1000 10 45 65 85 105 125 170 Drive Channel VCC+ = 15 V VCC– = –15 V RL = 2 kW VO = 20 VPP TA = 25°C 160 150 140 130 120 AV = 100 AV = 10 AV = 1 110 5 0 1.0E+03 1k 25 CROSSTALK REJECTION vs FREQUENCY 50 VO = 1 Vrms 5 TA – Temperature – °C OUTPUT IMPEDANCE vs FREQUENCY 45 -35 -15 100 1.E+01 10 1.0E+04 10k 1.0E+05 100k 1.0E+06 1M 1.0E+07 10M 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k f – Frequency – Hz f – Frequency – Hz 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) TOTAL HARMONIC DISTORTION vs FREQUENCY TOTAL HARMONIC DISTORTION vs OUTPUT VOLTAGE 0.1 1 VCC+ = 15 V VCC– = –15 V VO = 1 Vrms AV = 1 RL = 2 kW TA = 25°C THD – Total Harmonic Distortion – % THD – Total Harmonic Distortion – % 1 0.01 0.001 0.0001 10 1.E+01 AV = 1000 0.1 AV = 100 0.01 AV = 10 0.001 VCC+ = 15 V VCC– = –15 V f = 2 kHz RL = 2 kW TA = 25°C AV = 1 0.0001 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 0 1 2 f – Frequency – Hz 5 6 7 8 9 105 125 SLEW RATE vs TEMPERATURE 10 10 9 9 Falling Edge 8 7 Rising Edge 6 5 4 DV = 2/3(V – V ) IN CC+ CC– AV = 1 3 RL = 2 kW TA = 25°C 2 5 6 7 8 9 10 11 12 13 14 15 16 17 18 SR – Slew Rate – V/µs SR – Slew Rate – V/µs 4 VO – Output Voltage – Vrms SLEW RATE vs SUPPLY VOLTAGE 8 3 Falling Edge 7 Rising Edge 6 5 4 3 2 -55 VCC+/–VCC– – Supply Voltage – V VCC+ = 15 V VCC– = –15 V DVIN = 20 V AV = 1 RL = 2 kW -35 -15 5 25 45 65 85 TA – Temperature – °C Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 11 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) GAIN AND PHASE vs FREQUENCY 12 70 Gain, TA = 25°C -90 40 30 20 10 1.E+04 10k 20 Gain, TA = –55°C 40 Phase, TA = 125°C 50 70 Phase, TA = –55°C 1.E+05 100k 1.E+06 1M 80 1000 0 -180 1.E+07 10M 1 10 100 Cout – Output Load Capacitance – pF OVERSHOOT vs OUTPUT LOAD CAPACITANCE INPUT VOLTAGE AND CURRENT NOISE vs FREQUENCY 100 100 80 10 VCC+ = 15 V VCC+ = 15 V VCC– = –15 V VCC– = –15 V VIN = 100 mVPP TA = 25°C nV/ÖHz Input Voltage Noise – nV/rtHz 90 70 Overshoot – % 60 Phase, TA = 25°C f – Frequency – Hz 60 50 40 TA = 125°C 30 20 30 6 3 -135 VCC+ = 15 V VCC– = –15 V RL = 2 kW TA = 25°C 0 1.E+03 1k Gain Margin – dB Gain – dB Phase Shift – deg Gain 50 10 9 -45 60 0 VCC+ = 15 V VCC– = –15 V VO = 0 V Gain, TA = 125°C Phase Margin – deg 0 Phase TA = 25°C 10 1 Input Voltage Noise Input Current Noise pA/ÖHz Input Current Noise – pA/rtHz 80 GAIN AND PHASE MARGIN vs OUTPUT LOAD CAPACITANCE 10 TA = –55°C 0 1 10 100 1000 10 Cout – Output Load Capacitance – pF 12 Submit Documentation Feedback 100 1k 1000 10k 10000 0.1 100k 100000 f – Frequency – Hz Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) INPUT REFERRED NOISE VOLTAGE vs SOURCE RESISTANCE GAIN AND PHASE MARGIN vs DIFFERENTIAL SOURCE RESISTANCE 1000 16 64 60 VCC– = –15 V f = 1 Hz TA = 25°C 14 56 52 12 100 10 44 10 40 Gain Margin 36 8 32 28 6 4 2 VCC+ = 15 V 24 VCC– = –15 V 20 AV = 100 16 VO = 0 V 12 TA = 25°C 8 Phase Margin – deg 48 Phase Margin Gain Margin – dB nV/ÖHz Input Referred Noise Voltage – nV/rtHz VCC+ = 15 V 4 0 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k 1.E+06 1M 1 00 RS – Source Resistance – W è 55 45 0 45 -10 35 VCC+ = 15 V VCC– = –15 V AV = 1 RL = 2 kW CL = 100 pF TA = 25°C -20 -30 5 -40 -5 -15 -2 2 6 10 14 18 22 VO – Output Voltage – V 10 VI – Input Voltage – V VO – Output Voltage – V Input Output 101k 00 0 1010k 0 0 0 10100k 0000 LARGE SIGNAL TRANSIENT RESPONSE (AV = –1) 55 15 100 10 0 RSD – Differential Source Resistance – W è LARGE SIGNAL TRANSIENT RESPONSE (AV = 1) 25 10 10 Input 10 0 35 25 15 -10 VCC+ = 15 V VCC– = –15 V AV = –1 RL = 2 kW CL = 100 pF TA = 25°C Output -20 -30 5 -40 -50 -5 -50 -60 -15 VI – Input Voltage – V 1 1.E+01 10 -60 -2 Time – µs 2 6 10 14 18 22 Time – µs Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 13 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) LOW_FREQUENCY NOISE 0.6 0.2 400 0.5 0.1 300 0.4 0.0 -0.1 VCC+ = 15 V VCC– = –15 V AV = 1 RL = 2 kW CL = 100 pF TA = 25°C 0.2 0.1 -0.2 -0.3 -0.4 0 Input Voltage Noise – nV Input 0.3 200 VI – Input Voltage – V VO – Output Voltage – V SMALL SIGNAL TRANSIENT RESPONSE 100 0 -100 -200 T3 VCC+ = 15 V -300 VCC– = –15 V BW = 0.1 Hz to 10 Hz TA = 25°C Output -0.1 -0.2 -0.5 0.0 0.5 1.0 1.5 -0.5 -400 -0.6 -500 -5 -3 -2 -1 0 1 2 3 4 5 Time – s Time – µs 14 -4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 LM833 www.ti.com SLOS481A – JULY 2010 – REVISED AUGUST 2010 APPLICATION INFORMATION Output Characteristics All operating characteristics are specified with 100-pF load capacitance. The LM833 can drive higher capacitance loads. However, as the load capacitance increases, the resulting response pole occurs at lower frequencies, causing ringing, peaking, or oscillation. The value of the load capacitance at which oscillation occurs varies from lot to lot. If an application appears to be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate the problem (see Figure 2). PULSE RESPONSE (RL = 600 Ω, CL = 380 pF) PULSE RESPONSE (RL = 2 kΩ, CL = 560 pF) Maximum capacitance before oscillation = 380 pF PULSE RESPONSE (RL = 10 kΩ, CL = 590 pF) Maximum capacitance before oscillation = 590 pF 0.25 V per Division 0.25 V per Division 0.25 V per Division Maximum capacitance before oscillation = 560 pF 250 ns per Division 250 ns per Division 250 ns per Division 0.25 V per Division PULSE RESPONSE (RO = 35 Ω, CO = 1000 pF, RL = 2 kΩ) 0.25 V per Division PULSE RESPONSE (RO = 4 Ω, CO = 1000 pF, RL = 2 kΩ) 0.25 V per Division PULSE RESPONSE (RO = 0 Ω, CO = 1000 pF, RL = 2 kΩ) 250 ns per Division 250 ns per Division 250 ns per Division 15 V RO VO 5V –5 V –15 V CL RL = 2 kΩ Figure 2. Output Characteristics Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 15 LM833 SLOS481A – JULY 2010 – REVISED AUGUST 2010 www.ti.com REVISION HISTORY Changes from Original (July 2010) to Revision A • 16 Page Changed Datasheet status from Product Preview to Production Data. ................................................................................ 1 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): LM833 PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) LM833D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM833 LM833DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RSU LM833DGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RSU LM833DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM833 LM833P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 LM833P (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LM833DGKR VSSOP DGK 8 LM833DGKT VSSOP DGK LM833DR SOIC D LM833DR SOIC D SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 8 250 180.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM833DGKR VSSOP DGK 8 2500 346.0 346.0 35.0 LM833DGKT VSSOP DGK 8 250 203.0 203.0 35.0 LM833DR SOIC D 8 2500 367.0 367.0 35.0 LM833DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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