Low Power, High Precision Operational Amplifier Op97

Transcript

Low Power, High Precision Operational Amplifier OP97 Low supply current: 600 μA maximum OP07 type performance Offset voltage: 20 μV maximum Offset voltage drift: 0.6 μV/°C maximum Very low bias current 25°C: 100 pA maximum −55°C to +125°C: 250 pA maximum High common-mode rejection: 114 dB minimum Extended industrial temperature range: −40°C to +85°C PIN CONNECTIONS NULL 1 OP97 8 NULL –IN 2 7 V+ +IN 3 6 OUT V– 4 5 OVER COMP 00299-001 FEATURES Figure 1. 8-Lead PDIP (P Suffix) 8-Lead SOIC (S Suffix) GENERAL DESCRIPTION The OP97 is a low power alternative to the industry-standard OP07 precision amplifier. The OP97 maintains the standards of performance set by the OP07 while utilizing only 600 μA supply current, less than 1/6 that of an OP07. Offset voltage is an ultralow 25 μV, and drift over temperature is below 0.6 μV/°C. External offset trimming is not required in the majority of circuits. Common-mode rejection and power supply rejection are also improved with the OP97, at 114 dB minimum over wider ranges of common-mode or supply voltage. Outstanding PSR, a supply range specified from ±2.25 V to ±20 V, and the minimal power requirements of the OP97 combine to make the OP97 a preferred device for portable and battery-powered instruments. Improvements have been made over OP07 specifications in several areas. Notable is bias current, which remains below 250 pA over the full military temperature range. The OP97 is ideal for use in precision long-term integrators or sample-andhold circuits that must operate at elevated temperatures. The OP97 conforms to the OP07 pinout, with the null potentiometer connected between Pin 1 and Pin 8 with the wiper to V+. The OP97 upgrades circuit designs using AD725, OP05, OP07, OP12, and PM1012 type amplifiers. It may replace 741type amplifiers in circuits without nulling or where the nulling circuitry has been removed. Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1997–2009 Analog Devices, Inc. All rights reserved. OP97 TABLE OF CONTENTS Features .............................................................................................. 1  ESD Caution...................................................................................5  Pin Connections ............................................................................... 1  Typical Performance Characteristics ..............................................6  General Description ......................................................................... 1  Application Information ................................................................ 11  Revision History ............................................................................... 2  AC Performance ............................................................................. 12  Specifications..................................................................................... 3  Guarding and Shielding ................................................................. 13  Electrical Characteristics ............................................................. 3  Outline Dimensions ....................................................................... 15  Absolute Maximum Ratings............................................................ 5  Ordering Guide .......................................................................... 16  Thermal Resistance ...................................................................... 5  REVISION HISTORY 3/09—Rev. F to Rev. G Changes to Figure 20 and Figure 23 ............................................... 9 Changes to Figure 26 and Figure 27 ............................................. 10 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 01/02—Rev. C to Rev. D Edits to Absolute Maximum Ratings ..............................................3 Edits to Ordering Guide ...................................................................3 Deleted DICE Characteristics ..........................................................3 Deleted Wafer Test Limits ................................................................3 Edits to Applications Information...................................................7 11/07—Rev. E to Rev. F Updated Format .................................................................. Universal Changes to Ordering Guide .......................................................... 16 07/03—Rev. D to Rev. E Deleted H-08A .................................................................... Universal Deleted Q-8 ......................................................................... Universal Deleted E-20A ..................................................................... Universal Deleted Die Characteristics ............................................................. 4 Deleted Wafer Test Limits ............................................................... 4 Updated TPC 14 ............................................................................... 5 Updated Outline Dimensions ....................................................... 10 Rev. G | Page 2 of 16 OP97 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Symbol Conditions Min OP97E Typ Max 25 Input Offset Voltage VOS 10 Long-Term Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density ΔVOS/Time IOS IB en p-p en 0.3 30 ±30 0.5 17 14 20 2000 132 ±14.0 Input Noise Current Density Large Signal Voltage Gain Common-Mode Rejection Input Voltage Range 3 OUTPUT CHARACTERISTICS Output Voltage Swing Differential Input Resistance 4 POWER SUPPLY Power Supply Rejection Supply Current Supply Voltage DYNAMIC PERFORMANCE Slew Rate Closed-Loop Bandwidth in AVO CMR IVR 0.1 Hz to 10 Hz fO = 10 Hz 1 fO = 1000 Hz 2 fO = 10 Hz VO = ±10 V; RL = 2 kΩ VCM = ±13.5 V 300 114 ±13.5 Min 100 ±100 30 22 200 110 ±13.5 OP97F Typ Max Unit 30 75 μV 0.3 30 ±30 0.5 17 14 20 2000 132 ±14.0 150 ±150 30 22 μV/month pA pA μV p-p nV/√Hz nV/√Hz fA/√Hz V/mV dB V VO RIN RL = 10 kΩ ±13 30 ±14 ±13 30 ±14 V MΩ PSR ISY VS VS = ±2 V to ±20 V 114 110 Operating range ±2 132 380 ±15 ±2 132 380 ±15 dB μA V SR BW AVCL = 1 0.1 0.4 0.2 0.9 0.1 0.4 0.2 0.9 1 10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request. Sample tested. 3 Guaranteed by CMR test. 4 Guaranteed by design. 2 Rev. G | Page 3 of 16 600 ±20 600 ±20 V/μs MHz OP97 VS = ±15 V, VCM = 0 V, −40°C ≤ TA ≤ +85°C for the OP97E/OP97F, unless otherwise noted. Table 2. Parameter Input Offset Voltage Average Temperature Coefficient of VOS Input Offset Current Average Temperature Coefficient of IOS Input Bias Current Average Temperature Coefficient of IB Large Signal Voltage Gain Common-Mode Rejection Power Supply Rejection Input Voltage Range 1 Output Voltage Swing Slew Rate Supply Current Supply Voltage 1 OP97E Typ 25 0.2 Max 60 0.6 IOS TCIOS 60 0.4 250 2.5 OP97F Typ 60 0.3 0.3 80 0.6 IB ±60 ±250 0.4 1000 128 126 ±14.0 ±14 0.15 400 ±15 2.5 Symbol VOS TCVOS TCIB AVO CMR PSR IVR VO SR ISY VS Conditions Min S suffix VO = 10 V; RL = 2 kΩ VCM = ±13.5 V VS = ±2.5 V to ±20 V RL = 10 kΩ Operating range 200 108 108 ±13.5 ±13 0.05 ±2.5 Guaranteed by CMR test. Rev. G | Page 4 of 16 Min 150 108 108 ±13.5 ±13 0.05 800 ±20 ±2.5 Max 200 2.0 Unit μV μV/°C 750 7.5 pA pA/°C ±80 ±750 pA 0.6 1000 128 128 ±14.0 ±14 0.15 400 ±15 7.5 pA/°C V/mV dB dB V V V/μs μA V 800 ±20 OP97 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Table 3. Parameter Supply Voltage Input Voltage1 Differential Input Voltage2 Differential Input Current2 Output Short-Circuit Duration Operating Temperature Range OP97E, OP97F (P, S) Storage Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Package Type 8-Lead PDIP (P Suffix) 8-Lead SOIC (S Suffix) Rating ±20 V ±20 V ±1 V ±10 mA Indefinite −40°C to +85°C 1 θJC 43 43 Unit °C/W °C/W θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for PDIP package; θJA is specified for device soldered to printed circuit board for SOIC package. ESD CAUTION −65°C to +150°C −65°C to +150°C 300°C θJA1 103 158 1 For supply voltages less than ±20 V, the absolute maximum input voltage is equal to the supply voltage. 2 The inputs of the OP97 are protected by back-to-back diodes. Currentlimiting resistors are not used in order to achieve low noise. Differential input voltages greater than 1 V cause excessive current to flow through the input protection diodes unless limiting resistance is used. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. G | Page 5 of 16 OP97 TYPICAL PERFORMANCE CHARACTERISTICS 400 60 TA = 25°C VCM = 0V VS = ±15V TA = 25°C VCM = 0V 1894 UNITS 40 IB– INPUT CURRENT (pA) NUMBER OF UNITS 300 200 20 IB+ 0 –20 IOS 100 –20 0 20 INPUT OFFSET VOLTAGE (µV) 40 –60 –75 00299-002 0 –40 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 125 00299-005 –40 Figure 5. Input Bias, Offset Current vs. Temperature Figure 2. Typical Distribution of Input Offset Voltage 60 400 TA = 25°C VS = ±15V VS = ±15V TA = 25°C VCM = 0V 1920 UNITS 40 IB– INPUT CURRENT (pA) NUMBER OF UNITS 300 200 20 IB+ 0 IOS –20 100 0 50 INPUT BIAS CURRENT (pA) 100 –60 –15 ±5 500 300 200 100 0 –60 –40 –20 0 20 INPUT OFFSET CURRENT (pA) 40 60 10 15 Figure 4. Typical Distribution of Input Offset Current TA = 25°C VS = ±15V VCM = 0V ±4 ±3 ±2 J PACKAGES ±1 0 00299-004 NUMBER OF UNITS DEVIATION FROM FINAL VALUE (µV) VS = ±15V TA = 25°C VCM = 0V 400 –5 0 5 COMMON-MODE VOLTAGE (V) Figure 6. Input Bias, Offset Current vs. Common-Mode Voltage Figure 3. Typical Distribution of Input Bias Current 1894 UNITS –10 Z, P PACKAGES 0 1 2 3 4 TIME AFTER POWER APPLIED (Minutes) Figure 7. Input Offset Voltage Warmup Drift Rev. G | Page 6 of 16 5 00299-007 –50 00299-003 0 –100 00299-006 –40 OP97 450 BALANCED OR UNBALANCED VS = ±15V VCM = 0V NO LOAD SUPPLY CURRENT (µA) 425 100 –55°C ≤ TA ≤ +125°C TA = 25°C 10 400 TA = +125°C 375 TA = +25°C 350 TA = –55°C 3k 10k 30k 100k 300k 1M SOURCE RESISTANCE (Ω) 3M 10M 300 0 Figure 8. Effective Offset Voltage vs. Source Resistance COMMON-MODE REJECTION (dB) 10 1 10k 100k 1M SOURCE RESISTANCE (Ω) 10M 100M 100 80 60 40 20 0 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 12. Common-Mode Rejection vs. Frequency 140 TA = 25°C VS = ±15V ΔVS = 10V p-p 15 POWER SUPPLY REJECTION (dB) TA = –55°C TA = +25°C 10 TA = +125°C 5 VS = ±15V OUTPUT SHORTED TO GROUND 0 –5 TA = +125°C TA = +25°C –15 TA = –55°C 0 1 2 TIME FROM OUTPUT SHORT (Minutes) 3 100 –PSR 80 +PSR 60 40 20 0.1 00299-010 –10 120 Figure 10. Short-Circuit Current vs. Time, Temperature 1 10 100 1k FREQUENCY (Hz) 10k 100k Figure 13. Power Supply Rejection vs. Frequency Rev. G | Page 7 of 16 1M 00299-013 20 SHORT-CIRCUIT CURRENT (mA) 20 TA = 25°C VS = ±15V VCM = ±10V 120 Figure 9. Effective TCVOS vs. Source Resistance –20 15 140 BALANCED OR UNBALANCED VS = ±15V VCM = 0V 0.1 1k 10 SUPPLY VOLTAGE (±V) Figure 11. Supply Current vs. Supply Voltage 00299-009 EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C) 100 5 00299-012 1 1k 00299-011 325 00299-008 EFFECTIVE OFFSET VOLTAGE (µV) 1000 OP97 DIFFERENTIAL INPUT VOLTAGE (10µV/DIV) TA = +25°C 1k 100 1 2 5 LOAD RESISTANCE (kΩ) 10 20 00299-014 TA = +125°C TA = +25°C TA = –55°C –15 VOLTAGE NOISE 10 1/1 CORNER 2.5Hz OUTPUT SWING (V p-p) CURRENT NOISE CURRENT NOISE DENSITY (fA/ Hz) 100 10 1 10 1 1k 100 FREQUENCY (Hz) 25 20 15 10 0 10 10k 100k 100 1k LOAD RESISTANCE (Ω) Figure 18. Maximum Output Swing vs. Load Resistance Figure 15. Noise Density vs. Frequency 35 10 TA = 25°C VS = ±2V TO ±20V TA = 25°C VS = ±15V AVCL = +1 1% THD RL = 10kΩ OUTPUT SWING (V p-p) 30 1 R R RS = 2R 0.1 25 20 15 10 10Hz 1kHz 5 RESISTOR NOISE 0.01 100 1k 10k 100k 1M SOURCE RESISTANCE (Ω) 10M 100M 0 100 00299-016 TOTAL NOISE DENSITY (µV/ Hz) 15 5 1/1 CORNER 120Hz 1 10 TA = 25°C VS = ±15V AVCL = +1 1% THD fO = 1kHz 30 00299-015 VOLTAGE NOISE DENSITY (nV/ Hz) 100 –5 0 5 OUTPUT VOLTAGE (V) 35 1k TA = 25°C VS = ±2V TO ±20V –10 Figure 17. Open-Loop Gain Linearity Figure 14. Open-Loop Gain vs. Load Resistance 1k RL = 10kΩ VS = ±15V VCM = 0V 00299-018 OPEN-LOOP GAIN (V/mV) TA = –55°C TA = +125°C 00299-017 VS = ±15V VO = ±10V 00299-019 10k 1k 10k FREQUENCY (Hz) Figure 19. Maximum Output Swing vs. Frequency Figure 16. Total Noise Density vs. Source Resistance Rev. G | Page 8 of 16 OP97 80 80 90 135 20 TA = +125°C 0 180 TA = –55°C 225 –20 VS = ±15V CL = 20pF RL = 1MΩ –40 –60 100 40 10k 100k FREQUENCY (Hz) 1M 10M 90 135 20 TA = +125°C 0 180 TA = –55°C 225 –20 VS = ±15V CL = 20pF RL = 1MΩ –60 100 Figure 20. Open-Loop Gain, Phase vs. Frequency (COC = 0 pF) 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 23. Open-Loop Gain, Phase vs. Frequency (COC = 100 pF) 10 1 TA = 25°C VS = ±15V RL = 10kΩ 1% THD VOUT = 3V rms RL = 10kΩ VS = ±15V CL = 100pF TA = +125°C SLEW RATE (V/µs) 1 0.1 THD + N (%) TA = +125°C GAIN –40 1k TA = –55°C PHASE SHIFT (Degrees) PHASE OPEN-LOOP GAIN (dB) TA = +125°C 40 PHASE SHIFT (Degrees) 60 00299-020 AVCL = 100 0.01 AVCL = 10 0.1 TA = –55°C 0.01 0.001 100 1k 10k FREQUENCY (Ω) 0.001 1 Figure 21. Total Harmonic Distortion Plus Noise vs. Frequency 10k 10k Figure 24. Slew Rate vs. Overcompensation 70 1000 50 TA = +125°C +EDGE GAIN BANDWIDTH (kHz) TA = 25°C VS = ±15V AVCL = +1 VOUT = 100mV p-p COC = 0pF 60 –EDGE 40 30 20 TA = –55°C 100 10 VS = ±15V CL = 20pF RL = 1MΩ AV = 100 10 0 10 100 1k LOAD CAPACITANCE (pF) 10k 1 00299-022 OVERSHOOT (%) 10 100 1k OVERCOMPENSATION CAPACITOR (pF) 00299-024 0.0001 10 00299-021 AVCL = 1 00299-025 OPEN-LOOP GAIN (dB) PHASE TA = –55°C 00299-023 GAIN 60 Figure 22. Small Signal Overshoot vs. Capacitive Load 1 10 100 1k OVERCOMPENSATION CAPACITOR (pF) Figure 25. Gain Bandwidth Product vs. Overcompensation Rev. G | Page 9 of 16 OP97 1k 80 TA = 25°C VS = ±15V TA = –55°C TA = +25°C TA = –55°C 135 GAIN 180 0 TA = +125°C 225 –20 –40 VS = ±15V CL = 20pF RL = 1MΩ –60 100 10k 100k FREQUENCY (Hz) 1M 10M 80 ` TA = +25°C TA = +125°C 20 135 GAIN 180 TA = –55°C TA = +125°C 225 PHASE SHIFT (Degrees) 90 40 VS = ±15V CL = 20pF RL = 1MΩ 1k 10k 100k FREQUENCY (Hz) 1M 10M 00299-027 OPEN-LOOP GAIN (dB) PHASE –60 100 AVCL = 1 1 10 100 1k FREQUENCY (Hz) 10k 100k Figure 28. Closed-Loop Output Resistance vs. Frequency TA = –55°C 60 –40 0.1 0.001 Figure 26. Open-Loop Gain, Phase vs. Frequency (COC = 1000 pF) –20 AVCL = 1000 1 0.01 1k 0 10 Figure 27. Open-Loop Gain, Phase vs. Frequency (COC = 10,000 pF) Rev. G | Page 10 of 16 00299-028 20 TA = +125°C OUTPUT IMPEDANCE (Ω) 90 PHASE PHASE SHIFT (Degrees) 40 100 00299-026 OPEN-LOOP GAIN (dB) 60 OP97 APPLICATION INFORMATION The OP97 is a low power alternative to the industry-standard precision op amp, the OP07. The OP97 can be substituted directly into OP07, OP77, AD725, and PM1012 sockets with improved performance and/or less power dissipation and can be inserted into sockets conforming to the 741 pinout if nulling circuitry is not used. Generally, nulling circuitry used with earlier generation amplifiers is rendered superfluous by the extremely low offset voltage of the OP97 and can be removed without compromising circuit performance. Extremely low bias current over the full military temperature range makes the OP97 attractive for use in sample-and-hold amplifiers, peak detectors, and log amplifiers that must operate over a wide temperature range. Balancing input resistances is not necessary with the OP97. Offset voltage and TCVOS are degraded only minimally by high source resistance, even when unbalanced. The input pins of the OP97 are protected against large differential voltage by back-to-back diodes. Current-limiting resistors are not used to maintain low noise performance. If differential voltages above ±1 V are expected at the inputs, series resistors must be used to limit the current flow to a maximum of 10 mA. Common-mode voltages at the inputs are not restricted and may vary over the full range of the supply voltages used. The OP97 requires very little operating headroom about the supply rails and is specified for operation with supplies as low as ±2 V. Typically, the common-mode range extends to within 1 V of either rail. The output typically swings to within 1 V of the rails when using a 10 kΩ load. Offset nulling is achieved utilizing the same circuitry as an OP07. A potentiometer between 5 kΩ and 100 kΩ is connected between Pin 1 and Pin 8 with the wiper connected to the positive supply. The trim range is between 300 μV and 850 μV, depending upon the internal trimming of the device. +V 1 RPOT = 5kΩ TO 100kΩ 8 2 7 OP97 6 4 –V COC 00299-029 5 3 Figure 29. Optional Input Offset Voltage Nulling and Overcompensation Circuit Rev. G | Page 11 of 16 OP97 AC PERFORMANCE The ac characteristics of the OP97 are highly stable over its full operating temperature range. Unity-gain small-signal response is shown in Figure 30. Extremely tolerant of capacitive loading on the output, the OP97 displays excellent response even with 1000 pF loads (see Figure 31). In large signal applications, the input protection diodes effectively short the input to the output during the transients if the amplifier is connected in the usual unity-gain configuration. The output enters short-circuit current limit, with the flow going through the protection diodes. Improved large signal transient response is obtained by using a feedback resistor between the output and the inverting input. Figure 32 shows the large-signal response of the OP97 in unitygain with a 10 kΩ feedback resistor. The unity-gain follower circuit is shown in Figure 33. 100 90 10 2V 20µs 00299-032 0% Figure 32. Large Signal Transient Response (AVCL = 1) The overcompensation pin (Pin 5) can be used to increase the phase margin of the OP97 or to decrease gain bandwidth product at gains greater than 10. 10kΩ VIN 3 OP97 6 VOUT 00299-033 2 Figure 33. Unity-Gain Follower 100 90 100 90 10 5µs 10 Figure 30. Small Signal Transient Response (CLOAD = 100 pF, AVCL = 1) 0% 20mV 5µs 00299-034 20mV 00299-030 0% Figure 34. Small Signal Transient Response with Overcompensation (CLOAD = 1000 pF, AVCL = 1, COC = 220 pF) 100 90 10 20mV 5µs 00299-031 0% Figure 31. Small-Signal Transient Response (CLOAD = 1000 pF, AVCL = 1) Rev. G | Page 12 of 16 OP97 GUARDING AND SHIELDING The OP97 is an excellent choice as an output amplifier for higher resolution CMOS DACs. Its tightly trimmed offset voltage and minimal bias current result in virtually no degradation of linearity, even over wide temperature ranges. Figure 36 shows a versatile monitor circuit that can typically sense current at any point between the ±15 V supplies. This makes it ideal for sensing current in applications such as full bridge drivers where bidirectional current is associated with large common-mode voltage changes. The 114 dB CMRR of the OP97 makes the contribution of the amplifier to commonmode error negligible, leaving only the error due to the resistor ratio inequality. Ideally, R2/R4 = R3/R5. High impedance circuitry is extremely susceptible to RF pickup, line frequency hum, and radiated noise from switching power supplies. Enclosing sensitive analog sections within grounded shields is generally necessary to prevent excessive noise pickup. Twisted-pair cable aid in rejection of line frequency hum. R1 10kΩ V1 R2 10kΩ IL R5 10kΩ R3 10kΩ +15V 2 3 R4 10kΩ 30pF RFB IO AD7548 2 3 OP97 6 00299-035 Figure 35. DAC Output Amplifier UNITY-GAIN FOLLOWER NONINVERTING AMPLIFIER 2 2 OP97 6 3 OP97 6 PDIP BOTTOM VIEW INVERTING AMPLIFIER 8 1 2 OP97 6 00299-037 3 6 Figure 37. Guard Ring Layout and Connections Rev. G | Page 13 of 16 VOUT 4 –15V IO 3 7 OP97 Figure 36. Current Monitor VOUT DIGITAL INPUTS RL 00299-036 To maintain the extremely high input impedances of the OP97, care must be taken in circuit board layout and manufacturing. Board surfaces must be kept scrupulously clean and free of moisture. Conformal coating is recommended to provide a humidity barrier. Even a clean PCB can have 100 pA of leakage currents between adjacent traces; therefore, use guard rings around the inputs. Guard traces are operated at a voltage close to that on the inputs, so that leakage currents are minimal. In noninverting applications, connect the guard ring to the commonmode voltage at the inverting input (Pin 2). In inverting applications, both inputs remain at ground, so that the guard trace should be grounded. Make guard traces on both sides of the circuit board. OP97 +15V The digitally programmable gain amplifier shown in Figure 38 has 12-bit gain resolution with 10-bit gain linearity over the range of −1 to −1024. The low bias current of the OP97 maintains this linearity, while C1 limits the noise voltage bandwidth, allowing accurate measurement down to microvolt levels. VIN 2 3 GAIN (Av) −1.00024 −2 −4 −8 −16 −32 −64 −128 −256 −512 −1024 −2048 −4096 Open Loop 0.1µF RFB VREF 17 IOUT1 1 Table 5. IOUT2 AD7541A C1 220pF +15V 0.1µF 2 VOUT 00299-038 OP97 3 6 0.1µF –15V Figure 38. Precision Programmable Gain Amplifier R2 20kΩ 5pF R1 2kΩ VIN 1µF 10kΩ 10kΩ Many high speed amplifiers suffer from less-than-perfect low frequency performance. A combination amplifier consisting of a high precision, slow device like the OP97 and a faster device such as the AD8610 results in uniformly accurate performance from dc to the high frequency limit of the AD8610, which has a gainbandwidth product of 25 MHz. The circuit shown in Figure 39 accomplishes this, with the AD8610 providing high frequency amplification and the OP97 operating on low frequency signals and providing offset correction. Offset voltage and drift of the circuit are controlled by the OP97. 2 3 AD8610 6 VOUT 2 3 6 5 AV = – R2 R1 0.1µF 00299-039 0.1µF OP97 Figure 39. Combination High Speed, Precision Amplifier 5V 100 90 10 0% 1V 2µs Figure 40. Combination Amplifier Transient Response Rev. G | Page 14 of 16 00299-040 DIGITAL IN 4095 2048 1024 512 256 128 64 32 16 8 4 2 1 0 16 18 ±2.5mV TO ±10V RANGE DEPENDING ON GAIN SETTING OP97 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 1 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) BSC 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.210 (5.33) MAX 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE 0.430 (10.92) MAX 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 070606-A COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 41. 8-Lead Plastic Dual In-Line Package [PDIP] P-Suffix (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 8 1 5 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 42. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body S-Suffix (R-8) Dimensions shown in millimeters and (inches) Rev. G | Page 15 of 16 012407-A 4.00 (0.1574) 3.80 (0.1497) OP97 ORDERING GUIDE Model OP97EP OP97EPZ 1 OP97FP OP97FPZ1 OP97FS OP97FS-REEL OP97FS-REEL7 OP97FSZ1 OP97FSZ-REEL1 OP97FSZ-REEL71 1 Temperature Range –40°C to +85°C –40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Z = RoHS Compliant Part. ©1997–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00299-0-3/09(G) Rev. G | Page 16 of 16 Package Option N-8 N-8 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8