Transcript
US005870325A
Ulllted States Patent [19]
[11] Patent Number:
Nielsen et al.
[45]
[54]
Date of Patent:
MEMORY SYSTEM WITH MULTIPLE
5,572,457
ADDRESSING AND CONTROL BUSSES
5,661,677 5,701,270
[75]
Inventors: Michael J_ K_ Nielsen, San Jose; Brian
Kindle, Sunnyvale; Linda S. Gardner, Saratoga; Zahld S‘ Hussam> Palo Alto’
5,745,428
5,870,325 Feb. 9, 1999
11/1996 Michael .................................. .. 365/63 8/1997 Rondeau, 11 et a1. .. 12/1997
Rao ...................... ..
..... .. 365/63 365/23003
4/1998 Rao .................................. .. 365/230.03
Primary Examiner_vu A be Attorney, Agent, or Firm—Wagner, Murabito & Hao
all of Cahf.
[57] [73]
ABSTRACT
Assignee: Silicon Graphics, Inc., Mountain View, Calif
_ A memory system that lncludes a memory controller and
memory modules that provide address and control signals to _
groups of memory components through multiple busses. In
[21] [22]
Appl' NO" 60’451 Filed; Apr, 14, 1998
one embodiment, each memory module is coupled to an address/control buss. The use of multiple address/control
[51] [52]
6 Int. Cl. ..................................................... .. G11C 7/00 US. Cl. ............................................... .. 365/63; 365/52
busses provides the necessary bandwidth so as to alloW for fast access and Control of memory componenm Memory Components are grouped into banks of memory Components
Field Of Search ......................... .. 365/63, 52,230.03 _ References Clted Us‘ PATENT DOCUMENTS
with each bank including three memory components, Memory modules are con?gured With one, tWo, four, or more banks of memory components on a given memory module. In one embodiment, the memory system includes siX 48-bit memory modules that use SDRAM memory
5,089,993 2/1992 Neal et a1. .............................. .. 365/63 5,272,664 12/1993 Alexander et a1~ ~~ 365/52
components, The six memory modules are used in a set to
[58]
[56]
1;; ,
,
574407519
Brass“ et al' """ " a
y
form a 288-bit memory Word. When 16 Mbit or 64 Mbit
memory components are used, this con?guration gives a
.......... ..
8/1995 Mart et a1‘
365/52
5,513,135
4/1996
Dell et a1. .............. ..
.. 365/52
5,532,954
7/1996 Bechtolsheim et a1. .
365/52
-
rangg of memory con?guratlons from 32 megabytes to 2 glga yes'
5,566,122 10/1996 Schaefer ........................... .. 365/230.03
22 Claims, 21 Drawing Sheets
200\ DATA 230
CS 299
NC
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U.S. Patent
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Sheet 1 0121
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FIG.1
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FIG. 2
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Sheet 12 0f 21
DIN(47-O) (2) AIN(13-0) (2)
J1
1001\
V3AV
V'IT
sag]; connector V3AV 1
DINP]
DIN 3
A
__
2 113 }%8
DINH
Z
DIN 2
117
DINFI]7 DIN MASK-IN”) (2‘ cu<(0) (2,3)
765
1162
s
11%
9 11
11 110
12
109
DINF]6 DIN MASK_IN(1) (2) DIN 8 DIN 9
10 111
DIN 10]
DIN 11
13 14
DIN 14
15
DIN DIN 15 1s
16 17 18
DIN 19
15%
108 107 106
DIN[12] DIN 13
105 104
DINP6] DIN 17
19 I82 101
DIN 21
20 21
MASK_IN(3) (2) AINE] >
911
MASK-1N0) (2)
21 97 96
111111
27
AIN 4
26
95
94
4 93
“N9
11610
3?
g3
‘ AINhl CLKEN IN (2)
87
CS_N_IN(O) (2)
36
86
Cs_N_IN(2) (2)
37
22
CS_N_IN(1) (2) CS N IN(3) (2) _ w
R5
DINFO]
100
33
AMI
WE_N_IN (2)
I1
ID
CAS_N_IN (2)
33
DIN 26
RAS_N_IN (2)
1(1) 81 80
DIN[27]
BIN 2451
42
79
0603 DINPQ]
43 44
7s 7']
4 DIN[28 DIN 29
DINP4 DlN 35
47 48
74 73
DIN[33
49
72
' DIN 36
50 71
DIN[37
DIN 31
GND
12
DIN[38
3?
DIN 32
52 53
69 68
DIN 40
2g
2%
DIN 41
DIN 42
56
65
a DIN 43
5s 62 2%‘
DIN 47
CLKU) (2’3)
MASK_IN(4) (2) IvIASK_IN(5) (2)
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DIN 44]
DIN 46
59 60
Y
GND
DIN 45]
61
"
GND
FIG. 10
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