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Evaluation board available
NX2838 SINGLE SUPPLY HIGH FREQUENCY ADJUSTABLE SYNCHRONOUS PWM CONTROLLER WITH A 3.3V/700mA LDO Pb Free Product
FEATURES
DESCRIPTION The NX2838 controller IC is a single power supply synchronous Buck controller IC designed for step down DC to DC converter applications. NX2838 is optimized to convert bus voltages from 8V to 32V to output voltage as low as 0.8V. The internal 3.3V output LDO can provide output current up to 700mA. An internal regulator converts bus voltage to 5V, which provides voltage supply to internal logic and driver circuit. The NX2838 operates from 200kHz to 1MHz and employs loss-less current limiting by sensing the Rdson of synchronous MOSFET followed by hiccup feature.Feedback under voltage triggers Hiccup. Other features of the device are: 3.3V LDO power good indicator, Thermal shutdown, 5V gate drive, Adaptive deadband control, Internal digital soft start, Vcc undervoltage lock out and Shutdown capability via the comp pin.
n n n n n n n n
Single supply voltage from 8V to 32V Internal 5V regulator Programmable frequency up to 1MHz Internal Digital Soft Start Function Internal 700mA 3.3VLDO with Power Goood indicator Prebias Startup Less than 50 nS adaptive deadband Current limit triggers hiccup by sensing Rdson of Synchronous MOSFET n Pb-free and RoHS compliant
APPLICATIONS n n n n n
7 VIN
BST
VIN +8V~32V
15 0.1u
10u 10 5
VCC
1u 8 100k 13 14
HDRV 2
5VREG
PGOOD
NX2838
6
10u
TYPICAL APPLICATION
10u
BAT54A
0.1u
LCD TV Graphic Card on board converters On board DC to DC application Hard Disk Drive Set Top Box
LDO3
VOUT +5V@2A
SW 1 16 OCP
2*47uF,X5R,10V
3k LDRV 4
AO4840(half)
LDOIN 12 FB
400 390p
150k
4.7u
11 40k
LDO3_SENSE
9 RT 7.87k AGND PAD
AO4840(half) 4.5uH
COMP PGND 3
10
28.7k
2.2n 10p
Figure1 - Typical application of 2838
ORDERING INFORMATION Device NX2838CMTR
Temperature 0 to 70o C
Package Frequency 3X3 MLPQ-16L 200kHz to 1MHz
Pb-Free Yes
Package Marking : NX2838XXX XXX is date code. For example, 735 means that this NX2838 is packaged in the 35th week of 2007 Rev.1.8 02/30/09
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NX2838 ABSOLUTE MAXIMUM RATINGS(NOTE1) VCC to GND & BST to SW voltage .................. 6.5V BST to GND Voltage ...................................... 45V VIN to GND Voltage ........................................ 35V SW to GND .................................................... -2V(100nS pulse) to 45V All other pins .................................................. -0.3V to 6.5V Operating Junction Temperature Range .............. -40oC to 125oC Storage Temperature Range .............................. -65oC to 150oC NOTE1: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
PACKAGE INFORMATION LDO3_SENSE
LDO3
16 15
14
13
OCP
BST
16-LEAD PLASTIC 3X3 MLPQ θ JA ≈ 46o C/W
SW 1
12 LDOIN
HDRV 2
11 FB
17 AGND
PGND 3
10 COMP 9 RT
5
6
7
8
VCC
5VREG
VIN
PGOOD
LDRV 4
ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vin = 12V, Vcc=5VREG, LDOIN=5V, LDO LOAD=5mA and TA = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. Followings are bypass capacitors:CVIN=1uF, C5VREG=10uF, CLDO3=10uF, all X5R ceramic capacitors. PARAMETER Reference Voltage Ref Voltage
SYM V REF
Ref Voltage line regulation Supp ly Voltage(Vin ) V in Voltage Range Input Voltage Current(Static) Input Voltage Current (Dynam ic)
Test Condition
TYP
MAX
0.784
0.8
0.816
V in=8V to 30V V in V in=12V,no switching V in=12V, switching with HDRV and LDRV open
Vin UVLO V in-Threshold
V in_UVLO
V in Rising
V in-Hysteresis
V in_Hyst
V in Falling
Rev.1.8 02/30/09
Min
0.4
V %
8 3
3.9
32 5.3
3.5
5.2
6
6
6.5
7.5
0.6
Units
V mA mA
V V
2
NX2838 PARAMET ER
SYM
Test Condition
Min
TYP
MAX
Units
4.75
5.3 20
20
5 10 50
V mV mA
3.4
3.9
4.4
V
5V REG 5VREG Output 5VREG Line Regulation 5VREG Max Current Under Voltage Lockout V CC -T hreshold
VIN=8V to 30V
V CC_UVLO VCC Rising
V CC -Hysteresis SS
V CC_Hyst
VCC Falling
0.2
V
Soft Start time Oscillator (Rt)
Tss
FS=1MHz
1
mS
Frequency Ramp-Amplitude Voltage Max Duty Cycle
FS
Min Controlable On Time Error Amplifiers T ransconductance Input Bias Current
Rt=7.87k
V RAMP FS=1MHz
Output Impedance , Sinking Rise Time Fall Tim e Deadband Tim e Low Side Driver (C L=2200pF) Output Impedance, Sourcing Current Output Impedance, Sinking Current Rise Time Fall Tim e Deadband Tim e 3.3V LDO LDOIN voltage range Output Voltage Line regulation Load regulation Current lim it Drop out Voltage
Rev.1.8 02/30/09
68
1000 1.5 78
1200 1.9 85 150
kHz V % nS
1500
2000 10
2500
umho nA
0.24
0.3
0.36
V
0.54
0.6
0.66
V
Ib
Comp SD Threshold FBUVL O Feedback UVLO threshold High Side Driver(C L=2200pF) Output Impedance , Sourcing
800 1.4
Rsource(Hdrv)
I=200mA
1.9
ohm
R sink(Hdrv)
I=200mA
1.7
ohm
14 17 30
ns ns ns
THdrv(Rise) THdrv(Fall) Tdead(L to H)
Ldrv going Low to Hdrv going High, 10%-10%
Rsource (Ldrv)
I=200mA
1.9
ohm
R sink (Ldrv)
I=200mA
1
ohm
13 12 10
ns ns ns
TLdrv(Rise) TLdrv(Fall) Tdead(H to SW going Low to Ldrv L) going High, 10% to 10%
LDO_SENSE connected to LDO OUT LDO_IN=4.5V to 5.5V
LDOIN ram ping down till LDOOUT drops by 50mV. I LOAD=500mA
3.23
3.3 5 900 500
5.5 3.37
V V
10 2
mV % mA mV
900
3
NX2838 PARAMETER OCP OCP current Power Good(Pgood) Threshold Voltage as % of Vref Hysteresis Over temperature Threshold Hysteresis
Rev.1.8 02/30/09
SYM
Test Condition
FB ramping up
Min
TYP
MAX
Units
30
37
45
uA
88
90 5
94
% %
150 20
o
C C
o
4
NX2838 PIN DESCRIPTIONS PIN #
PIN SYMBOL
PIN DESCRIPTION This pin is connected to the source of the high side MOSFET and provides return path for the high side driver.
1
SW
2
HDRV
High side MOSFET gate driver.
3
PGND
Power Ground.
4
LDRV
Low side MOSFET gate driver.
5
VCC
6
5VREG
7
VIN
IC’s supply voltage. This pin biases the internal logic circuits. A high freq 1uF ceramic capacitor is placed as close as possible to and connected from this pin to ground pin. An internal 5V regulator output which provides supply voltage for the low side fet driver . A high frequency 10uF ceramic capacitor must be connected from this pin to the GND pin as close as possible. Voltage supply for the internal 5V regulator. An open drain output that requires a pull up resistor to LDO3 or Vcc. When LDO3_sense reaches threshold, PGOOD transitions from LO to HI state.
8
PGOOD
9
RT
10
COMP
This pin is the output of the error amplifier and is used to compensate the voltage control feedback loop. This pin is also used as a shut down pin. When this pin is pulled below 0.3V, both drivers are turned off and internal soft start is reset.
11
FB
This pin is the error amplifier inverting input. This pin is connected via resistor divider to the output of the switching regulator to set the output DC voltage.
12
LDOIN
13
LDO3
This pin is the output of internal 3.3V LDO. A minimum of 10uF/X5R capacitor must be connected from this pin to ground to ensure stability.
14
LDO3_SENSE
This pin is used to sense the output voltage of LDO. This pin is directly connected to the output of the LDO regulator.
15
BST
This pin supplies voltage to the high side driver. A high frequency ceramic capacitor of 0.1 to 1 uF must be connected from this pin to SW pin.
16
OCP
This pin is connected to the drain of the external low side MOSFET and is the input of the over current protection(OCP) comparator. An internal current source is flown to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rdson.
PAD
AGND
Analog ground.
Rev.1.8 02/30/09
Oscillator's frequency can be set by using an external resistor from this pin to GND.
3.3V LDO input supply voltage.
5
NX2838 Typical Application (8~32V to 5V/2A) sdfd
BUS
BUS
1 C1 100u/35V
5V
R1 10
3
C2
VCC
10
5
AVCC
C4 1u HDRV 6
PGOOD R3
2
0.1u
C3 0.1u R4(optional) HDRV 4
M1B
0
AO4840
PVCC 3
5V
5V
15
C7 220u/35V
C8 VD D
BST
2 1
7 V IN
R2
D1 BAT54A
5 6
0.1u U1
C5 10u
L1 SW
SW
1
OUT
VOUT
DO3316P-472 PGOOD 8
PGOOD
100k OCP RT
7.87k
R6
16
3k 7 8
9
NX2838
R14
LDRV
LDRV 2
4
C9
C10
47u,X5R,6.3V
47u,X5R,6.3V
R12(optional) 10 M1A
1
AO4840
C14(optional) 470p GND
13
LDO3.3V
LDOIN
12
C11 1uF
700mA power line
LDOOUT
C6 10u
FB
R9
11 R11
C12 2.2n
LDOSENSE
400
390p
10
PGND
COMP
C13 10p
C8
3
17
GNDPAD
14
R8 40k
R10 28.6k
150k
Figure2 - Schematic of typical application
Rev.1.8 02/30/09
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NX2838 Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Rev.1.8 02/30/09
Quantity 1 3 2 1 1 1 2 1 1 1 1 1 1 1 3 1 3 1 1 1 1 1 1 1
Reference C1 C2,C3,C8 C4 C6,C5 C7 C8 C9,C10 C11 C12 C13 C14 D1 L1 M1 R1,R2,R12 R3 R4 R6 R8 R9 R10 R11 R14 U1
Part 100u/35V 0.1u 1u 10u 220u/35V 390p 47u,X5R,6.3V 1uF 2.2n 10p 470p BAT54A DO3316P-472 AO4840 10 100k 0 3k 40k 150k 28.6k 400 7.87k NX2838
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NX2838 Demoboard waveforms(VIN=8~32V,VOUT=5V)
Figure 3 - Output ripple
Figure 4 - Start up time
Figure 5 - Transient response with
[email protected] output
Figure 6 - Transient response with
[email protected] output
Figure 7 - Transient response with 1A@5V output
Figure 8 - Transient response with 1A@5V output
Rev.1.8 02/30/09
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NX2838 Efficiency at Vin=12V (Vout=5V)
100.0%
100.0%
90.0%
90.0%
80.0%
80.0%
70.0%
70.0% Eff (%)
Eff (%)
Efficiency at Vin=8V (Vout=5V)
60.0%
60.0%
50.0%
50.0%
40.0%
40.0%
30.0%
30.0% 20.0%
20.0% 0
500
1000
1500
2000
2500
3000
3500
0
500
1000
1500
2000
2500
3000
3500
Iout (mA)
Iout (mA)
Figure 9 - Efficiency (VIN=8V,VOUT=5V)
Figure 10 - Efficiency (VIN=12V,VOUT=5V)
Efficiency at Vin=30V (Vout=5V) 90.0% 80.0%
Eff (%)
70.0% 60.0% 50.0% 40.0% 30.0% 20.0% 0
500
1000
1500
2000
2500
3000
3500
Iout (mA)
Figure 11 - Efficiency (VIN=30V,VOUT=5V)
Rev.1.8 02/30/09
9
NX2838 APPLICATION INFORMATION Symbol Used In Application Information: VIN
- Input voltage
VOUT
- Output voltage
IOUT
- Output current
=
DVRIPPLE - Output voltage ripple FS
∆IRIPPLE =
VIN -VOUT VOUT 1 × × L OUT VIN FS ...(2) 32V-5V 5V 1 × × = 0.898A 4.7uH 32V 1MHz
Output Capacitor Selection
- Working frequency
Output capacitor is basically decided by the
DIRIPPLE - Inductor current ripple
amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple
Design Example
VIN = 8V to 32V
of iterations to satisfy both condition. Based on DC Load Condition The amount of voltage ripple during the DC load
VOUT=5V
condition is determined by equation(3).
The following is typical application for NX2838, the schematic is figure 1.
FS=1MHz
∆VRIPPLE = ESR × ∆IRIPPLE +
IOUT=2A DVRIPPLE <=50mV
∆IRIPPLE 8 × FS × COUT ...(3)
Where ESR is the output capacitors' equivalent
DVDROOP<=250mV @ 1A step
series resistance,COUT is the value of output capacitors. Typically ceramic capacitors are chosen as output
Output Inductor Selection
capacitors, both terms in equation (3) need to be evalu-
The selection of inductor value is based on inductor ripple current, power rating, working frequency and efficiency. Larger inductor value normally means smaller ripple current. However if the inductance is chosen too large, it brings slow response and lower efficiency. Usually the ripple current ranges from 20% to 40% of the output current. This is a design freedom which can be
ated to determine the overall ripple. Usually when this type of capacitors are selected, the amount of capacitance per single unit is not sufficient to meet the transient specification, which results in parallel configuration of multiple capacitors . For example, two 47uF(10V,X5R, 2mΩ) ceramic capacitor are used. The amount of output ripple is
decided by design engineer according to various application requirements. The inductor value can be calculated by using the following equations:
V -V V 1 L OUT = IN OUT × OUT × ∆IRIPPLE VIN FS IRIPPLE =k × IOUTPUT
= 2mV ...(1)
32V-5V 5V 1 × × 0.4 × 2A 32V 1MHz L OUT =5.3uH L OUT =
Choose inductor from COILCRAFT DO3308P-472 with L=4.7uH is a good choice.
Rev.1.8 02/30/09
0.887A 8 × 1MHz × 94uF ...(4)
If large value capacitors are selected such as Alu-
where k is between 0.2 to 0.4. Select k=0.4, then
Current Ripple is recalculated as
∆VRIPPLE = 1mΩ× 0.887A +
minum Electrolytic,POSCAP and OSCON types are used, the amount of the output voltage ripple is dominated by the first term in equation(3) and the second term can be neglected. The ESR and inductor current typically determines the output voltage ripple.
ESRdesire =
∆VRIPPLE ∆IRIPPLE
If low ESR is required, for most applications, multiple capacitors in parallel are better than a big capacitor. The number of capacitor is calculated as follows:
10
NX2838 N =
where FZ1,FZ2,FP1 and FP2 are poles and zeros in
E S R E × ∆ IR I P P L E ∆ VR IPPLE
...(5)
Although these calculation meets DC ripple spec, it still needs to be studied for transient requirement. Overall, we choose N=2.
the compensator. Their locations are shown in figure 4. The transfer function of type III compensator for transconductance amplifier is given by: Ve 1 − gm × Z f = VOUT 1 + gm × Zin + Z in / R1
For the voltage amplifier, the transfer function of
Compensator Design Due to the double pole generated by LC filter of the power stage, the power system has 180o phase shift , and therefore, is unstable by itself. In order to achieve accurate output voltage and fast transient
compensator is
Ve −Z f = VOUT Zin
response,compensator is employed to provide highest
To achieve the same effect as voltage amplifier,
possible bandwidth and enough phase margin.Ideally,the
the compensator of transconductance amplifier must
Bode plot of the closed loop system has crossover fre-
satisfy this condition: R 4>>2/gm. And it would be desir-
quency between1/10 and 1/5 of the switching frequency,
able if R 1||R2||R3>>1/gm can be met at the same time.
phase margin greater than 50o and the gain crossing 0dB with -20dB/decade. Power stage output capacitors usually decide the compensator type. If electrolytic
Zin
Zf C1
Vout
capacitors are chosen as output capacitors, type II compensator can be used to compensate the system, be-
R3 R2
cause the zero caused by output capacitor ESR is lower than crossover frequency. Otherwise type III compensa-
C3
C2
R4
Fb
tor should be chosen.
gm
Ve
R1
A. Type III compensator design For low ESR output capacitors, typically such as
Vref
Sanyo oscap and poscap, the frequency of ESR zero caused by output capacitors is higher than the crossover frequency. In this case, it is necessary to compensate the system with type III compensator. The follow-
Figure 12 - Type III compensator using transconductance amplifier
ing figures and equations show how to realize the type III compensator by transconductance amplifier.
FZ1 =
1 2 × π × R 4 × C2
...(6)
FZ2 =
1 2 × π × (R 2 + R 3 ) × C 3
...(7)
FP1 =
1 2 × π × R 3 × C3
...(8)
FP2 =
Rev.1.8 02/30/09
1 2 × π × R4 ×
C1 × C 2 C1 + C 2
...(9)
11
NX2838 Case 1:
FLC
