Transcript
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE
PM600CLA060 FEATURE a) Adopting new 5th generation IGBT (CSTBT) chip, which performance is improved by 1µm fine rule process. For example, typical Vce(sat)=1.8V @Tj=125°C b) I adopt the over-temperature conservation by Tj detection of CSTBT chip, and error output is possible from all each conservation upper and lower arm of IPM. • 3φ 600A, 600V Current-sense IGBT type inverter • Monolithic gate drive & protection logic • Detection, protection & status indication circuits for, shortcircuit, over-temperature & under-voltage (Fo available from all arm devices) • Acoustic noise-less 45kW/55kW class inverter application • UL Recognized Yellow Card No.E80276(N) File No.E80271
APPLICATION General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
Dimensions in mm 172
11
21 24 25 22 23 26
3-2.54
28 27
21
53.75
3.75
29 3233 30 31 34
3-2.54
36 35
21
50
3-2.54
53.75
1
2
3
4
5
6
12
12
12
12
12
12
12
17
17
17
17
17
17
(SCREWING DEPTH)
(15.5)
Terminal code 24-
0.64
36.6
6-φ2.5
35.5
8-φ5.5 MOUNTING HOLES
20 19
8-φ3.5
21
L A B E L
3-2.54
150
3.22
99 13 16 17 14 15 18
20
31.84
3-2.54
137
3.22
94.5
3-2.54
13.5
50 31.84
123
55
22
110±0.5
12
7.75
11
50 31.84
3.22
28
10
9.08
22
6.5
28
9
22
(24) 17 +1.0 –0.5 6
8
14
50±0.5
50±0.5
5.5
50±0.5
7
12-M6 NUTS
2
162
6
1. 2. 3. 4. 5. 6.
N 7. W P 8. W N 9. V P 10. V N 11. U P 12. U
13. 14. 15. 16. 17. 18.
VUPC UPFO UP VUP1 VUNC UNFO
19. 20. 21. 22. 23. 24.
UN VUN1 VVPC VPFO VP VVP1
25. 26. 27. 28. 29. 30.
VVNC VNFO VN VVN1 VWPC WPFO
31. 32. 33. 34. 35. 36.
WP VWP1 VWNC WNFO WN VWN1
Jan. 2005
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE
INTERNAL FUNCTIONS BLOCK DIAGRAM
VWNC
WN
VWN1 WNFO
VWPC
WP
WPFO
1.5k
Gnd
In
Fo
Gnd
Si
Out
VWP1
VVNC
VN
1.5k
Vcc
Gnd
OT
In
Gnd
N
Fo
VVN1
VVPC
VP
1.5k
Vcc
Si Out
W
VNFO
OT
P
Gnd
In
Fo
Gnd
Si
Out
VPFO
VVP1
VUNC
UN
UNFO
1.5k
Vcc
OT
N
Gnd
Gnd
In
Fo
VUPC
UP
UPFO
1.5k
Vcc
Si Out
V
VUN1
OT
P
Gnd
In
Fo
Gnd
Si
Out
N
VUP1
1.5k
Vcc
OT
Gnd
Gnd
In
Fo
Vcc
Si Out
U
OT
P
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol VCES ±IC ±ICP PC Tj
Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature
Condition VD = 15V, VCIN = 15V TC = 25°C TC = 25°C TC = 25°C
(Note-1)
Ratings 600 600 1200 1785 –20 ~ +150
Unit V A A W °C
Ratings
Unit
20
V
20
V
20
V
20
mA
CONTROL PART Symbol
Parameter
VD
Supply Voltage
VCIN
Input Voltage
VFO
Fault Output Supply Voltage
IFO
Fault Output Current
Condition Applied between : VUP1-VUPC, VVP1-VVPC, VWP1-VWPC VUN1-VUNC, VVN1-VVNC, VWN1-VWNC Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN-VUNC, VN-VVNC, WN-VWNC Applied between : UPFO-VUPC, VPFO-VVPC, WPFO-VWPC UNFO-VUNC, VNFO-VVNC, WNFO-VWNC Sink current at UPFO, VPFO, WPFO, UNFO, VNFO, WNFO terminals
Jan. 2005
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Parameter Supply Voltage Protected by VCC(PROT) SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Isolation Voltage Viso Symbol
Ratings
Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = +125°C Start
Unit
400
V
500
V
(Note-1)
–20 ~ +100
°C
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
–40 ~ +125 2500
°C Vrms
Applied between : P-N, Surge value
(Note-1) Tc measurement point is just under the chip.
THERMAL RESISTANCES Symbol
Condition
Parameter
Rth(j-c)Q Rth(j-c)F
Junction to case Thermal Resistances
Rth(c-f)
Contact Thermal Resistance
Inverter IGBT (per 1 element) Inverter FWDi (per 1 element) Case to fin, (per 1 module) Thermal grease applied
(Note-1) (Note-1) (Note-1)
Min. — —
Limits Typ. — —
Max. 0.07 0.11
—
—
0.014
Limits Typ. 1.7 1.8 2.6 1.0 0.2 0.4 2.2 0.6 — —
Max. 2.2 2.3 3.7 2.4 0.4 1.0 3.5 1.1 1 10
Unit
°C/W
(Note-1) Tc measurement point is just under the chip. If you use this value, Rth(f-a) should be measured just under the chips. Table 1: Tc (under the chip) measurement point is below. arm axis X Y
UP IGBT FWDi 30.5 20.4 82.8 82.8
VP IGBT FWDi 80.5 70.4 82.8 82.8
(Unit : mm)
WP IGBT FWDi 130.5 120.4 82.8 82.8
UN IGBT FWDi 19.4 29.6 27.2 27.2
7
VN IGBT FWDi 69.4 79.6 27.2 27.2
WN IGBT FWDi 119.4 129.6 27.2 27.2
13
Bottom view
Name plate side
Y X
6
1
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES
Parameter
Condition
Collector-Emitter Saturation Voltage FWDi Forward Voltage
VD = 15V, IC = 600A VCIN = 0V (Fig. 1) –IC = 600A, VD = 15V, VCIN = 15V
Switching Time
VD = 15V, VCIN = 0V↔15V VCC = 300V, IC = 600A Tj = 125°C Inductive Load
Collector-Emitter Cutoff Current
VCE = VCES, VCIN = 15V
Tj = 25°C Tj = 125°C (Fig. 2)
(Fig. 3, 4) (Fig. 5)
Tj = 25°C Tj = 125°C
Min. — — — 0.5 — — — — — —
Unit V V
µs
mA
Jan. 2005
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE
CONTROL PART Symbol
Parameter
Condition V*N1-V*NC V*P1-V*PC
ID
Circuit Current
VD = 15V, VCIN = 15V
Vth(ON) Vth(OFF) SC
Input ON Threshold Voltage Input OFF Threshold Voltage Short Circuit Trip Level Short Circuit Current Delay Time
Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN-VUNC, VN-VVNC, WN-VWNC –20 ≤ Tj ≤ 125°C, VD = 15V (Fig. 3,6)
toff(SC) OT OTr UV UVr IFO(H) IFO(L) tFO
VD = 15V
(Fig. 3,6)
Over Temperature Protection
VD = 15V Detect Tj of IGBT chip
Supply Circuit Under-Voltage Protection
–20 ≤ Tj ≤ 125°C
Fault Output Current
VD = 15V, VFO = 15V
(Note-2)
Minimum Fault Output Pulse Width
VD = 15V
(Note-2)
Trip level Reset level Trip level Reset level
Min. — — 1.2 1.7 1200
Limits Typ. 20 20 1.5 2.0 —
Max. 27 27 1.8 2.3 —
Unit mA V A
—
0.2
—
µs
135 — 11.5 — — —
145 125 12.0 12.5 — 10
— — 12.5 — 0.01 15
°C
1.0
1.8
—
V mA ms
(Note-2) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to protect it.
MECHANICAL RATINGS AND CHARACTERISTICS Symbol — — —
Condition
Parameter Mounting torque Mounting torque Weight
Main terminal Mounting part
screw : M6 screw : M5 —
Min. 3.5 2.5 —
Limits Typ. 4.0 3.0 1250
Max. 4.5 3.5 —
Unit N•m N•m g
RECOMMENDED CONDITIONS FOR USE Symbol VCC
Parameter Supply Voltage
VD
Control Supply Voltage
VCIN(ON) VCIN(OFF) fPWM
Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time
tdead
Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC, VWP1-VWPC VUN1-VUNC, VVN1-VVNC, VWN1-VWNC (Note-3) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN-VUNC, VN-VVNC, WN-VWNC Using Application Circuit of Fig. 8 For IPM’s each input signals
Recommended value ≤ 400
Unit V
15 ± 1.5
V
(Fig. 7)
≤ 0.8 ≥ 9.0 ≤ 20
kHz
≥ 3.0
µs
V
(Note-3) With ripple satisfying the following conditions: dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak
Jan. 2005
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.)
IN Fo
VCIN
Ic
V
IN Fo
VCIN (15V)
(0V)
VD (all)
–Ic
V
VD (all)
Fig. 1 VCE(sat) Test
Fig. 2 VEC Test
a) Lower Arm Switching VCIN (15V)
Fo
Signal input (Upper Arm)
trr CS
Fo
Signal input (Lower Arm)
VCIN
Ic
90%
10%
10% tc(on)
Fo
Signal input (Upper Arm)
10%
10% tc(off)
VCIN CS
VCIN (15V)
Ic
90%
VD (all)
b) Upper Arm Switching VCIN
VCE
Irr Vcc
Vcc
td(on)
tr
tf
td(off)
Fo
Signal input (Lower Arm)
(ton= td(on) + tr)
(toff= td(off) + tf)
Ic
VD (all)
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
VCIN Short Circuit Current
P, (U,V,W) A
VCIN (15V)
Constant Current
IN Fo
SC Pulse VCE
Ic
VD (all)
U,V,W, (N)
Fo toff(SC)
Fig. 5 ICES Test
Fig. 6 SC test waveform
IPM’ input signal VCIN (Upper Arm)
1.5V
0V IPM’ input signal VCIN (Lower Arm)
0V
2V
tdead
2V
1.5V
1.5V
tdead
2V
t
t
tdead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Jan. 2005
MITSUBISHI
PM600CLA060 FLAT-BASE TYPE INSULATED PACKAGE
20k
→
VD
≥10µ
VUP1 UPFO
IF
1.5k
Vcc Fo
UP
OT OUT
GND GND U
≥0.1µ
VUN1 UNFO
1.5k
1.5k
1.5k
VN
Vcc
1.5k
Vcc Fo
WP
OT OUT Si N
OT OUT
P
Si
GND GND
VWN1 1.5k
Vcc Fo
VWNC
M
In
VWPC
WN
V
GND GND
VWP1
WNFO
P
Si
In
VVNC
VD
OT OUT
GND GND
Fo
WPFO
N
In
VVN1
VD
Vcc Fo
VVPC
VD
Si
GND GND
VP
VNFO
OT OUT
In
VVP1 VPFO
Vcc Fo
UN VUNC
VD
+ –
Si
In
VUPC
VD
P
W
OT OUT Si
In GND GND
N
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler. Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type. Slow switching opto-coupler: CTR > 100% Use 6 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system.
• • • • • • •
Jan. 2005
