Pmos Irf9530

Transcript

IRF9530, RF1S9530SM Data Sheet 12A, 100V, 0.300 Ohm, P-Channel Power MOSFETs These are P-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. The high input impedance allows these types to be operated directly from integrated circuits. Formerly developmental type TA17511. Ordering Information PART NUMBER PACKAGE January 2002 Features • 12A, 100V • rDS(ON) = 0.300Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol BRAND IRF9530 TO-220AB IRF9530 RF1S9530SM TO-263AB RF1S9530 D G NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S9530SM9A. S Packaging JEDEC TO-220AB JEDEC TO-263A SOURCE DRAIN GATE DRAIN (FLANGE) ©2002 Fairchild Semiconductor Corporation DRAIN (FLANGE) GATE SOURCE IRF9530, RF1S9530SM Rev. B IRF9530, RF1S9530SM Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg IRF9530, RF1S9530SM -100 -100 -12 -7.5 -48 ±20 75 0.6 500 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to TJ = 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER BVDSS ID = -250µA, VGS = 0V, (Figure 10) -100 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V Zero Gate Voltage Drain Current SYMBOL IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge VDS = Rated BVDSS, VGS = 0V - - -25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC - - -250 µA -12 - - A - - ±100 nA VDS > ID(ON) x rDS(ON)MAX, VGS = -10V, (Figure 7) VGS = ±20V rDS(ON) ID = -6.5A, VGS = -10V, (Figures 8, 9) - 0.250 0.300 Ω gfs VDS > ID(ON) x rDS(ON) Max, ID = -6.5A (Figure 12) 2 3.8 - S td(ON) tr td(off) VDD = 50V, ID ≈ -12A, RG = 50Ω, VGS = 10V RL = 4.2Ω, (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature tf Qg(TOT) Qgs VGS = -10V, ID = -12A, VDSS= 0.8 x Rated BVDSS, (Figure 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - 30 60 ns - 70 140 ns - 70 140 ns - 70 140 ns - 25 45 nC - 13 - nC - 12 - nC - 500 - pF Gate to Drain (“Miller”) Charge Qgd Input Capacitance CISS Output Capacitance COSS - 300 - pF Reverse Transfer Capacitance CRSS - 100 - pF - 3.5 - nH - 4.5 - nH - 7.5 - nH - - 1.67 oC/W - - 62.5 oC/W Internal Drain Inductance LD VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) Measured From the Modified MOSFET Contact Screw On Tab To Symbol Showing the Center of Die Internal Devices Measured From the Drain Inductances D Lead, 6mm (0.25in) From Package to Center of Die Internal Source Inductance LS Measured From The Source Lead, 6mm (0.25in) From Header to Source Bonding Pad LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA ©2002 Fairchild Semiconductor Corporation Typical Socket Mount IRF9530, RF1S9530SM Rev. B IRF9530, RF1S9530SM Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current Pulse Source to Drain Current (Note 2) TEST CONDITIONS ISD Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode ISDM MIN TYP MAX - - -12 UNITS A - - -48 A - - -1.5 V D G S Source to Drain Diode Voltage (Note 2) TJ = 25oC, ISD = -12A, VGS = 0V, VSD (Figure 13) Reverse Recovery Time Reverse Recovery Charge trr TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 300 - ns QRR TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 1.8 - µC NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 5.2mH, RG = 25Ω, peak IAS = 12A. See Figures 15, 16. Typical Performance Curves Unless Otherwise Specified -12.0 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 -9.6 -7.2 -4.8 -2.4 0.2 0 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 25 50 75 150 125 100 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZθJC, NORMALIZED THERMAL IMPEDANCE 1 0.5 0.2 0.1 0.1 PDM 0.05 0.02 0.01 t1 t2 t2 SINGLE PULSE 0.01 10-5 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + RθJA +TC 10-4 10-1 10-3 10-2 t 1, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE ©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B IRF9530, RF1S9530SM Typical Performance Curves Unless Otherwise Specified (Continued) -100 -20 ID, DRAIN CURRENT (A) 10µs 100µs -10 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -1 10ms 100ms DC TC = 25oC ID, DRAIN CURRENT (A) VGS = -9V VGS = -10V -16 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX -12 VGS = -7V -8 VGS = -6V -4 VGS = -5V TJ = MAX RATED SINGLE PULSE -0.1 -1 VGS = -4V -10 -100 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 -1000 -20 ID(ON), ON-STATE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = -7V VGS = -9V VGS = -6V VGS = -10V -6 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX -4 VGS = -5V -2 VGS = -4V 0 0 -4 -2 -8 -6 25oC 125oC -8 -4 0 -10 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) 0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE ON RESISTANCE (Ω) rDS(ON) DRAIN TO SOURCE 2.2 0.6 0.4 VGS = - 20V 0.2 0 -30 -20 ID, DRAIN CURRENT (A) -40 -50 NOTE: Heating effect of 2µs pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT ©2002 Fairchild Semiconductor Corporation -10 FIGURE 7. TRANSFER CHARACTERISTICS VGS = -10V -10 -50 -55oC -12 2µs PULSE TEST 0 -40 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX -16 FIGURE 6. SATURATION CHARACTERISTICS 0.8 -30 VDS ≥ I D(ON) x rDS(ON) VDS, DRAIN TO SOURCE VOLTAGE (V) 1.0 -20 FIGURE 5. OUTPUT CHARACTERISTICS -10 VGS = -8V -10 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA -8 VGS = -8V 1.8 VGS = -10V, ID = -6.5A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1.4 1.0 0.6 0.2 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRF9530, RF1S9530SM Rev. B IRF9530, RF1S9530SM Typical Performance Curves Unless Otherwise Specified (Continued) 1.25 1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 800 1.15 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA 1.05 0.95 0.85 0.75 -40 0 40 80 120 600 400 COSS 200 CRSS 0 160 CISS -10 0 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE -100 TJ = -55oC TJ = 25oC TJ = 125oC 4 -30 -40 -50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ISD, DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 5 -20 VDS, DRAIN TO SOURCE VOLTAGE (V) 3 2 1 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TJ = 150oC -10 TJ = 25oC -1.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX -0.1 0 0 -4 -8 -12 -16 -20 -0.4 -0.6 ID , DRAIN CURRENT (A) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT -1.8 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 0 VGS, GATE TO SOURCE (V) -1.0 -1.2 -1.6 -0.8 -1.4 VSD, SOURCE TO DRAIN VOLTAGE (V) I D = -12A -5 - 10 VDS = -20V VDS = -50V VDS = -80V - 15 0 42 8 16 24 Qg(TOT) , TOTAL GATE CHARGE (nC) 40 FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE ©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B IRF9530, RF1S9530SM Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN - RG REQUIRED PEAK IAS + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01Ω BVDSS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL - DUT VGS + 10% 10% VDS VDD RG tf VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 17. SWITCHING TIME TEST CIRCUIT -VDS (ISOLATED SUPPLY) CURRENT REGULATOR FIGURE 18. RESISTIVE SWITCHING WAVEFORMS 0 VDS DUT 12V BATTERY 0.2µF 50kΩ 0.3µF Qgs VGS Qgd D Qg(TOT) DUT G 0 0 S IG(REF) IG CURRENT SAMPLING RESISTOR +VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation VDD IG(REF) FIGURE 20. GATE CHARGE WAVEFORMS IRF9530, RF1S9530SM Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET  VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. 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