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Preliminary Proprietary and Confidential ASSP For Power Supply Applications 1ch PFM/PWM DC/DC Converter IC with Synchronous Rectification MB39C001 Version 1.2 • DESCRIPTION The MB39C001 is current mode type 1ch synchronous rectification step down DC/DC converter IC. Switching FET, oscillator, the error amplifier, the voltage detector, and the reference voltage are built-in the BCC-18P package. External parts can be composed only of the coil and the decoupling capacitor. MB39C001 is small , can achieve a highly effective DC/DC converter in the full load range, and is an ideal built-in power supply for the portable equipment such as mobile phone/PDA. • FEATURES • High efficiency : 96%(Max) • Quiescent current : 20µA( at PFM) • Oscillation frequency : 1.0MHz( at PWM) • Output voltage : Internal setting (3bit setting)/possible outside setting • Built-in switching FET • Low ON resistance : Pch FET 0.4Ω target : Nch FET 0.3Ω target • Low Qg : 1nC or less • PACKAGES (Now developing.) 18-pin plastic BCC PKG: 2.4mm×2.7mm×0.5mm Terminal: 0.25mm×0.25mm Lead pitch : 0.45mm (LCC-18P-M05) Analog Product Division This document is preliminary description and subject to change without notice Page 1 Preliminary Proprietary and Confidential Version 1.2 • PIN DISCRIPTIONS (Pin No. is temporary. It is likely to change later.) Pin No Pin Name I/O Description 1 AVDD - 2,3 DVDD1/DVDD2 4 AGND 5,6 DGND1/DGND2 7 CNT I 8 OUT - Output feedback terminal. 9,10 LX1/LX2 O Switching terminal. The terminal LX1 and the terminal LX2 are used short. 11 VRSEL I 12 POWERGOOD 13 VSEL I 14 VSET1 I Output voltage switch terminal. L : 0.8V or 1.1V / H : setting value Output voltage setting terminal. 15 VSET2 I Output voltage setting terminal. 16 VSET3 I Output voltage setting terminal. 17 VREF O Reference voltage(1.25V) output terminal. 18 VREFIN Control block power supply terminal. - Drive block power supply terminal. - Control block ground terminal. - Drive block ground terminal. ON/OFF control terminal. Reference voltage switch terminal. (L : Internal fix / H : VREFIN terminal input) O OUT voltage detection terminal. - Error amplifier (Error Amp) non-inverted input terminal The VRSEL terminal is enabled at the "H" level. • OUTPUT VOLTAGE SETTING TABLE VSET1 L H L H L H L H VSET2 L L H H L L H H VSET3 L L L L H H H H VSEL VOUT 1.1V 1.2V 1.3V 1.5V 1.8V 2.5V 2.8V 3.3V VRSEL L H 0.8V 1.2V 1.1V 1.1V 1.5V 1.8V L CNT H Input Internal from fix VREFIN terminal L H OFF ON Analog Product Division This document is preliminary description and subject to change without notice Page 2 Preliminary Proprietary and Confidential Version 1.2 • BLOCKDIAGRAM AVDD DVDD2 DVDD1 CNT OUT ERR Amplifier R3 R4 R6 R5 Iout Comparator POWR GOOD DET SWMODE PFM/PWM Logic Control VSEL VSET1 SELECT VSET2 LX1 VSET3 LX2 L1 C1 VREF 1.25V R1 R2 VREFIN VRSEL AGND DGND2 DGND1 * VRFIN terminal can adjust the output voltage setting value to the VDA/0.6 times as much as internal setting voltage value by inputting external voltage VDA. When the AVDD,DVDD1,and DVDD2 voltage falls below the output voltage setting value, Pch MOS FET becomes turning on fixation operation. Analog Product Division This document is preliminary description and subject to change without notice Page 3 Preliminary Proprietary and Confidential Version 1.2 • ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Symbol VDD Condition Rating Unit 7 V AVDD=DVDD1=DVDD2 OUT - -0.3 to VDD V CNT, VSEL, VSET1,2,3, VRSEL - -0.3 to VDD V VREFIN - -0.3 to VDD V LX Peak current IIN - 1.3 A Power dissipation PD (540)* mW -55 to +125 °C Input voltage Storage temperature Ta≤+25°C TSTG - *When mounted on a 10cm square epoxy double-sided. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. • RECOMMENDED OPERATION CONDITIONS Parameter Symbol Condition TYP MAX Unit 2.5 3.7 5.5 V Power supply voltage VDD VREFIN voltage VRIN - 0.30 - 1.25 V ILX - - - 600 mA IPG - - - 1 mA Ta - -40 +25 +85 °C LX current POWERGOOD current Operating ambient Temperature AVDD= DVDD1=DVDD2 MIN WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. Analog Product Division This document is preliminary description and subject to change without notice Page 4 Preliminary Proprietary and Confidential Version 1.2 • ELECTRICAL CHARACTERISTICS (All devices) (Ta =+25°C, AVDD=DVDD1=DVDD2=3.7V) Parameter Pin Symbol No. Condition Min Typ Max Unit 1. All devices IVDD1 - CNT= “L” State of all circuits OFF (Note1) - - 1 µA IVDD2 - CNT= “H” Load current =0A - 20 30 µA IVDD - - TBD TBD µA IGND - - - TBD µA VTHH - - - 2.3 - V VTHL - - - 2.15 - V VHYS - - - 0.15 - V Input threshold voltage VTH - CNT,VSEL, VSET1,2,3,VRSEL 0.3 1.0 1.5 V Reference voltage VREF - VREF=0mA 1.21 1.25 1.29 V OTPH - Tj - 150 - °C OTPL - Tj - 125 - °C OTPHYS - Tj - 25 - °C Shutting down power supply current Standby power Supply current Power-on invalid current Power-on GND current UVLO threshold voltage UVLO hysteresis width Over-temperature protection Over-temperature protection hysteresis CNT= “H” Load current =600mA (Note2) CNT= “H” Load current =1mA (Note3) width Note1: Sum total of current which flows in the AVDD terminal , the DVDD1 terminal and the DVDD2 terminal. Note2: The LX1/2 terminal current is excluded from the sum total of the current which flows in the AVDD terminal the DVDD1 terminal and the DVDD2 terminal. Note3: Sum total of current which flows out from the AGND terminal , the DGND1 terminal , and the DGND2 terminal. (Continued) Analog Product Division This document is preliminary description and subject to change without notice Page 5 Preliminary Proprietary and Confidential Version 1.2 (Continued) (Power Good Block) (Ta =+25°C, AVDD=DVDD1=DVDD2=3.7V) Parameter Pin Symbol No. Condition 2. POWER GOOD Min Typ Max Unit [POWER GOOD] Output current IOL - Output voltage VOL - Rise delay time tPG - VTHHPG - VTHLPG - VHSYPG - IDET - - - 40 µA - - 0.1 V - TBD - µs (Note4) TBD 95 TBD % (Note4) TBD 93 TBD % - 2 - % - TBD TBD µA POWERGOOD=25µA - Threshold voltage Hysteresis width Internal consumption current POWERGOOD=”H” Note4 : Detection to output voltage setting value by VSET1 to VSET3. Refer to the output voltage setting table. (DC/DC Block) Parameter (Ta =+25°C, AVDD=DVDD1=DVDD2=3.7V, VOUT setting value=2.5V) Pin Symbol Condition Min Typ Max Unit No. 3. DC/DC Input current Output voltage [OUT] IREFIN VOUT - - VREFIN=0.6V, VRSEL=3.7V - - TBD µA OUT=-100mA 2.45 2.50 2.55 V The output voltage setting by VSET1 to VSET3 OUT=-100mA TBD VOUT (Note5) TBD ±% ±mV - - TBD mV - - TBD mV Input stability Line - The output voltage setting by VSET1 to VSET3 (Note5) 2.5VOUT>-600mA Note5 : Refer to the output voltage setting table. Note6 : The lower value of AVDD=DVDD1=DVDD2 is a high value of 2.5V or VOUT setting value +0.4V. (Continued) Analog Product Division This document is preliminary description and subject to change without notice Page 6 Preliminary Proprietary and Confidential Version 1.2 (Continued) Parameter PWM-PFM switch load current Peak current Oscillation frequency SW PMOS FET ON resistance SW NMOS FET ON resistance SW FET leak current Rise time (Ta =+25°C, AVDD=DVDD1=DVDD2=3.7V, VOUT setting value=2.5V) Pin Symbol Condition Min Typ Max Unit No. ISKIP - IPK - fosc - fSHORT - RPMOS TBD 200 TBD mA - 1.3 - A - 1.0 - MHz OUT=0V - 140 - kHz - LX1/2=-100mA - 0.43 - Ω RNMOS - LX1/2=100mA - 0.32 - Ω ILEAK - - - - 1.0 µA - TBD TBD µs tr - VOUT= 90% - C=10µF,R=4.3Ω, VOUT=90% Analog Product Division This document is preliminary description and subject to change without notice Page 7 Preliminary Proprietary and Confidential Version 1.2 • POWER DISSIPATION Power dissipation PD [mW] Power dissipation - Ambient temperature 540mW at 25°C 600 500 BCC18 400 300 200 210mW at 85°C 100 0 -40 -20 0 20 40 60 80 100 Ambient temperature Ta [°C] Analog Product Division This document is preliminary description and subject to change without notice Page 8 Preliminary Proprietary and Confidential Version 1.2 • PACKAGE DIMENSIONS Developing Analog Product Division This document is preliminary description and subject to change without notice Page 9 Preliminary Proprietary and Confidential Version 1.2 • APPLICATION EXAMPLE BATT AVDD DVDD1 DVDD2 VSET1 VSET2 L1 VSET3 VSEL LX1 LX2 C1 OUT CPU CNT POWER GOOD VRSEL VREFIN VREF AGND DGND1 DGND2 Example of 2.5V output by internal setting Analog Product Division This document is preliminary description and subject to change without notice Page 10 DBB Preliminary Proprietary and Confidential Version 1.2 • USAGE PRECAUTION • Printed circuit board ground lines should be set up with consideration for common impedance. • Take appropriate static electricity measures. • Containers for semiconductor materials should have anti-static protection or be made of conductive material. • After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. • Work platforms, tools, and instruments should be properly grounded. • Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. • Do not apply negative voltages. The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause abnormal operation. Analog Product Division This document is preliminary description and subject to change without notice Page 11 Preliminary Proprietary and Confidential Version 1.2 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0721, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3386 http://edevice.fujitsu.com/ North and South America FUJITSU MICROELECTRONICS, INC. 3545 North First Street, San Jose, CA 95134-1804, U.S.A. Tel: +1-408-922-9000 Fax: +1-408-922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: +1-800-866-8608 Fax: +1-408-922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Am Siebenstein 6-10, D-63303 Dreieich-Buchschlag, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://www.fujitsu-fme.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. #05-08, 151 Lorong Chuan, New Tech Park, Singapore 556741 Tel: +65-281-0770 Fax: +65-281-0220 http://www.fmap.com.sg/ F0012 ©FUJITSU LIMITED Printed in Japan All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The contents of this document may not be reproduced or copied without the permission of FUJITSU LIMITED. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipments, industrial, communications, and measurement equipments, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan. Analog Product Division This document is preliminary description and subject to change without notice Page 12