Transcript
Product Datasheet QAOC-14G4F
QSFP+ Active Optical Cable
Preliminary
Features RoHS-6 compliant High speed / high density: support up to 56 Gb/s bi-directional operation Compliant to industrial standard SFF-8436 QSFP+ active optical modules Low power consumption : less than 1.5W per end Hot-pluggable, light weight cable, small bending radius and distance up to 100 meters for easy installation and fiber management Reliable VCSEL and PIN photonic devices I2C standard management interface Excellent high speed signal integrity Automatic power down while broken cable is detected to improve eye safety
Description
Application
The QAOC-14G4F is a 56Gb/s, hot pluggable active optical cable for Infiniband and Ethernet data transmission. It provides full duplex, parallel interconnects: 4 transmitting / 4 receiving data lanes and supports distance up to 100 meters. Each QAOC-14G4F is composed of multi-channel optical transceivers in both ends and multimode fiber cable in between. This integrated optical module solution removes the complicated optical fiber interface and brings friendly and intuitive electrical-to-electrical interface to users.
Infiniband SDR (2.5GX4), DDR (5GX4) and QDR (10GX4), FDR (14GX4 ) interconnect 10G/40G Ethernet (10G/40GbE) Proprietary high speed, high density data transmission. Switch and router high speed backplane interconnect High performance computing, server and data storage.
QAOC-14G4F is designed to meet the requirements of high speed, high density and low power consumption for applications in today’s data centers.
1 DELTA ELECTRONICS, INC.
Revision: 0A 6/14/2012
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Product Datasheet QAOC-14G4F 1. Absolute Maximum Ratings Parameter Storage Temperature Storage Ambient Humidity +3.3V Power Supply
Symbol
Min
TS HA VCC3
Typ
Max
Units
-40
85
°C
0 0
85 3.6
% V
Notes
2. General Operating Characteristics (V CC3=3.135V~3.465V, TC= 0 ºC to 70 ºC, Per End) Parameter Operating Case Temperature Ambient Humidity +3.3V Supply Voltage +3.3V Supply Current Total Power Dissipation Bit rate Module Turn-on Time Input Control Voltage- High Input Control Voltage - Low Digital Output Voltage- High Digital Output Voltage- Low Clock Rate-I2C
Symbol
Min
TC HA V CC3
Max
Units
Notes
0
70
°C
[1]
5 3.135
85 3.465
% V
[2]
400 1.5 14.03 2000 Vcc+0.3 0.8 Vcc+0.3 0.8 400
mA W Gb/s ms V V
IVCC3 PD B
1
ViH ViL VoH VoL
2.0 -0.3 2.0 0
Typ
kHz
[3] [4] [5] [5] [6] [6] [7]
Notes: 1. See ordering information. The position for measuring case temperature is shown as following 2. Non-condensing 3. 4. 5. 6. 7.
31
-12
Tested with PRBS 2 -1, BER 1X10 Time from module power-on / insertion/ resetL deassert to module full functional. For all control input pins: LPMode, Reset and ModSelL For all status output pins: ModPrsL , IntL For management interface.
Case temperature measuring point
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Product Datasheet QAOC-14G4F 3. High Speed Characteristics- Transmitter (V CC3 = 3.135V ~ 3.465V, T C= 0 ºC to 70 ºC, Per End) Parameter
Symbol
Reference Differential Input Zd Impedance Differential Data Input Swing Vin_pp Differential Data Input Threshold
Min
Typ
Max
100 180
Units
Notes
Ω 600
50
mV mV
[1]
Notes: 1. Input swing to trigger TX-squelch.
4. High Speed Characteristics- Receiver (V CC3 = 3.135V ~ 3.465V, TC= 0 ºC to 70 ºC, Per End) Parameter Reference Differential Input Impedance
Symbol
Min
Zd
Typ 100
300 Pre-emphasis Pulse Duration Differential Output Swing When Squelched Rise / Fall Time (20% ~80%)
24
Units
Notes
Ω 600
mV % ps
50
mV
20 30
ps
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Max
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Product Datasheet QAOC-14G4F 5. Pin Description QSFP Module Pad Layout (Top View)
Host PCB Layout (Top View)
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Product Datasheet QAOC-14G4F Module Electrical Pin Function Definition Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Notes:
Logic
Symbol GND CML-I Tx2n CML-I Tx2p GND CML-I Tx4n CML-I Tx4p GND LVTTL-I ModSelL LVTTL-I ResetL Vcc Rx LVCMOS-I/O SCL LVCMOS-I/O SDA GND CML-O Rx3p CML-O Rx3n GND CML-O Rx1p CML-O Rx1n GND GND CML-O Rx2n CML-O Rx2p GND CML-O Rx4n CML-O Rx4p GND LVTTL-O ModPrsL LVTTL-O IntL Vcc Tx Vcc1 LVTTL-I LPMode GND CML-I Tx3p CML-I Tx3n GND CML-I Tx1p CML-I Tx1n GND
Name/Description Ground Transmitter Inverted Data Input Transmitter Non-inverted Data Input Ground Transmitter Inverted Data Input Transmitter Non-inverted Data Input Ground Module Select Module Reset +3.3V Power Supply Receiver 2-Wire Serial Interface Clock 2-Wire Serial Interface Data Ground Receiver Non-Inverted Data Output Receiver Inverted Data Output Ground Receiver Non-Inverted Data Output Receiver Inverted Data Output Ground Ground Receiver Inverted Data Output Receiver Non-Inverted Data Output Ground Receiver Inverted Data Output Receiver Non-Inverted Data Output Ground Module Present Interrupt +3.3V Power Supply Transmitter +3.3V Power Supply Low Power Mode Ground Transmitter Non-inverted Data Input Transmitter Inverted Data Input Ground Transmitter Non-inverted Data Input Transmitter Inverted Data Input Ground
Note [1]
[1]
[1]
[2] [2] [1]
[1]
[1] [1]
[1]
[1] [2] [2]
[1]
[1]
[1]
1. Module ground pins GND are isolated from the module case and chassis ground within the module. 2. Shall be pulled up with 4.7K-10Kohms to a voltage between 3.15V and 3.45V on the host board. 3. Please refer to SFF-8436 Fig. 3a for more information on interface circuit and power filtering network. 5 DELTA ELECTRONICS, INC.
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Product Datasheet QAOC-14G4F 6. Low Speed Electrical Hardware Pins In addition to 2-wire serial interface, QAOC-14G4F module has the following low speed pins for control and status: ModPrsL, IntL, LPMode, ModSelL, ResetL 6.1 ModPrsL ModPrsL is an output pin. When “low”, indicates the module is present. The ModPrsL is asserted “Low” when inserted and deasserted “High” when the module is physically absent from the host connector. 6.2 IntL IntL is an output pin. When “Low”, it indicates a possible module operational fault or a status critical to the host system. The source of the interrupt could be identified by using the 2-wire serial interface. 6.3 LPMode LPMode is a control pin. When “High”, it could be used to set the module in low power mode (<1.5W). This pin, along with Power_overide bit and Power_set bit in management interface could be used to avoid system power crash. QAOC-14G4F, however consumes less than 1.5W. Therefore this pin takes no effect. 6.4 ModSelL ModSelL is an input signal. When held low by the host, the module responds to two-wire serial communication commands. The ModSelL signal allows multiple QSFP modules to be on a single two-wire interface bus. When the ModSelL signal is “High”, the module will not respond to or acknowledge any two-wire interface communication from the host. The ModSelL signal input pin is biased to a “High” state in the module. In order to avoid conflicts, the host system must not attempt two-wire interface communications within the ModSelL deassert time after any QSFP modules are de-selected. Similarly, the host must wait for the period of the ModSelL assert time before communicating with the newly selected module. The assert and deassert periods of different modules may overlap as long as the above timing requirements are met. 6.5 ResetL The ResetL signal is pulled to Vcc in the QSFP+ module. A logic low level on the ResetL signal for longer than the minimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to their default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin is released. During the execution of a reset (t_init) the host will disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL signal with the Data_Not_Ready bit negated. Note that on power-up (including hot insertion) the module will post this completion of reset interrupt without requiring a reset.
6 DELTA ELECTRONICS, INC.
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Product Datasheet QAOC-14G4F 7. Memory Map of Management Interface Abundant functions have been implemented in QAOC-14G4F for the purpose of monitoring and control. QAOC-14G4F is designed to be compliant to SFF-8436 rev. 3.6 “QSFP+ COPPER AND OPTICAL MODULES”. There are many registers and sophisticated behaviors associated to those functions. This could facilitate the flexible use of the module by the user.
8. Mechanical Specification Parameter Module Retention Module Insertion Module Extraction Cable Pull Strength – On Axis Cable Pull Strength – Off Axis Clearance Out of IO Bezel Cable Bending Radius Cable Tensile Load (Short Term) Cable Tensile Load (Long Term) Insertion / Removal Cycles
Symbol
Min
Typ
90 0 0
Units
40 30
N N N
80
N
20
N
75 30
mm mm
100
N
60
N
50
cycles
7 DELTA ELECTRONICS, INC.
Max
Notes
Revision: 0A 6/14/2012
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Product Datasheet QAOC-14G4F 9. Mechanical Outline Dimensions
Clearance 75mm Is Required.
8 DELTA ELECTRONICS, INC.
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Product Datasheet QAOC-14G4F
10. Regulatory Compliance Feature
Reference
Electromagnetic Interference (EMI)
FCC Part15 Class B
Electrostatic Discharge (ESD)
IEC/EN 61000-4-2 MIL-STD-883E EIA-JESD22-A115-A
Laser Eye Safety
EN 60825
Component Recognition
IEC/EN 60950-1 UL60950
11. Ordering information Model No: QAOC-14G4Fx1Ay1y2 x1 Cable type
y1y2: Length
1: LSZH
03: 3 meters
2: OFNP
05: 5 meters
3: OFNR
10: 10 meters 20: 20 meters 30: 30 meters 50: 50 meters A0: 100 meters Others: customized length
11. Revision History Model No: QAOC-14G4Fx1Ay1y2 0A: Initial draft release
9 DELTA ELECTRONICS, INC.
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