R-in32m4-cl2 Programming Manual (driver Edition)

Transcript

Programming Manual R-IN32M4-CL2 Programming Manual (Driver edition) All information of mention is things at the time of this document publication, and Renesas Electronics may change the product or specifications that are listed in this document without a notice. Please confirm the latest information such as shown by website of Renesas Document number : R18UZ0038EJ0200 Issue date : Mar 16, 2016 Renesas Electronics www.renesas.com Notice 1. 2. 3. 4. 5. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 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Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. Instructions for the use of product In this section, the precautions are described for over whole of CMOS device. Please refer to this manual about individual precaution. When there is a mention unlike the text of this manual, a mention of the text takes first priority 1.Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual. -The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual. 2.Processing at Power-on The state of the product is undefined at the moment when power is supplied. -The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified. 3.Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited. -The reserved addresses are provided for the possible future expansion of functions. Do not access these addresses; the correct operation of LSI is not guaranteed if they are accessed. 4.Clock Signals After applying a reset, only release the reset line after the operating clock signal has become stable. When switching the clock signal during program execution, wait until the target clock signal has stabilized. -When the clock signal is generated with an external resonator (or from an external oscillator) during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable. ・ARM, AMBA, ARM Cortex, Thumb and ARM Cortex-M4F are a trademark or a registered trademark of ARM Limited in EU and other countries. ・Ethernet is a registered trademark of Fuji Zerox Limited. ・IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers, Inc. ・CC-Link and CC-Link IE Field are a registered trademark of CC-Link Partner Association (CLPA). ・Additionally all product names and service names in this document are a trademark or a registered trademark which belongs to the respective owners. How to use this manual 1. Purpose and Target Readers This manual is intended for users who wish to understand the functions of industrial Ethernet communications ASSP (Application Specific Standard Product) “R-IN32M4-CL2” (R9J03G019GBG) and design application systems using it. Target users are expected to understand the fundamentals of electrical circuits, logic circuits, and microcomputers. When designing an application system that includes this MCU, take all points to note into account. Points to note are given in their contexts and at the final part of each section, and in the section giving usage notes. The list of revisions is a summary of major points of revision or addition for earlier versions. It does not cover all revised items. For details on the revised points, see the actual locations in the manual. The mark “” in the text indicates the major revisions to this version. You can easily find these revisions by copying “” and entering it in the search-string box for the PDF file. Literature Literature may be preliminary versions. Note, however, that the following descriptions do not indicate "Preliminary". Some documents on cores were created when they were planned or still under development. So, they may be directed to specific customers. Last four digits of document number (described as ****) indicate version information of each document. Please download the latest document from our web site and refer to it. Documents related to R-IN32M4-CL2 Document Name Document Number R-IN32M4-CL2 User’s Manual R18UZ0033EJ**** R-IN32M4-CL2 User’s Manual: Peripheral Modules R18UZ0035EJ**** R-IN32M4-CL2 User’s Manual: Gigabit Ethernet PHY R18UZ0043EJ**** R-IN32M4-CL2 Programming Manual: Driver (this manual) R18UZ0038EJ**** R-IN32M4-CL2 Programming Manual: OS R18UZ0040EJ**** R-IN32 Series User's Manual CC-Link Remote Device Station R18UZ0056EJ**** 2. Notation of Numbers and Symbols Weight in data notation: Left is high-order column, right is low-order column Active low notation: xxxZ (capital letter Z after pin name or signal name) or xxx_N or xxnx (capital letter _N after pin name or signal name) (pin name or signal name contains small letter n) Note: explanation of (Note) in the text Caution: Item deserving extra attention Remark: Supplementary explanation to the text Numeric notation: Binary … xxxx , xxxxB or n’bxxxx (n bits) Decimal … xxxx Hexadecimal … xxxxH or n’hxxxx (n bits) Prefixes representing powers of 2 (address space, memory capacity): K (kilo)… 210 = 1024 M (mega)… 220 = 10242 G (giga)… 230 = 10243 Data Type: Word … 32 bits Halfword … 16 bits Byte … 8 bits Contents 1. 2. Outline ........................................................................................................................................................... 1 1.1 Construction........................................................................................................................................................ 1 1.2 Development Environment ................................................................................................................................. 2 File Construction ............................................................................................................................................ 3 2.1 2.1.1 Directory Construction .............................................................................................................................. 3 2.1.2 ./Device/Renesas/RIN32M4/Include : Include Files.................................................................................. 3 2.1.3 ./Device/Renesas/RIN32M4/Library : Library Files.................................................................................. 4 2.1.4 ./Device/Renesas/RIN32M4/Source : Source Files ................................................................................... 4 2.2 3. 4. 5. 6. IAR Embedded Workbench for ARM ................................................................................................................ 3 ARM μVision ............................................................................................................................................. 7 2.2.1 Directory Construction .............................................................................................................................. 7 2.2.2 ./Boards : Sample Application ................................................................................................................... 7 2.2.3 ./Device : R-IN32M4-CL2 Specific File.................................................................................................... 8 2.2.4 ./Flash : Flash Algorithm ......................................................................................................................... 10 2.2.5 ./Middleware : Middleware Files ............................................................................................................. 10 Software Development Procedure .............................................................................................................. 11 3.1 Design Flows .................................................................................................................................................... 11 3.2 Memory Map .................................................................................................................................................... 12 3.2.1 Memory Map ........................................................................................................................................... 12 3.2.2 Program Allocation Example ................................................................................................................... 16 Data Type and Macro .................................................................................................................................. 17 4.1 Data Type.......................................................................................................................................................... 17 4.2 Macro Definition .............................................................................................................................................. 18 4.2.1 Constants ................................................................................................................................................. 18 4.2.2 Conditional Compile Definition .............................................................................................................. 18 R-IN32M4-CL2 Register Definition .............................................................................................................. 19 5.1 APB Peripheral Register ................................................................................................................................... 19 5.2 AHB Peripheral Register .................................................................................................................................. 20 Driver ........................................................................................................................................................... 21 6.1 Driver Function Lists ........................................................................................................................................ 21 Contents-1 6.2 32-bit Timer (TAUJ2) Control.......................................................................................................................... 23 6.2.1 Initialization of TAUJ2 System Timer (Channel-0) ................................................................................ 23 6.2.2 Initialization of TAUJ2 Interval Timer .................................................................................................... 24 6.2.3 Initialization of TAUJ2 One-count Timer (Hardware Trigger) ............................................................... 25 6.2.4 Start TAUJ2 Timer .................................................................................................................................. 26 6.2.5 Stop TAUJ2 Timer .................................................................................................................................. 27 6.2.6 Check TAUJ2 Timer Activation .............................................................................................................. 28 6.3 UART Control .................................................................................................................................................. 29 6.3.1 UART Module Initialization .................................................................................................................... 29 6.3.2 Transmission of 1-byte Character Data in UART.................................................................................... 30 6.3.3 Receive of 1-byte Character Data in UART ............................................................................................ 31 6.3.4 Presence Confirmation of Receive Data .................................................................................................. 32 6.4 IIC Control ........................................................................................................................................................ 33 6.4.1 Initialization of IIC Controller ................................................................................................................. 33 6.4.2 Start Condition Transmission .................................................................................................................. 35 6.4.3 Stop Condition Transmission ................................................................................................................... 36 6.4.4 Transmit 1-byte Chracter ......................................................................................................................... 37 6.4.5 Receive 1-byte Chracter........................................................................................................................... 38 6.5 CSI Control ....................................................................................................................................................... 39 6.5.1 Initialization of CSI Controller ................................................................................................................ 39 6.5.2 Transmit 1-byte Character ....................................................................................................................... 41 6.5.3 Receive 1-byte Chracter........................................................................................................................... 42 6.5.4 Confirmation of Transmit Data (for Slave).............................................................................................. 43 6.5.5 Confirmation of Receive Data (for Slave) ............................................................................................... 44 6.5.6 Conversion of Tx/Rx Mode (for Slave) ................................................................................................... 45 6.6 6.6.1 6.7 DMA Control .................................................................................................................................................... 46 Memory Copy (DMA Transfer)............................................................................................................... 46 Serial FlashROM Control ................................................................................................................................. 47 6.7.1 Initialization of SPI Bus Controller (Normal Read) ................................................................................ 47 6.7.2 Initialization of SPI Bus Controller (Fast Read Dual I/O) ............................................................... 48 6.7.3 Initialization of SPI Bus Controller (Fast Read Quad I/O) .............................................................. 49 6.7.4 Data Write for SPI Bus ............................................................................................................................ 50 6.7.5 Data Read from SPI Bus .......................................................................................................................... 51 6.8 Watchdog Timer Control .................................................................................................................................. 52 6.8.1 Initialization of Watchdog Timer............................................................................................................. 52 6.8.2 Initialization of Watchdog Timer (Enable 75% Interrupt) ....................................................................... 53 6.8.3 Start of Watchdog Timer ......................................................................................................................... 54 6.8.4 Count Clear .............................................................................................................................................. 55 6.8.5 Reset Waiting........................................................................................................................................... 56 Contents-2 6.9 6.9.1 Initialization of TAUD Interval Timer..................................................................................................... 57 6.9.2 Initialization of TAUD One-count Timer (Hardware Trigger) ................................................................ 58 6.9.3 Start TAUD Timer ................................................................................................................................... 59 6.9.4 Stop TAUD Timer ................................................................................................................................... 60 6.9.5 Check TAUD Timer Activation............................................................................................................... 61 6.10 A/D Converter Module Initialization (Software Trigger) ........................................................................ 62 6.10.2 A/D Converter Module Initialization (Hardware Trigger) ....................................................................... 63 6.10.3 Start A/D Convert .................................................................................................................................... 64 6.10.4 Stop A/D Convert .................................................................................................................................... 65 6.10.5 Read Result of A/D Convert .................................................................................................................... 66 6.11.1 Initialization of GbE-PHY ....................................................................................................................... 67 7.1 Lists of Middleware Function ........................................................................................................................... 68 7.2 Parallel FlashROM Control .............................................................................................................................. 69 7.2.1 Initialization of Parallel FlashROM Controller........................................................................................ 69 7.2.2 Data Write................................................................................................................................................ 70 7.2.3 Data Read................................................................................................................................................. 71 7.2.4 Data Erase ................................................................................................................................................ 72 7.2.5 CFI Data Read ......................................................................................................................................... 73 Serial FlashROM Control ......................................................................................................................... 74 7.3.1 Initialization of Serial FlashROM Controller (Normal Read) ................................................................. 74 7.3.2 Initialization of Serial FlashROM Controller (Fast Read Dual I/O) ................................................ 75 7.3.3 Initialization of Serial FlashROM Controller (Fast Read Quad I/O) ............................................... 76 7.3.4 Data Program to Serial FlashROM .......................................................................................................... 77 7.3.5 Data Read from Serial FlashROM ........................................................................................................... 78 7.3.6 Data Erase of Serial FlashROM ............................................................................................................... 79 Example of Application ................................................................................................................................ 80 8.1 9. GbE-PHY Control ............................................................................................................................................ 67 Middleware .......................................................................................................................................... 68 7.3 8. A/D Converter Control ..................................................................................................................................... 62 6.10.1 6.11 7. 16-bit Timer (TAUD) Control .......................................................................................................................... 57 OS-less Sample ................................................................................................................................................. 80 8.1.1 Flow of OS-less Sample .......................................................................................................................... 80 8.1.2 Result of Implementation......................................................................................................................... 81 Usage Note .................................................................................................................................................. 83 Contents-3 Contents of figures Figure 1.1 Layer Construction Diagram of Sample Software ................................................................................ 1 Figure 3.1 File Relation Diagram ......................................................................................................................... 11 Figure 3.2 Memory Map (Over Whole) ............................................................................................................... 12 Figure 3.3 Memory Map (APB Register Area) .................................................................................................... 13 Figure 3.4 Memory Map (External Memory Area) .............................................................................................. 14 Figure 3.5 Memory Map (CC-Link Master Area) ................................................................................................ 14 Figure 3.6 External MCU Interface Space ........................................................................................................... 15 Figure 3.7 Program Allocation Example .............................................................................................................. 16 Figure 8.1 Flow Chart of OS-less Sample ............................................................................................................ 80 Contents-4 Contents of tables Table 1.1 List of Software Development Tools (Tool Chain) .......................................................................... 2 Table 2.1 Directory Construction of IAR Embedded Workbench for ARM ............................................................ 3 Table 2.2 File Construction of Include Directory ..................................................................................................... 3 Table 2.3 File Construction of Library Directory ..................................................................................................... 4 Table 2.4 Directory Construction of Source Directory ............................................................................................. 4 Table 2.5 File Construction of Driver Directory ....................................................................................................... 4 Table 2.6 File Construction of Middleware Directory .............................................................................................. 5 Table 2.7 Directory Construction of Sample Application ......................................................................................... 6 Table 2.8 File Construction of Sample Application Directory.................................................................................. 6 Table 2.9 File Construction of Templates Directory ................................................................................................. 6 Table 2.10 Directory Construction of ARM μVision.............................................................................................. 7 Table 2.11 Directory Construction of Boards ......................................................................................................... 7 Table 2.12 Directory Construction of R-IN32M4-CL2 Specific File ..................................................................... 8 Table 2.13 File Construction of Driver Directory ................................................................................................... 8 Table 2.14 File Construction of GbE-PHY Directory ............................................................................................. 9 Table 2.15 File Construction of HW-RTOS Directory ........................................................................................... 9 Table 2.16 File Construction of Include Directory ................................................................................................. 9 Table 2.17 File Construction of Source Directory .................................................................................................. 9 Table 2.18 File Construction of Flash Directory................................................................................................... 10 Table 2.19 File Construction of Middleware Directory ........................................................................................ 10 Table 4.1 Data Type ................................................................................................................................................ 17 Table 4.2 Constant (General) .................................................................................................................................. 18 Table 4.3 Constant (Systeml) .................................................................................................................................. 18 Table 4.4 Constant (Error Code) ............................................................................................................................. 18 Table 4.5 Macro Define For Compile With Condition ........................................................................................... 18 Table 5.1 APB Peripheral Register Definition ........................................................................................................ 19 Table 5.2 AHB Peripheral Register Definition ....................................................................................................... 20 Table 6.1 32-bit Timer (TAUJ2) Driver Function List ........................................................................................... 21 Table 6.2 UART Driver Function List .................................................................................................................... 21 Table 6.3 IIC Driver Function List ......................................................................................................................... 21 Table 6.4 CSI Driver Function List......................................................................................................................... 21 Table 6.5 DMAC Driver Function List ................................................................................................................... 22 Table 6.6 Serial FlashROM Driver Function List ........................................................................................... 22 Table 6.7 WDT Driver Function List ...................................................................................................................... 22 Table 6.8 16-bit Timer (TAUD) Driver Function List ............................................................................................ 22 Table 6.9 A/D Converter Driver Function List ....................................................................................................... 22 Table 6.10 GbE-PHY Driver Function List .......................................................................................................... 22 Table 7.1 Parallel FlashROM Driver Function List ................................................................................................ 68 Table 7.2 Serial FlashROM Driver Function List ................................................................................................... 68 Contents-5 R18UZ0038EJ0200 R-IN32M4-CL2 Programming Manual (Driver edition) 1. Mar 16, 2016 Outline Some sample software codes for R-IN32M4-CL2 have been prepared to develop software as soon as possible. In this document, the operations of driver, the middleware's specification and developer tool-dependent part (Startup routines) for the several functions of R-IN32M4-CL2 are described. 1.1 Construction The layer structure diagram of sample software is shown below. Sample・soft(Renesas) Layer structure FA Protocol (3rd Party) APL Application program Middleware Device Net CAN open Serial Flash Memory Protocol Stack Driver Device (H/W) Ether Net/IP Profinet TCP/ UDP Startup routine INTC (CMSIS) Cortex-M4F HWRTOS DMAC HWRTOS DMAC WDT WDT 32-bit Timer (TAUJ2) UART 32-bit Timer (TAUJ2) UART I2C I2C Serial Flash MEMC CSI Serial Flash MEMC CSI CCLink IE CCLink CCLink IE CCLink Ethernet MAC A/D Converter 16-bit Timer (TAUD) CAN A/D Converter 16-bit Timer (TAUD) CAN Ethernet Switch Ethernet MAC Ethernet Switch R-IN32M4-CL2 Figure 1.1 Layer Construction Diagram of Sample Software R18UZ0038EJ0200 Mar 16, 2016 Page 1 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 1.2 1. Outline Development Environment The explanation of software development tools follows. ARM® Cortex Microcontroller Software Interface Standard (CMSIS) V4.50 is adopted in this sample software. Regarding the detailed information, please refer to the documentation of CMSIS. Table 1.1 List of Software Development Tools (Tool Chain) Tool chain IAR IDE Compiler Debugger ICE Embedded Workbench Embedded Workbench Embedded Workbench I-jet for ARM V7.40.7 for ARM V7.40.7 for ARM V7.40.7 JTAGjet-Trace-CM (IAR Systems) (IAR Systems) (IAR Systems) (IAR Systems) KEIL μVision V5.18.0.0 μVision V5.18.0.0 μVision V5.18.0.0 ULINK2 MDK-ARM (ARM) (ARM) (ARM) ULINKpro GNU - T.B.D T.B.D (ARM) R18UZ0038EJ0200 Mar 16, 2016 T.B.D Page 2 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2. 2. File Construction File Construction In this chapter, both the directory construction and the file construction of sample software follows. 2.1 IAR Embedded Workbench for ARM 2.1.1 Directory Construction Table 2.1 Directory Construction of IAR Embedded Workbench for ARM Directory Contents ./ Directory of sample software ./CMSIS Directory of related-definition for Cortex-M4F: equal to CMSIS provided by ARM ./Device Directory of device specific file ./Device/Renesas/RIN32M4 Directory of R-IN32M4-CL2 specific file ./Device/Renesas/RIN32M4/Include Directory of include file ./Device/Renesas/RIN32M4/Library Directory of library file ./Device/Renesas/RIN32M4/Source Directory of source file 2.1.2 ./Device/Renesas/RIN32M4/Include : Include Files The file construction of "Include" follows. Table 2.2 File Construction of Include Directory Directory File Contents ./adc/ adc.h Prototype declaration of A/D converter driver ./csi/ csi.h Prototype declaration of CSI driver ./dmac/ dmac.h Prototype declaration of DMA driver ./ether/ ether.h Prototype declaration of GbE-PHY driver ./iic/ iic.h Prototype declaration of I2C driver ./sromc/ sromc.h Prototype declaration of serial FlashROM driver ./taud/ taud.h Prototype declaration of 16-bit timer (TAUD) driver ./timer/ timer.h Prototype declaration of 32-bit timer (TAUJ2) driver ./uart/ uart.h Prototype declaration of UART driver ./wdt/ wdt.h Prototype declaration of WDT driver ./ errcodes.h Error definition file itron.h ITRON general definition file (data type, constant value, macro) kernel.h Main function definition file (service call, data type, constant value, macro) RIN32M4.h Device definition file for R-IN32M4-CL2 system_RIN32M4.h System information definition based on CMSIS R18UZ0038EJ0200 Mar 16, 2016 Page 3 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.1.3 2. File Construction ./Device/Renesas/RIN32M4/Library : Library Files The file construction of "Library" follows. Table 2.3 File Construction of Library Directory Directory ./IAR/ 2.1.4 File Contents libos.a H/W-RTOS driver library libEtherPHY.a GbE-PHY driver library ./Device/Renesas/RIN32M4/Source : Source Files The directory construction of "Source" follows. Table 2.4 Directory Construction of Source Directory Directory Contents ./Driver Drivers ./Middleware Middleware ./Project Sample application ./Template Startup files 2.1.4.1 ./Device/Renesas/RIN32M4/Source/Driver : Driver Files The source file construction of "Driver" follows. Table 2.5 File Construction of Driver Directory Directory File Contents ./adc/ adc.c A/D converter driver ./csi/ csi.c CSI driver ./dmac/ dmac.c DMAC driver ./iic/ iic.c IIC driver ./sromc/ sromc.c Serial FlashROM Driver ./taud/ taud.c 16-bit timer (TAUD) driver ./timer/ timer.c 32-bit timer (TAUJ2) driver ./uart/ uart.c UART driver ./wdt/ wdt.c WDT driver R18UZ0038EJ0200 Mar 16, 2016 Page 4 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.1.4.2 2. File Construction ./Device/Renesas/RIN32M4/Source/Middleware : Middleware Files The source file construction of "Middleware" follows. Table 2.6 File Construction of Middleware Directory Directory ./flash/ ./sflash/ File Contents flash.c Parallel FlashROM middleware sample source flash.h Parallel FlashROM middleware header file sflash.c Serial FlashROM middleware sample source sflash.h Serial FlashROM middleware header file R18UZ0038EJ0200 Mar 16, 2016 Page 5 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.1.4.3 2. File Construction ./Device/Renesas/RIN32M4/Source/Project : Sample Application The sample application construction follows. Regarding the operation description of sample application, please refer to "Chapter 8 Example of ". Table 2.7 Directory Construction of Sample Application Directory Contents ./TS-R-IN32M4-CL2 Directory of sample application for Tessera Technologies’ TS-R-IN32M4-CL2 ./TS-R-IN32M4-CL2/board_init.c Board-dependent setting source file ./TS-R-IN32M4-CL2/board_init.h Board-dependent setting header file ./TS-R-IN32M4-CL2/osless_sample OS-less sample application ./IAR_StarterKit_CL2 Directory of sample application for IAR Systems’ Starter Kit ./IAR_StarterKit_CL2/board_init.c Board-dependent setting source file ./IAR_StarterKit_CL2/board_init.h Board-dependent setting header file ./IAR_StarterKit_CL2/osless_sample OS-less sample application Table 2.8 File Construction of Sample Application Directory Directory File ./osless_sample/ Contents main.c Main process source file ./osless_sample/IAR/ main.eww 2.1.4.4 IAR project file main.ewd IAR project associated file main.ewp IAR project associated file boot_norflash.icf Linker scripts (boot code : FlashROM allocated) iram.icf Linker scripts (boot code : instruction RAM allocated) boot_serialflash.icf Linker scripts (boot code : serial FlashROM allocated) init.mac Debugger macro script file ./Device/Renesas/RIN32M4/Source/Templates : Startup Files The source file construction of "Templates" follows. Table 2.9 File Construction of Templates Directory Directory ./Templates/IAR/ ./Templates/ R18UZ0038EJ0200 Mar 16, 2016 File Contents cstartup_M.c Startup file (for IAR) vectors_M.c Vector definition file vectors_rom.c Vector definition file (for ROM boot) syscalls.c To replace library functions (for IAR) system_RIN32M4.c Startup file (common) Page 6 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.2 2. File Construction ARM μVision 2.2.1 Directory Construction Table 2.10 Directory Construction of ARM μVision Directory Contents ./Boards Directory of sample software ./Device Directory of R-IN32M4-CL2 specific file ./Document Directory of document file ./Flash Directory of flash programming algorithm ./Images Directory of image file ./Middleware Directory of middleware file ./SVD Directory of device description file ./Keil.R-IN32M4_DFP.pdsc Package description file 2.2.2 ./Boards : Sample Application The sample application construction follows. Regarding the operation description of sample application, refer to "Chapter 8 Example of Application" Table 2.11 Directory Construction of Boards Directory ./Tessera/TS-R-IN32M4-CL2/ File RTE osless_sample/ Contents Directory of auto generated Run-Time-Environment component configuration file Abstract.txt Abstract of sample application board_init.c Board-dependent setting source file board_init.h Board-dependent setting header file boot_extMem.sct Boot scripts (boot code : FlashROM allocated) boot_extSPI.sct Boot scripts (boot code : serial FlashROM allocated) boot_intRAM.sct Boot scripts (boot code : instruction RAM allocated） main.c Main process source file osless_sample.uvguix μVision project associated file osless_sample.uvoptx μVision project associated file osless_sample.uvprojx μVision project file R18UZ0038EJ0200 Mar 16, 2016 readme_E.txt Desctiption of sample application Retarget.c Retargetting file for low level functions (for ARM) Serial.c Low level serial routines Serial.h Low level serial definitions Page 7 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.2.3 2. File Construction ./Device : R-IN32M4-CL2 Specific File Table 2.12 Directory Construction of R-IN32M4-CL2 Specific File Directory Contents ./Driver Directory of driver file ./GbEthPHY Directory of H/W-RTOS library ./HW-RTOS Directory of include file ./Include Directory of Gigabit Ethernet PHY (GbE-PHY) library ./Source Directory of source file 2.2.3.1 ./Device/Driver : Driver Files The file construction of "Driver" follows. Table 2.13 File Construction of Driver Directory Directory ./Include/ ./Source/ File Contents adc/ adc.h Prototype declaration of A/D converter driver csi/ csi.h Prototype declaration of CSI driver dmac/ dmac.h Prototype declaration of DMAC driver iic/ iic.h Prototype declaration of I2C driver sromc/ sromc.h Prototype declaration of serial FlashROM driver taud/ taud.h Prototype declaration of 16-bit timer (TAUD) driver timer/ timer.h Prototype declaration of 32-bit timer (TAUJ2) driver uart/ uart.h Prototype declaration of UART driver wdt/ wdt.h Prototype declaration of WDT driver adc/ adc.c A/D converter driver csi/ csi.c CSI driver dmac/ dmac.c DMAC driver iic/ iic.c I2C driver sromc/ sromc.c Serial FlashROM driver taud/ taud.c 16-bit timer (TAUD) driver timer/ timer.c 32-bit timer (TAUJ2) driver uart/ uart.c UART driver wdt/ wdt.c WDT driver R18UZ0038EJ0200 Mar 16, 2016 Page 8 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.2.3.2 2. File Construction ./Device/GbEthPHY : GbE-PHY Library Files The file construction of "GbEthPHY" follows. Table 2.14 File Construction of GbE-PHY Directory Directory File Contents ./Include/ ether_phy_init.h Prototype declaration of GbE-PHY driver ./Library/ libEtherPHY.lib GbE-PHY driver library 2.2.3.3 ./Device/HW-RTOS : HW-RTOS Library Files The file construction of "HW-RTOS" follows. Table 2.15 File Construction of HW-RTOS Directory Directory ./Config/ File Contents kernel_cfg.c HW-RTOS kernel configuration file kernel_id.h Header file fo kernel_cfg.c ./Include/ kernel.h Main function definition file (service call, data type, constant value , macro) ./Library/ libos.lib H/W-RTOS driver library 2.2.3.4 ./Device/Include : Include Files The file construction of "Include" follows. Table 2.16 File Construction of Include Directory Directory File ./ 2.2.3.5 Contents errcodes.h Error definition file itron.h ITRON general definition file (data type, constant value macro) RIN32M4.h Device definition file for R-IN32M4-CL2 system_RIN32M4.h System information definition based on CMSIS ./Device/Source : Source Files The file construction of "Source" follows. Table 2.17 File Construction of Source Directory Directory ./ARM/ ./ R18UZ0038EJ0200 Mar 16, 2016 File Contents boot_extMem.sct Boot scripts (boot code : FlashROM allocated) boot_extSPI.sct Boot scripts (boot code : serial FlashROM allocated) boot_intRAM.sct Boot scripts (boot code : instruction RAM allocated） startup_RIN32M4.c Startup file (for ARM) system_RIN32M4.c Startup file (common) Page 9 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 2.2.4 2. File Construction ./Flash : Flash Algorithm The file construction of "Flash" follows. Table 2.18 File Construction of Flash Directory Directory File ./R-IN32M4_MX25L6433F/ ./R-IN32M4_S29GL128S/ ./ 2.2.5 Contents FlashDev.c Device description file FlashPrg.c Flash programming functions R-IN32M4_MX25L6433F.uvgui Project associated file R-IN32M4_MX25L6433F.uvoptx Project associated file R-IN32M4_MX25L6433F.uvprojx Project file for MX25L6433F sromc.c Serial FlashROM driver sromc.h Prototype declaration of serial FlashROM driver Target.lin Linker control file FlashDev.c Device description file FlashPrg.c Flash programming functions R-IN32M4_S29GL128S.uvgui Project associated file R-IN32M4_S29GL128S.uvoptx Project associated file R-IN32M4_S29GL128S.uvprojx Project file for S29GL128S Target.lin Linker control file FlashOS.h FlashOS heder file R-IN32M4_MX25L6433F.FLM Flash algorithm for MX25L6422F R-IN32M4_S29GL128S.FLM Flash algorithm for S29GL128S ./Middleware : Middleware Files The file construction of "Middleware" follows. Table 2.19 File Construction of Middleware Directory Directory File Contents ./Include/flash/ flash.h Parallel FlashROM middleware header file ./Include/sflash/ sflash.h Serial FlashROM middleware header file ./Source/flash/ flash.c Parallel FlashROM middleware sample source ./Source/sflash/ sflash.c Serial FlashROM middleware sample source R18UZ0038EJ0200 Mar 16, 2016 Page 10 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3. 3. Software Development Procedure Software Development Procedure In this chapter, a series of procedures about the software development is explained. 3.1 Design Flows New files made by user Application program files .c .c .c Files modified by user (reference file is provided as a sample) Startup routine files startup_RIN32M4.c system_RIN32M4.c Compile Object files Link information file .o .o .o .icf /.sct Make file or Integrated Environment Makefile Link Files made by user Execution file Files provided by Renesas .out / .axf Figure 3.1 File Relation Diagram R18UZ0038EJ0200 Mar 16, 2016 Page 11 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3.2 3.2.1 3. Software Development Procedure Memory Map Memory Map FFFF FFFFH E000 0000H DFFF FFFFH 4400 0000H 43FF FFFFH 4200 0000H 400A FFFFH Cortex-M4F System level area (512 Mbytes) 400A 8000H Reserved Reserved Synchronous burst MEMC control registers (8 Kbytes) Reserved 400A 4800H Bitband alias area (32 Mbytes) CC-Link (master/slave) 400A 4400H Bridge control registers (1 Kbyte) CC-Link IE Field Network 400A 4000H Bridge control registers (1 Kbyte) Reserved 4014 0000H 4013 FFFFH 4010 0000H Reserved 400A 3800H CC-Link IE field (intelligent device station) area (256 Kbytes) 400A 3400H Reserved 400A 3000H 400F C000H 400F BFFFH CC-Link remote device station area (4 Kbytes) 400F B000H 400F AFFFH CC-Link Master I/O 400F A000H 400F 9FFFH 400F 8000H 400A 2C00H area (4 Kbytes) 400A 2800H CC-Link Master memory area (8 Kbytes) 400A 2400H 400A 2000H 4009 2000H Reserved System area 400B 0000H 400A FFFFH 4008 0000H 4007 FFFFH 4000 0000H 4009 1000H 4009 0000H AHB peripheral registers area (192 Kbytes) 4008 0000H EXT port (1 Kbyte) Real Time port (1 Kbyte) GPIO (1 Kbyte) DMA controller RTPORT control registers area (1 Kbyte) DMA controller control registers area (1 Kbyte) Serial flash ROM memory controller control registers area (1 Kbyte) Asynchronous SRAM MEMC control registers area (1 Kbyte) Reserved QINT BUFID (4K Kbytes) Giga bit Ether (4 Kbytes) HW-RTOS (64 Kbytes) APB peripheral registers Area (512 Kbytes) Reserved 22FF FFFFH 2200 0000H 2008 0000H 2007 FFFFH 2000 0000H 1FFF FFFFH 1000 0000H 0FFF FFFFH 0800 0000H 040C 0000H 040B FFFFH 0400 0000H 03FF FFFFH 0200 0000H 000C 0000H 000B FFFFH 0000 0000H Bitband alias area (16 Mbytes) Reserved Data RAM area (512 Kbytes) External memory area (256 Mbytes) Buffer memory space (128 Mbytes) Reserved Instruction RAM mirror area (768 Kbytes) iCode and dCode area Serial flash ROM area (32 Mbytes) Reserved Instruction RAM area (768 Kbytes) Figure 3.2 Memory Map (Over Whole) R18UZ0038EJ0200 Mar 16, 2016 Page 12 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3. Software Development Procedure 4007 FFFFH ETHER SWITCH control registers area (64 Kbytes) 4007 0000H Reserved 4004 0000H 4002 0000H 4001 0000H CAN1 area (128 Kbytes) CAN0 area (128 Kbytes) System registers area (64 Kbytes) Reserved 4000 0E00H 4000 0D00H ADC (128 bytes) PIC (256 bytes) Reserved 4000 0C00H 4000 0800H TAPA (64 bytes) Timer 1 (TAUD) (1 Kbyte) Reserved 4000 0700H 4000 0600H 4000 0500H 4000 0400H Reserved 400B 0000H 400A FFFFH AHB peripheral registers area (192 Kbytes) 4008 0000H 4007 FFFFH APB peripheral registers area 4000 0000H 4000 0300H 4000 0200H (512 Kbytes) 4000 0100H Reserved 4000 0000H Watchdog timer (16 bytes) IIC1 (64 bytes) IIC0 (256 bytes) UART1 (256 bytes) UART0 (256 bytes) CSI1 (256 bytes) CSI0 (256 bytes) Timer 0 (TAUJ2) (256 bytes) Figure 3.3 Memory Map (APB Register Area) R18UZ0038EJ0200 Mar 16, 2016 Page 13 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3. Software Development Procedure 1FFF FFFFH CSZ3 area (64 Mbytes) 1C00 0000H 1BFF FFFFH 2008 0000H 2007 FFFFH 2000 0000H 1FFF FFFFH 1000 0000H 0FFF FFFFH 0800 0000H CSZ2 area (64 Mbytes) Reserved Data RAM area (512 Kbytes) External memory area (256 Mbytes) Buffer memory area (128 Mbytes) 1800 0000H 17FF FFFFH CSZ1 area (64 Mbytes) 1400 0000H 13FF FFFFH CSZ0 area (64 Mbytes) 1000 0000H Reserved Figure 3.4 Memory Map (External Memory Area) 400F AFFFH 400F A37FH 400F A100H Reserved CC-Link Master I/O area (4 Kbytes) 領域（4K） Reserved 400F 9CFFH 400F 9000H Reserved 400F BFFFH 400F B000H 400F AFFFH 400F A000H 400F 9FFFH 400F 8000H CC-Link remote device station area (4 Kbytes) CC-Link Master I/O area (4 Kbytes) CC-Link Master memory area (8 Kbytes) 400F 8C00H 400F 8B9BH 400F 8800H 400F 84FFH 400F 8400H 400F 839BH 400F 8000H CC-Link Master memory area receive buffer (3328 bytes) Reserved CC-Link Master memory area PAT1 (256 bytes) Reserved CC-Link Master memory area transmit buffer 2 (924 bytes) Reserved CC-Link Master memory area PAT0 (256 bytes) Reserved CC-Link Master memory area transmit buffer 1 (924 bytes) Reserved Figure 3.5 Memory Map (CC-Link Master Area) R18UZ0038EJ0200 Mar 16, 2016 Page 14 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3. Software Development Procedure Internal SRAM space 1F FFFFH CC-Link IE Field (intelligent device station) area (256 Kbytes) 13 FFFFH 2 Mbytes 10 0000H 00 0000H MCU space 1F FFFFH 18 0000H 17 FFFFH 4017 FFFFH Reserved 14 0000H 13 FFFFH 10 0000H 0F FFFFH 0F FF00H 0F A000H 0F 9FFFH 0F 8000H Reserved 4014 0000H CC-Link IE Field (intelligent device station) area (256 Kbytes) HOSTIF registers area (256 bytes) Reserved 0F C000H 0F BFFFH CC-Link remote device station area (4 Kbytes) 0F B000H 0F AFFFH CC-Link Master I/O 2Mバイト Internal AHB space Data RAM area (512 Kbytes) 400F FF00H Reserved 400F C000H CC-Link remote device station 400F BFFFH area (4 Kbytes) 400F B000H 400F AFFFH CC-Link Master I/O area (4 Kbytes) area (4 Kbytes) CC-Link Master memory area (8 Kbytes) CC-Link Master memory area (8 Kbytes) 400F A000H 400F 9FFFH 400F 8000H Reserved 400F 0000H 400E FFFFH Reserved 0D FFFFH System registers area (64 Kbytes) 0D 0000H 0C FFFFH AHB peripheral registers area (upper 52 Kbytes) 0C 3000H 0C 0000H 0B FFFFH 00 0000H 4 Gbytes 400E 0000H AHB peripheral registers area 400A FFFFH (upper 52 Kbytes) 400A 3000H Reserved Instruction RAM area (768 Kbytes) System registers area (64 Kbytes) Data RAM area (512 Kbytes) Reserved Instruction RAM area (768 Kbytes) 4001 FFFFH 4001 0000H 2007 FFFFH 2000 0000H 000C 2FFFH 000C 0000H 000B FFFFH 0000 0000H Figure 3.6 External MCU Interface Space R18UZ0038EJ0200 Mar 16, 2016 Page 15 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 3.2.2 3. Software Development Procedure Program Allocation Example Example of program allocation is as follows. 0x2007FFFF Data RAM area (512Kbyte) Data area 0x20000000 0x040BFFFF Instruction RAM area (768Kbyte) Program code area Start up code area （after memory copy） 0x04000000 0x03FFFFFF Serial flash memory area (32Mbyte) Boot code & Start up code area （before memory copy） 0x02000000 Boot area (8byte) 0x00000000 Figure 3.7 Program Allocation Example R18UZ0038EJ0200 Mar 16, 2016 Page 16 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 4. 4. Data Type and Macro Data Type and Macro In this chapter, explain both data type and macro in this sample software. 4.1 Data Type The list of data type define by sample software is as follows. Table 4.1 Data Type Macro Type Meaning ER_RET int Error code for function return value IRQn enum Interrupt number R18UZ0038EJ0200 Mar 16, 2016 Page 17 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 4.2 4. Data Type and Macro Macro Definition The definition list of this sample software is expainled in this section. 4.2.1 Constants The constants list in this sample software is shown as follows. Table 4.2 Constant (General) Constant Value NULL ((void*))0 Meaning Invalid pointer Table 4.3 Constant (Systeml) Constant Value RIN32M4_SYSCLK 100000000 SYS_UART_CH 1 Meaning Clock frequency in system (Uint: Hz) UART channel number in system Table 4.4 Constant (Error Code) Constant Value Meaning ER_OK 0 Normal finish ER_NG -1 Abnormal finish ER_SYS -2 Undefined error ER_PARAM -3 Detect of invalid parameter ER_NOTYET -4 Process incomplete ER_NOMEM -5 Out of memory range ER_BUSY -6 Under Busy ER_INVAL -7 Invalid state ER_TIMEOUT -8 Timeout occur 4.2.2 Conditional Compile Definition Conditional compile definition is as follows. Table 4.5 Macro Define For Compile With Condition Define Name OSLESS Define Content Define File Determine whether HW-RTOS is used or not startup_RIN32M4.c If defined: cstartup_M.c HW-RTOS is not used If not defined: HW-RTOS is used R18UZ0038EJ0200 Mar 16, 2016 Page 18 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 5. 5. R-IN32M4-CL2 Register Definition R-IN32M4-CL2 Register Definition RIN32M4.h is definition of R-IN32M4-CL2’s interrupts and registers. Register definition are shown as follows. 5.1 APB Peripheral Register Table 5.1 APB Peripheral Register Definition #define #define RIN_TMR_BASE Function 32-bit timer register (TAUJ2) Reference of Register Detail “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec15 #define RIN_CSI0_BASE CSI channel-0 register “R-IN32M4-CL2 User’s Manual #define RIN_CSI1_BASE CSI channel-1 register Peripheral Modules” sec20 #define RIN_UART0_BASE UART channel-0 register “R-IN32M4-CL2 User’s Manual #define RIN_UART1_BASE UART channel-1 register Peripheral Modules” sec19 #define RIN_IIC0_BASE I2C channel-0 register “R-IN32M4-CL2 User’s Manual #define RIN_IIC1_BASE I2C channel-1 register Peripheral Modules” sec21 #define RIN_WDT_BASE Watchdog timer register “R-IN32M4-CL2 User’s Manual #define RIN_TAUD_BASE 16-bit timer register (TAUD) Peripheral Modules” sec18 “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec16 #define RIN_TAPA_BASE Moter control register (TAPA) “R-IN32M4-CL2 User’s Manual #define RIN_PIC_BASE Moter control register (PIC) Peripheral Modules” sec17 #define RIN_ADC_BASE A/D converter register “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec23 #define RIN_SYS_BASE System register “R-IN32M4-CL2 User’s Manual Peripheral Modules” each section #define RIN_CAN0_BASE CAN channel-0 register “R-IN32M4-CL2 User’s Manual #define RIN_CAN1_BASE CAN channel-1 register Peripheral Modules” sec22 #define RIN_ETHSW_BASE Ethernet switch register “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec9 R18UZ0038EJ0200 Mar 16, 2016 Page 19 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 5.2 5. R-IN32M4-CL2 Register Definition AHB Peripheral Register Table 5.2 AHB Peripheral Register Definition #define #define RIN_HWOS_BASE Function HW-RTOS register Reference of Register Detail “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec8 #define RIN_ETH_BASE Gigabit ethernet MAC register “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec8 #define RIN_MEMC_BASE Asynchronous SRAM MEMC register “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec10 #define RIN_SROM_BASE Serial FlashROM MEMC register “R-IN32M4-CL2 User’s Manual #define RIN_DMAC0_BASE DMAC channel-0 control register “R-IN32M4-CL2 User’s Manual #define RIN_DMAC1_BASE DMAC channel-1 control register Peripheral Modules” sec14 #define RIN_DMAC2_BASE DMAC channel-2 control register #define RIN_DMAC3_BASE DMAC channel-3 control register #define RIN_DMAC0_LINK_BASE DMAC channel-0 link register #define RIN_DMAC1_LINK_BASE DMAC channel-1 link register #define RIN_DMAC2_LINK_BASE DMAC channel-2 link register #define RIN_DMAC3_LINK_BASE DMAC channel-3 link register #define RIN_DMAC_CTRL_BASE DMA control register #define RIN_RTDMAC_BASE RTDMAC control register #define RIN_RTDMAC_LINK_BASE RTDMAC link register Peripheral Modules” sec13 #define RIN_RTDMAC_CTRL_BASE RTDMA control register #define RIN_GPIO_BASE Port register #define RIN_RTPORT_BASE RT port register #define RIN_EXTPORT_BASE EXT port register “R-IN32M4-CL2 User’s Manual” sec7 #define RIN_CCI_BRG_BASE CC-Link IE Field bridge control register “R-IN32M4-CL2 User’s Manual” sec6 #define RIN_CC_BR_BASE CC-Link bridge control register #define RIN_SMC_BASE Synchronous burst MEMC register #define RIN_CCLRMT_BASE CC-Link remote device station register “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec24 “R-IN32M4-CL2 User’s Manual Peripheral Modules” sec11 “R-IN32 Series CC-Link Remote Device Station” R18UZ0038EJ0200 Mar 16, 2016 Page 20 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6. 6. Driver Driver The driver function is explained in this section. 6.1 Driver Function Lists The API lists in this sample software are shown as follows. Table 6.1 32-bit Timer (TAUJ2) Driver Function List Function Description clock_init Initialization of TAUJ2 system timer (channel-0) timer_interval_init Initialization of TAUJ2 interval timer timer_onecount_hwtrg_init Initialization of TAUJ2 one-count timer (hardware trigger) timer_start Start TAUJ2 timer timer_stop Stop TAUJ2 timer timer_check_act Check TAUJ2 timer activation Table 6.2 UART Driver Function List Function Description uart_init Initialization of UART uart_write Transmit 1-byte character uart_read Receive 1-byte character uart_check_receivedata Check presence of receive data Table 6.3 IIC Driver Function List Function Description iic_init Initialization of IIC controller iic_start_condition Transmit start condition iic_stop_condition Transmit stop condition iic_write Transmit 1-byte chracter iic_read Receive 1-byte chracter Table 6.4 CSI Driver Function List Function Description csi_init Initialization of CSI controller csi_write Transmit 1-byte character csi_read Receive 1-byte character csi_check_tx Check transmit data (for slave) csi_check_rx Check receive data (for slave) csi_change_mode Tx/Rx mode change (for slave) R18UZ0038EJ0200 Mar 16, 2016 Page 21 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6. Driver Table 6.5 DMAC Driver Function List Function dmac_memcpy Description Memory copy (DMA transfer) Table 6.6 Serial FlashROM Driver Function List Function Description sromc_init Initialization of SPI bus controller (normal read) sromc_dual_init Initialization of SPI bus controller (fast read dual I/O) sromc_quad_init Initialization of SPI bus controller (fast read quad I/O) sromc_write Write data to SPI bus sromc_read Read data form SPI bus Table 6.7 WDT Driver Function List Function Description wdt_init Initialization of watchdog timer wdt_interrupt_init Initialization of watchdog timer (enable 75% interrupt) wdt_start Watchdog timer start wdt_clear Count clear wdt_wait_reset Wait for reset Table 6.8 16-bit Timer (TAUD) Driver Function List Function Description taud_interval_init Initialization of TAUD interval timer taud_onecount_hwtrg_init Initialization of TAUD one-count timer (hardware trigger) taud_start Start TAUD timer taud_stop Stop TAUD timer taud_check_act Check TAUD timer activation Table 6.9 A/D Converter Driver Function List Function Description adc_swtrg_init Initialization of watchdog timer A/D conveter (software trigger) adc_hwtrg_init Initialization of watchdog timer A/D conveter (hardtware trigger) adc_start Start A/D convert adc_stop Stop A/D convert adc_read Read converted data Table 6.10 GbE-PHY Driver Function List Function ether_phy_init R18UZ0038EJ0200 Mar 16, 2016 Description Initialization of GbE-PHY Page 22 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2 6. Driver 32-bit Timer (TAUJ2) Control 6.2.1 Initialization of TAUJ2 System Timer (Channel-0) clock_init (1) Description Initialization of TAUJ2 system timer (channel-0) (2) C-language Format void clock_init( void ); (3) Parameter None (4) Function System timer is initialized to use “clock” function. (5) Return Value None Remark This API uses “TAUJ2TTINm input position detection function” table in “TAUJ2 operation functions” lists “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. R18UZ0038EJ0200 Mar 16, 2016 Page 23 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2.2 6. Driver Initialization of TAUJ2 Interval Timer timer_interval_init (1) Description Initialization of TAUJ2 interval timer (2) C-language Format ER_RET timer_interval_init( uint8_t ch, uint_32t i_time ); (3) Parameter I/O I Parameter uint8_t Description ch Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 I (4) uint32_t i_time Periodic time interval (1 to 42,949 ms） Function Set the selected timer to be interval timer mode. This interval timer outputs interrupt signal after interval time given by argument. The parameter error is returned, if the channel selection argument is except 0 to 3, or the interval time argument is except 1 to 42949. • Timer clock specification > Count clock frequency : 100MHz (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error ・In case of channel selection argument is NOT 0 to 3 ・If interval time is NOT 1 to 42,949ms Remark This API uses “Interval timer function” in “TAUJ2 operation functions” table in “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. R18UZ0038EJ0200 Mar 16, 2016 Page 24 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2.3 6. Driver Initialization of TAUJ2 One-count Timer (Hardware Trigger) timer_onecount_hwtrg_init (1) Description Initialization of TAUJ2 one count timer (hardware trigger) (2) C-language Format ER_RET timer_onecount_hwtrg_init( uint8_t ch,uint32_t o_time, uint32_t trg ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 (4) I uint32_t o_time A wait time for timer overflow (1us to 42,949,672ns) I uint32_t trg Trigger factor selection argument (The number of IRQ in trigger factors + 4) Function Set the selected timer to be one count timer mode. This timer starts count triggered by the interrupt signal which is selected by trigger selection argument. After specific time given by argument, timer stops count. Timer does not detect a trigger while timer counts. The parameter error is returned, if argument is not available value. The timer count clock has to be 100MHz in this mode. Caution (5) If count clock period is more than interrupt pulse width, the timer may miss interrupt signal. Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error ・In case of channel selection argument is NOT 0 to 3 ・If interval time is NOT 1 to 42,949,672ns Remark This API uses “Delay count function” in “TAUJ2 operation functions” table in “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. R18UZ0038EJ0200 Mar 16, 2016 Page 25 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2.4 6. Driver Start TAUJ2 Timer timer_start (1) Description Start TAUJ2 timer (2) C-language Format ER_RET timer_start( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 (4) Function The timer selected by argument starts. Parameter error is returned if channel selection number is except 0 to 3. (5) Return Value Return Value Meaning ER_OK Start timer success ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 3 R18UZ0038EJ0200 Mar 16, 2016 Page 26 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2.5 6. Driver Stop TAUJ2 Timer timer_stop (1) Description Stop TAUJ2 timer (2) C-language Format ER_RET timer_stop( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 (4) Function The timer selected by argument starts. Parameter error is returned if channel selection number is except 0 to 3. (5) Return Value Return Value Meaning ER_OK Stop timer success ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 3 R18UZ0038EJ0200 Mar 16, 2016 Page 27 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.2.6 6. Driver Check TAUJ2 Timer Activation timer_check_act (1) Description Check TAUJ2 timer activation (2) C-language Format ER_RET timer_check_act( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 (4) Function Check the timer activation selected by channel selection argument. (5) Return Value Return Value Meaning 1 The selected timer channel is active 0 The selected timer channel is stopped ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 3 R18UZ0038EJ0200 Mar 16, 2016 Page 28 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.3 6. Driver UART Control 6.3.1 UART Module Initialization uart_init (1) Description UART module initialization (2) C-language Format ER_RET uart_init( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function Several parameters of the baud rate and bit size for the channel select argument are initialized. ER_PARAM are returned, if seleced channel is 0 or 1. (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 29 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.3.2 6. Driver Transmission of 1-byte Character Data in UART uart_write (1) Description Transmission of 1-byte character data in UART (2) C-language Format ER_RET uart_write( uint8_t ch,uint8_t data ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 I (4) uint8_t data Transmission of 1-byte character data Function Transmit 1-byte character data to the selected channel. But if TX_FIFO is full, this transmittion is halted until TX_FIFO becomes empty ER_PARAM is returned, if selected channel is other than 0 or 1 (5) Return Value Return Value Meaning ER_OK Transmission success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 30 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.3.3 6. Driver Receive of 1-byte Character Data in UART uart_read (1) Description Receive of 1-byte character data in UART (2) C-language Format ER_RET uart_read( uint8_t ch,uint8_t *data ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 O (4) uint8_t * data Receive data pointer of 1-byte character Function Receive 1-byte character data from selected channel. If the receive data is available, it is passed to the argument data pointer and the return value truns to 1. The return value turns to 0 if there are no receive data. ER_PARAM is returned, if selected channel is other than 0 or 1. (5) Return Value Return Value Meaning 1 Receive data is available 0 No receive data ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 31 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.3.4 6. Driver Presence Confirmation of Receive Data uart_check_receivedata (1) Description Check the presence of receive data (2) C-language Format ER_RET uart_check_receivedata( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function Check whether select channel RX_FIFO is empty. ER_PARAM is returned, if selected channel is other than 0 or 1. (5) Return Value Return Value Meaning 1 Receive data is available 0 No receive data ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 32 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.4 6. Driver IIC Control 6.4.1 Initialization of IIC Controller iic_init (1) Description Initialize IIC controller (2) C-language Format ER_RET iic_init( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function Initialize select channel IIC. ER_PARAM is returned, if selected channel is other than 0 or 1. • IIC clock setting > Fast mode : 400kHz • IIC timing setting > Stop and start interval : 80 × PCLK > Setup cycle Start condition : 80 × PCLK Stop condition : 45 × PCLK Write data : 2 × PCLK > Hold cycle Start condition : 45 × PCLK Data : 80 × PCLK Write data : 0 × PCLK Read data : 2 × PCLK Remark. IIC clock setting “400kHz” supposes that f rise time and fall time of SDAn and SCLn are 20-ns. Please refer to “R-IN32M4-CL2 User’s Manual: Peripheral Modules” for register setting. R18UZ0038EJ0200 Mar 16, 2016 Page 33 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) (5) 6. Driver Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 34 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.4.2 6. Driver Start Condition Transmission iic_start_condition (1) Description Transmit start condition (2) C-language Format ER_RET iic_start_condition( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function Transmit start condition for select channel. ER_PARAM is returned, if selected channel is other than 0 or 1. (5) Return Value Return Value Meaning ER_OK Transmit success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 35 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.4.3 6. Driver Stop Condition Transmission iic_stop_condition (1) Description Transmit stop condition (2) C-language Format ER_RET iic_stop_condition( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function Transmit stop condition for select channel. ER_PARAM is returned, if selected channel is other than 0 or 1. (5) Return Value Return Value Meaning ER_OK Transmit success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 36 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.4.4 6. Driver Transmit 1-byte Chracter iic_write (1) Description Transmit 1-byte character (2) C-language Format ER_RET iic_write( uint8_t ch, uint8_t data ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 I (4) uint8_t data Transmit data of 1-byte character Function Transmit 1-byte character for select channel. ER_PARAM is returned, if selected channel is other than 0 or 1. ER_NG(transmit failed) is returned, in case of ACK is not returned from device every 8bit data transmission. (5) Return Value Return Value Meaning ER_OK Transmit success ER_NG Transmit failure: in case of ACK is NOT returned from device ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 37 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.4.5 6. Driver Receive 1-byte Chracter iic_read (1) Description Receive 1-byte character1 (2) C-language Format ER_RET iic_read( uint8_t ch, uint8_t *data, uint32_t last ); (3) Parameter I/O I Parameter uint8_t ch Description Channel select argument 0 : channel-0 1 : channel-1 O uint8_t * data Receive data pointer of 1-byte character I uint32_t last Last data designate argument 0 : the other data(Except last data) the others : Last data (4) Function Receive 1-byte character for select channel. ER_PARAM is returned, if selected channel is other than 0 or 1. In case of last data designate argument is 0, ACK is output . In case of last data designate argument is the others, ACK is NOT output . (5) Return Value Return Value Meaning ER_OK Receive success ER_PARAM Parameter error: if selected channel is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 38 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5 6. Driver CSI Control 6.5.1 Initialization of CSI Controller csi_init (1) Description Initialize CSI controller (2) C-language Format ER_RET csi_init( uint32_t ch, uint32_t mode ); (3) Parameter I/O I Parameter uint32_t ch Description Channel select argument 0 : channel-0 1 : channel-1 I uint32_t mode Master/slave mode select argument 0 : master 1 : slave (4) Function Initialize CSI selected by channel select argument. ER_PARAM is returned, in case of channel argument or master/Slave select argument is except 0 or 1. Common setting of master/slave is shown as follows. • CSI data setting : data length is 8, MSB first, Error detection is none • CSI timing setting R18UZ0038EJ0200 Mar 16, 2016 Setup cycle : 0.5 serial clock Hold cycle : 0.5 serial clock Page 39 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6. Driver Original setting for select mode as follows (a) Master Mode Selected Serial clock frequency : 16.667MHz Default level : high (b) Slave Mode Selected CSI clock setting : use input clock from master Remark1. Chip select function is NOT available 2. FIFO function is NOT available (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error: if specified channel or specified mode is other than 0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 40 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5.2 6. Driver Transmit 1-byte Character csi_write (1) Description Transmit 1-byte character (2) C-language Format ER_RET csi_write( uint32_t ch, uint8_t data ); (3) Parameter I/O I Parameter uint32_t ch Description Channel select argument 0 : channel-0 1 : channel-1 I (4) uint8_t data Transmit data of 1-byte character Function Transmit 1-byte character data if selected channel is at transmitting mode. CSI controller turns to transmit mode in CSI master state. ER_PARAM is returned if the channel argument or master/slave select argument is other than 0 or 1. ER_INVAL(mode error) is returned if CSI controller is neither at transmit mode nor in master state. (5) Return Value Return Value Meaning ER_OK Transmit success ER_PARAM Parameter error: if selected channel is other than 0 or 1 ER_INVAL Mode error: if the status of CSI controller is neither at transmit mode nor in master state R18UZ0038EJ0200 Mar 16, 2016 Page 41 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5.3 6. Driver Receive 1-byte Chracter csi_read (1) Description Receive 1-byte character (2) C-language Format ER_RET csi_read( uint32_t ch, uint8_t* data ); (3) Parameter I/O I Parameter uint32_t ch Description Channel select argument 0 : channel-0 1 : channel-1 O (4) uint8_t * data Receive data pointer of 1-byte character Function 1-byte character data receive if select channel is receive mode. In case of master mode, if CSI controller status is NOT receive mode, it is modified to receive mode. ER_PARAM is returned, in case of channel argument or master/Slave select argument is except 0 or 1. In case of CSI controller status is NOT transmit mode at slave mode, ER_INVAL(mode error) is returned. (5) Return Value Return Value Meaning ER_OK Receive success ER_PARAM Parameter error: if selected channel is other than 0 or 1 ER_INVAL Mode error: in case of CSI controller status is NOT receive mode R18UZ0038EJ0200 Mar 16, 2016 Page 42 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5.4 6. Driver Confirmation of Transmit Data (for Slave) csi_check_tx (1) Description Confirm transmit data (for slave) (2) C-language Format ER_RET csi_check_tx( uint32_t ch ); (3) Parameter I/O I Parameter uint32_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function In case of select channel is transmit mode, the return value is presence of CSI transmit data. ER_OK(transmit data is none) is always returned when CSI controller is master mode, because not stored transmit data. ER_PARAM is returned, in case of channel argument is except 0 or 1. In case of CSI controller status is NOT transmit mode, ER_INVAL(mode error) is returned. (5) Return Value Return Value Meaning ER_OK Transmission data is none ER_NOTYET Transmission data is available ER_PARAM Parameter error: if selected channel is other than 0 or 1 ER_INVAL Mode error: in case of CSI controller status is NOT transmit mode R18UZ0038EJ0200 Mar 16, 2016 Page 43 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5.5 6. Driver Confirmation of Receive Data (for Slave) csi_check_rx (1) Description Confirm receive data (for slave) (2) C-language Format ER_RET csi_check_rx( uint32_t ch ); (3) Parameter I/O I Parameter uint32_t ch Description Channel select argument 0 : channel-0 1 : channel-1 (4) Function In case of select channel is receive mode, the return value is presence of CSI receive data. ER_ NOTYET (No receive data) is always returned when CSI controller is master mode, because not stored receive data. ER_PARAM is returned, in case of channel argument is except 0 or 1. In case of CSI controller status is NOT transmit mode, ER_INVAL(mode error) is returned. (5) Return Value Return Value Meaning ER_OK Receive data is available ER_NOTYET No receive data ER_PARAM Parameter error: if selected channel is other than 0 or 1 ER_INVAL Mode error: in case of CSI controller status is NOT receive mode R18UZ0038EJ0200 Mar 16, 2016 Page 44 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.5.6 6. Driver Conversion of Tx/Rx Mode (for Slave) csi_change_mode (1) Description Conversion of Tx/Rx mode (2) C-language Format ER_RET csi_change_mode( uint32_t ch, uint32_t mode ); (3) Parameter I/O I Parameter uint32_t Description ch Channel select argument 0 : channel-0 1 : channel-1 I uint32_t mode Trans mode select argument 0 : receive mode 1 : transmit mode (4) Function CSI Tx/Rx mode for select channel is set. ER_PARAM is returned, in case of channel argument or trans mode select argument is except 0 or 1. • In case of trans mode select argument is Rx mode, setting is changed as below > Tx operation is stopped setting > Rx operation is permit setting • In case of trans mode select argument is Tx mode, setting is changed as below > Tx operation is permit > Rx operation is prohibit (5) Return Value Return Value Meaning ER_OK Mode conversion success ER_PARAM Parameter error ・If selected channel is other than 0 or 1 ・In case of except select mode -0 or 1 R18UZ0038EJ0200 Mar 16, 2016 Page 45 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.6 6. Driver DMA Control 6.6.1 Memory Copy (DMA Transfer) dmac_memcpy (1) Description Memory copy (DMA transfer) (2) C-language Format void *dmac_memcpy( void *dst, const void *src, uint32_t n ); (3) Parameter I/O (4) Parameter Description I void* dst Destination address I void* src Source address I uint32_t n Number of transfer byte Function Conduct to memory copy from source address to destination address by DMA transfer.. The dst (destination address) is returned, when transfer finish. (5) Return Value Return Value dst R18UZ0038EJ0200 Mar 16, 2016 Meaning Destination address Page 46 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.7 6. Driver Serial FlashROM Control 6.7.1 Initialization of SPI Bus Controller (Normal Read) sromc_init (1) Description Initialize SPI bus controller (normal read) (2) C-language Format void sromc_init( void ); (3) Parameter None (4) Function Initialize serial FlashROM controller. • Serial FlashROM clock setting > Serial FlashROM clock frequency : 25MHz > Serial clock default level : high • Serial FlashROM read mode setting : normal read • Serial FlashROM timing setting > Data inout Input setup cycle : 0.5 serial clock Output hold cycle : 0.5 serial clock > Minimum high width of device select signal of SPI bus : 8 serial clock > Setup cycle Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock > Hold cycle (5) Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 47 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.7.2 6. Driver Initialization of SPI Bus Controller (Fast Read Dual I/O) sromc_dual_init (1) Description Initialize SPI bus controller (fast read dual I/O) (2) C-language Format void sromc_dual_init( void ); (3) Parameter None (4) Function Initialize serial FlashROM controller. • Serial FlashROM clock setting > Serial FlashROM clock frequency : 50MHz > Serial clock default level : high • Serial FlashROM read mode setting : fast read dual I/O • Serial FlashROM timing setting > Data inout Input setup cycle : 0.5 serial clock Output hold cycle : 0.5 serial clock > Minimum high width of device select signal of SPI bus : 8 serial clock > Setup cycle Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock > Hold cycle (5) Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 48 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.7.3 6. Driver Initialization of SPI Bus Controller (Fast Read Quad I/O) sromc_quad_init (1) Description Initialize SPI bus controller (fast read quad I/O) (2) C-language Format void sromc_quad_init( void ); (3) Parameter None (4) Function Initialize serial FlashRom controller. Setting of serial FlashROM controller is needed to use fast read quad I/O mode. This setting is contained to middleware. Please refer to “7.3.3 Initialization of Serial FlashROM Controller (Fast Read Quad I/O) ”. • Serial FlashROM clock setting > Serial FlashROM clock frequency : 50MHz > Serial clock default level : high • Serial FlashROM read mode setting : fast read quad I/O • Serial FlashROM timing setting > Data inout Input setup cycle : 0.5 serial clock Output hold cycle : 0.5 serial clock > Minimum high width of device select signal of SPI bus : 8 serial clock > Setup cycle Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock > Hold cycle (5) Device select signal of SPI bus : 1.5 serial clock Serial data output : 0.5 serial clock Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 49 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.7.4 6. Driver Data Write for SPI Bus sromc_write (1) Description Data write for SPI bus (2) C-language Format void sromc_write( uint8_t data, uint32_t first, uint32_t last ); (3) Parameter I/O Parameter Description I uint8_t data Write data of 1-byte character I uint32_t first Flag for direct access mode setting of SPI bus 0 : direct access mode setting is none The others : direct access mode setting l uint32_t last Flag for ROM access mode setting 0 : ROM access mode setting is none The others : ROM access mode setting (4) Function Write data of data argument is written to SPI bus. In case of first argument is NOT 0, set to direct access mode before data is written. In case of last argument is NOT 0, set to ROM access mode after data is written. (5) Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 50 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.7.5 6. Driver Data Read from SPI Bus sromc_read (1) Description Data read from SPI bus (2) C-language Format void sromc_read( uint8_t* data, uint32_t first, uint32_t last ); (3) Parameter I/O Parameter Description O uint8_t * data Pointer of read data of 1-byte character I uint32_t first Flag for direct access mode setting of SPI bus 0 : direct access mode setting is none The others : direct access mode setting I unit32_t last Flag for ROM access mode setting 0 : ROM access mode setting is none The others : ROM access mode setting (4) Function Stores read data form SPI bus to pointer of data argument. In case of first argument is NOT 0, set to direct access mode before data is read. In case of last argument is NOT 0, set to ROM access mode after data is read. (5) Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 51 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.8 6. Driver Watchdog Timer Control 6.8.1 Initialization of Watchdog Timer wdt_init (1) Description Initialize watchdog timer (2) C-language Format ER_RET wdt_init( void ); (3) Parameter None (4) Function Initialize watchdog timer. • Error mode : reset mode (reset by counter overflow) • Counter overflow interval time : 1.34217728s (count clock : 0x10000 cycle) • Window open term : 100％ (5) Return Value Return Value ER_OK R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization success Page 52 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.8.2 6. Driver Initialization of Watchdog Timer (Enable 75% Interrupt) wdt_interrupt_init (1) Description Initialize watchdog timer (enable 75% interrupt) (2) C-language Format ER_RET wdt_interrupt_init( void ); (3) Parameter None (4) Function Initialize watchdog timer. Set WDTA0MD.WDTA0WIE to 1, enable 75% interrupt request. When interrupt occurs, driver clears count of watchdog timer. • Error mode : reset mode (reset by counter overflow) • 75% interrupt request : enable • Counter overflow interval time : 1.34217728s (count clock : 0x10000cycle) • Window open term : 100％ (5) Return Value Return Value ER_OK R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization success Page 53 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.8.3 6. Driver Start of Watchdog Timer wdt_start (1) Description Start watchdog timer (2) C-language Format ER_RET wdt_start( void ); (3) Parameter None (4) Function Start watchdog timer. Start operation can NOT be stopped after it started. (5) Return Value Return Value ER_OK R18UZ0038EJ0200 Mar 16, 2016 Meaning Start operation success Page 54 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.8.4 6. Driver Count Clear wdt_clear (1) Description Count clear (2) C-language Format ER_RET wdt_clear( void ); (3) Parameter None (4) Function Clear the count of watchdog timer. (5) Return Value Return Value ER_OK R18UZ0038EJ0200 Mar 16, 2016 Meaning Count clear success Page 55 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.8.5 6. Driver Reset Waiting wdt_wait_reset (1) Description Reset waiting (2) C-language Format void wdt_wait_reset( void ); (3) Parameter None (4) Function Wait for the reset output of watchdog timer by counter overflow occurred. (5) Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 56 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.9 6. Driver 16-bit Timer (TAUD) Control 6.9.1 Initialization of TAUD Interval Timer taud_interval_init (1) Description Initialization of TAUD interval timer (2) C-language Format ER_RET taud_interval_init( uint8_t ch, uint16_t i_time ); (3) Parameter I/O I Parameter uint8_t Description ch Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 … 15 : channel-15 I (4) uint16_t i_time Periodic time interval (1 to 655us) Function Set the selected timer to be interval timer mode. This interval timer outputs interrupt signal after interval time given by argument. The parameter error is returned, if the channel selection argument is except 0 to 15, or the interval time argument is except 1 to 655. • Timer clock specification > Count clock frequency : 100MHz (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error ・ In case of channel selection argument is NOT 0 to 15 ・ If interval time is NOT 1 to 655us Remark This API uses “Interval timer function” in “TAUD operation functions” table in “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. R18UZ0038EJ0200 Mar 16, 2016 Page 57 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.9.2 6. Driver Initialization of TAUD One-count Timer (Hardware Trigger) taud_onecount_hwtrg_init (1) Description Initialization of TAUD one count timer (hardware trigger) (2) C-language Format ER_RET taud_onecount_hwtrg_init( uint8_t ch,uint16_t o_time, uint32_t trg ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 … 15 : channel-15 (4) I uint16_t o_time A wait time for timer overflow (1 to 655us) I uint32_t trg Trigger factor selection argument (The number of IRQ in trigger factors + 4) Function Set the selected timer to be one count timer mode. This timer starts count triggered by the interrupt signal which is selected by trigger selection argument. After specific time given by argument, timer stops count. Timer does not detect a trigger while timer counts. The parameter error is returned, if argument is not available value. The timer count clock has to be 100MHz in this mode. Caution (5) If count clock period is more than interrupt pulse width, the timer may miss interrupt signal. Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error ・In case of channel selection argument is NOT 0 to 15 ・If interval time is NOT 1 to 655us Remark This API uses “Delay count function” in “TAUD operation functions” table in “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. R18UZ0038EJ0200 Mar 16, 2016 Page 58 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.9.3 6. Driver Start TAUD Timer taud_start (1) Description Start TAUD timer (2) C-language Format ER_RET taud_start( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 … 15 : channel-15 (4) Function The timer selected by argument starts. Parameter error is returned if channel selection number is except 0 to 15. (5) Return Value Return Value Meaning ER_OK Start timer success ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 15 R18UZ0038EJ0200 Mar 16, 2016 Page 59 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.9.4 6. Driver Stop TAUD Timer taud_stop (1) Description Stop TAUD timer (2) C-language Format ER_RET taud_stop( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 … 15 : channel-15 (4) Function The timer selected by argument stops. Parameter error is returned if channel selection number is except 0 to 3. (5) Return Value Return Value Meaning ER_OK Stop timer success ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 15 R18UZ0038EJ0200 Mar 16, 2016 Page 60 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.9.5 6. Driver Check TAUD Timer Activation taud_check_act (1) Description Check TAUD timer activation (2) C-language Format ER_RET taud_check_act( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 … 15 : channel-15 (4) Function Check the timer activation selected by channel selection argument. (5) Return Value Return Value Meaning 1 The selected timer channel is active 0 The selected timer channel is stopped ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 15 R18UZ0038EJ0200 Mar 16, 2016 Page 61 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.10 6. Driver A/D Converter Control 6.10.1 A/D Converter Module Initialization (Software Trigger) adc_swtrg_init (1) Description A/D converter module initialization (software trigger) (2) C-language Format ER_RET adc_swtrg_init( uint8_t ch ); (3) Parameter I/O I Parameter uint8_t ch Description Channel selection argument 0 : channel-0 1 : channel-1 2 : channel-2 3 : channel-3 4 : channel-4 5 : channel-5 6 : channel-6 7 : channel-7 (4) Function Set A/D converter to be software trigger mode (select mode, single mode and one buffer mode). Channel which is selected by trigger selection argument is target to convert. The parameter error is returned, if the channel selection argument is except 0 to 7. (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error: in case of channel selection argument is NOT 0 to 7 R18UZ0038EJ0200 Mar 16, 2016 Page 62 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.10.2 6. Driver A/D Converter Module Initialization (Hardware Trigger) adc_hwtrg_init (1) Description A/D converter module initialization (hardware trigger) (2) C-language Format ER_RET adc_hwtrg_init( uint8_t ch_mux ); (3) Parameter I/O I Parameter uint8_t ch_mux Description Channel selection argument 01H : channel-0 02H : channel-1 03H : channel-0 to 1 04H : channel-2 … FFH : channel-0 to 7 (4) Function Set A/D converter to be hardware trigger mode (auto mode, scan mode, single mode and one buffer mode). Trigger factor is rising eadge of ADTRG signal. All channel which are selected by trigger selection argument is target to convert. Convert complete interrupt occurs when max number of selected channel is converted. Bits of ch_mux correspond with channel 0-7. For example, set ch_mux to C9H if you select channel-0, 3, 6 and 7. The parameter error is returned, if the channel selection argument is 00H. (5) Return Value Return Value Meaning ER_OK Initialization success ER_PARAM Parameter error: in case of channel selection argument is 00H R18UZ0038EJ0200 Mar 16, 2016 Page 63 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.10.3 6. Driver Start A/D Convert adc_start (1) Function Start A/D convert (2) C-language Format void adc_start( void ); (3) Parameter None (4) Function Start A/D convert. At software trigger mode, ADC start convert immediately. At hardware trigger mode, ADC go on to wait trigger state. (5) Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 64 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.10.4 6. Driver Stop A/D Convert adc_stop (1) Description Stop A/D convert (2) C-language Format void adc_stop( void ); (3) Parameter None (4) Function Stop A/D convert. Detail of stop behavior is described in “R-IN32M4-CL2 User’s Manual Peripheral Modules” document. (5) Return Value None R18UZ0038EJ0200 Mar 16, 2016 Page 65 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.10.5 6. Driver Read Result of A/D Convert adc_read (1) Description Read result of A/D convert (2) C-language Format ER_RET adc_read( uint8_t ch, uint32_t* data ); (3) Parameter I/O (4) Parameter Description I uint8_t ch ADCRn selection argument (n=0-7) O uint32_t* data Pointer of read data Function Read ADCRn which is selected by ADCRn selection argument. (5) Return Value Return Value Meaning ER_OK Read success ER_PARAM Parameter error: in case of ADCRn selection argument is NOT 0 to 7. R18UZ0038EJ0200 Mar 16, 2016 Page 66 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 6.11 6. Driver GbE-PHY Control 6.11.1 Initialization of GbE-PHY ether_phy_init (1) Description Initialization of GbE-PHY (2) C-langage Format ER_RET ether_phy_init( void ); (3) Parameter None (4) Function Initialize GbE-PHY. In case of initialization failure, return ER_NG value. Please call this initialization function after GbE-PHY resetting. please refer to the Note (9 Usage Note). (5) Return Value Return Value Meaning ER_OK Initialization success ER_NG Initialization failure R18UZ0038EJ0200 Mar 16, 2016 Page 67 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7. 7. Middleware Middleware Middleware functions are explained in this section. This serial FlashROM driver suppose that serial FlashROM is MX25L6433F. 7.1 Lists of Middleware Function The API lists in this sample software are shown as follows. Table 7.1 Parallel FlashROM Driver Function List Function Description flash_init Initialization of parallel FlashROM control flash_program Data write flash_read_data Data read flash_erase Data erase flash_read_cfi CFI data read Table 7.2 Serial FlashROM Driver Function List Function Description sflash_init Initialization of serial FlashROM control (normal read) sflash_dual_init Initialization of serial FlashROM control (fast read dual I/O) sflash_quad_init Initialization of serial FlashROM control (fast read quad I/O) sflash_program Data program to serial FlashROM sflash_read Serial FlashROM data read sflash_erase Serial FlashROM data erase R18UZ0038EJ0200 Mar 16, 2016 Page 68 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.2 7. Middleware Parallel FlashROM Control 7.2.1 Initialization of Parallel FlashROM Controller flash_init (1) Description Initialization of parallel FlashROM controller (2) C-language Format ER_RET flash_init( void ); (3) Parameter None (4) Function Execute to initialize parallel FlashROM controller. (5) Return Value Return Value ER_OK R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization success Page 69 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.2.2 7. Middleware Data Write flash_program (1) Description Data write (2) C-language Format ER_RET flash_program( uint16_t* buf, uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description I uint16_t* buf Start address of write data stored area I uint32_t addr Write address I uint32_t size Write size (byte designation) Function Write the data into parallel FlashROM area with the length specified size argument from write address of addr argument. The written data is used the data with *buf argument of address area. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error ・ In case of the addr argument is NOT 16 bit address threshold value R18UZ0038EJ0200 Mar 16, 2016 ・ In case of the size argument is NOT 16 bit address threshold value ・ Sum of addr argument and size argument is over the maximum size of parallel FlashROM Page 70 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.2.3 7. Middleware Data Read flash_read_data (1) Description Data read (2) C-language Format ER_RET flash_read_data( uint16_t* buf, uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description O uint16_t* buf Write start address of read data I uint32_t addr Read address I uint32_t size Read size (byte designation) Function Read the data from parallel FlashROM area with the length specified size argument from read address of addr argument. The read data is write to address area of *buf argument. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error ・ In case of the addr argument is NOT 16 bit address threshold value R18UZ0038EJ0200 Mar 16, 2016 ・ In case of the size argument is NOT 16 bit address threshold value ・ Sum of addr argument and size argument is over the maximum size of parallel FlashROM Page 71 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.2.4 7. Middleware Data Erase flash_erase (1) Description Data erase (2) C-language Format ER_RET flash_erase( uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description I uint32_t addr Erase address I uint32_t size Erase size (byte designation) Function Erase the data from parallel FlashROM area with the length specified size argument from erase address of addr argument. The unit of erase depend on sector size of Parallel FlashROM. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error ・ Sum of addr argument and size argument is over the maximum size of parallel FlashROM R18UZ0038EJ0200 Mar 16, 2016 Page 72 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.2.5 7. Middleware CFI Data Read flash_read_cfi (1) Description CFI data read (2) C-language Format ER_RET flash_read_cfi( uint16_t* buf, uint32_t addr ); (3) Parameter I/O (4) Parameter Description O uint16_t* buf Pointer of buffer address I uint32_t addr Argument of read address designation Function Store to the pointer of buffer address, with refer CFI data from address of read address designation argument. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error ER_INVAL R18UZ0038EJ0200 Mar 16, 2016 ・ In case of the addr argument is NOT 16 bit address threshold value ・ In case of the add argument is over the maximum size of parallel FlashROM CFI is not supported Page 73 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3 7. Middleware Serial FlashROM Control 7.3.1 Initialization of Serial FlashROM Controller (Normal Read) sflash_init (1) Description Initialization of serial FlashROM controller (normal read) (2) C-language Format ER_RET sflash_init( void ); (3) Parameter None (4) Function Initialize serial FlashROM controller. Call sromc_init function (6.7.1 Initialization of SPI Bus Controller (Normal Read) ) and disable quad mode of serial FlashROM controller. If setting of serial FlashROM controller is failed, ER_NG is returned. (5) Return value Return Value ER_PARAM R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization failure: setting of serial FlashROM controller is failed. Page 74 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3.2 7. Middleware Initialization of Serial FlashROM Controller (Fast Read Dual I/O) sflash_dual_init (1) Description Initialization of serial FlashROM controller (fast read dual I/O) (2) C-language Format ER_RET sflash_dual_init( void ); (3) Parameter None (4) Function Initialize serial FlashROM controller. Call sromc_init function (6.7.2 Initialization of SPI Bus Controller (Fast Read Dual I/O) ) and disable quad mode of serial FlashROM controller. If setting of serial FlashROM controller is failed, ER_NG is returned. (5) Return value Return Value ER_PARAM R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization failure: setting of serial FlashROM controller is failed. Page 75 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3.3 7. Middleware Initialization of Serial FlashROM Controller (Fast Read Quad I/O) sflash_quad_init (1) Description Initialization of serial FlashROM controller (fast read quad I/O) (2) C-language Format ER_RET sflash_quad_init( void ); (3) Parameter None (4) Function Initialize serial FlashROM controller. Call sromc_quad_init function (6.7.3 Initialization of SPI Bus Controller (Fast Read Quad I/O) ) and enable quad mode of serial FlashROM controller. If setting of serial FlashROM controller is failed, ER_NG is returned. (5) Return Value Return Value ER_NG R18UZ0038EJ0200 Mar 16, 2016 Meaning Initialization failure: setting of serial FlashROM controller is failed. Page 76 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3.4 7. Middleware Data Program to Serial FlashROM sflash_program (1) Description Data program to serial FlashROM (2) C-language Format ER_RET sflash_program( uint8_t* buf, uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description I uint8_t * buf Write data store buffer pointer I uint32_t addr Write start address I uint32_t size Write data size Function Write the buffer data to serial FlashROM area specified by addr argument and size argument data. In case of the sum of addr argument and size argument is over the maximum size of serial FlashROM, ER_PARAM is returned. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error: sum of addr argument and size argument is over the maximum size of serial FlashROM R18UZ0038EJ0200 Mar 16, 2016 Page 77 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3.5 7. Middleware Data Read from Serial FlashROM sflash_read (1) Description Data read from serial FlashROM (2) C-language Format ER_RET sflash_read( uint8_t* buf, uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description O uint8_t * buf Write data store buffer pointer I uint32_t addr Write start address I uint32_t size Write data size Function Store the data of serial FlashROM area specified by addr argument and size argument. In case of the sum of addr argument and size argument is over the maximum size of serial FlashROM, ER_PARAM is returned. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error: sum of addr argument and size argument is over the maximum size of serial FlashROM R18UZ0038EJ0200 Mar 16, 2016 Page 78 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 7.3.6 7. Middleware Data Erase of Serial FlashROM sflash_erase (1) Description Data erase of serial FlashROM (2) C-language Format ER_RET sflash_erase( uint32_t addr, uint32_t size ); (3) Parameter I/O (4) Parameter Description I uint32_t addr Write start address I uint32_t size Write data size Function Erase the minimum erasable data of serial FlashROM area specified by addr argument and size argument. In case of the sum of addr argument and size argument is over the maximum size of serial FlashROM, ER_PARAM is returned. (5) Return Value Return Value Meaning ER_OK Success ER_PARAM Parameter error: sum of addr argument and size argument is over the maximum size of serial FlashROM R18UZ0038EJ0200 Mar 16, 2016 Page 79 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 8. Example of Application 8.1 OS-less Sample 8. Example of Application The operation of OS-less sample is explained in this section. The OS-less sample program is a single task. OS-less sample does NOT use Hardware OS. 8.1.1 Flow of OS-less Sample main() START Argument - c　　　　 : Key input value - prev_time : Processor time (previous) - curr_time : Processor time (present) LED ports initialization UART initialization uart_init() Timer initialization clock_init() Start message printf() Time acquisition prev_time = clock(); curr_time = prev_time; Key input acquisition c = getchar() c == ' ' No Yes '0'≦ c ≦'5' Yes LED lighting control No c == 'c' No Yes Time acquisition curr_time = clock(); prev_time != curr_time No Yes Interval time output (sec) printf() Completion message printf() output Processor time (previous) update prev_time = curr_time; main() END Figure 8.1 Flow Chart of OS-less Sample R18UZ0038EJ0200 Mar 16, 2016 Page 80 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 8.1.2 8. Example of Application Result of Implementation The implementation results of OS-less sample is as follows. (1) OS-less Sample : Starting hello world - compiler =IAR ANSI C/C++ Compiler V7.40.7.9843/W32 for ARM - boot mode =Serial Flash Remark1. The indication of “compiler” depend on build environment. 2. The indication of “boot mode” depend on boot setting (2) OS-less Sample : LED Control (key input = ’0’ to ’7’) hello world - compiler =IAR ANSI C/C++ Compiler V7.40.7.9843/W32 for ARM - boot mode =Serial Flash 0 11 222 3333 44444 555555 6666666 77777777 (3) The The The The The The The The level level level level level level level level of of of of of of of of LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 inverts inverts inverts inverts inverts inverts inverts inverts at at at at at at at at 1 2 2 3 4 5 6 7 time) time) time) time) time) time) time) time) OS-less Sample : Indication of Interval Time (key input = ’c’) hello world - compiler - boot mode c (interval c (interval c (interval (4) (← (← (← (← (← (← (← (← =IAR ANSI C/C++ Compiler V7.40.7.9843/W32 for ARM =Serial Flash =464369 ms) =2771 ms) =187253 ms) (← indicate time from program start to 1st 'C' key input) (← indicate time from 1st 'C' key input to 2nd 'C' key input) (← indicate time from 2nd 'C' key input to 3rd 'C' key input) OS-less Sample : Finish (key input = ’ ’) hello world - compiler =IAR ANSI C/C++ Compiler V7.40.7.9843/W32 for ARM - boot mode =Serial Flash (← break from main process to input ' '.) bye R18UZ0038EJ0200 Mar 16, 2016 Page 81 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) (5) 8. Example of Application OS-less Sample : Indication of Interval Time (key input = the others) hello world - compiler =IAR ANSI C/C++ Compiler V7.40.7.9843/W32 for ARM - boot mode =Serial Flash 890-^\!"#$%&'()=~|qwertyuiop@[QWERTYUIO`{ asdfghjkl;:]ASDFGHJKL+*}zxvbnm,./\ZXVBNM<>?_ R18UZ0038EJ0200 Mar 16, 2016 (← not taken any step) (← not taken any step) Page 82 of 83 R-IN32M4-CL2 Programming Manual (Driver edition) 9. 9. Usage Note Usage Note When the power is rurned on or the GbE-PHY is reset (except software reset inside GbE-PHY), make sure to initialize the GbE-PHY (see 6.11.1 Initialization of GbE-PHY). In the initialization of GbE-PHY, settings relating to characteristics and performance of the GbE-PHY are done. R18UZ0038EJ0200 Mar 16, 2016 Page 83 of 83 R-IN32M3 Series Programming Manual (Driver edition) REVISION HISTORY Rev. REVISION HISTORY R-IN32M4-CL2 Programming Manual (Driver edition) Date Description Page 0.01 Nov 20, 2015 - 1.00 Jan 29, 2016 11 13-19 Summary First edition issued Figure 1.1 Layer Construction Diagram of Sample Software, modified 2. File Construction Directory construction of sample software, modified 25 28-29 Figure 3.7 Program Allocation Example, modified 5. R-IN32M4-CL2 Register Definition Information of register definition, added 30, Table 6.1 32-bit Timer (TAUJ2) Driver Function List 32 6.2 32-bit Timer (TAUJ2) Control Unsupported function “timer_onecount_swtrg_init”, deleted 31, 59 Table 6.7WDT Driver Function List 6.8.2 Initialization of Watchdog Timer (Enable 75% Interrupt) Function “wdt_interrupt_init”, added 31, 63-67 Table 6.8 16-bit Timer (TAUD) Driver Function List 6.9 16-bit Timer (TAUD) Control Driver of “16-bit timer (TAUD)”, added 35, 68-72 Table 6.9 A/D Converter Driver Function List 6.10 A/D Converter Control Driver of “A/D converter”, added 85-86 2.00 Mar 16, 2016 Update log of run result at 8.1.2 Result of Implementation 87 Modify description of GbE-PHY initiarization at 9. Usage Note 12 Table 1.1 List of Software Development Tools (Tool Chain) Add information of ARM μVision 17-20 Add directory construction of ARM μVision at 2. File Construction 43 Add remark about function at 6.4.1 Initialization of IIC Controller 32, Table 6.6 Serial FlashROM Driver Function List 58-59 6.7.2 Initialization of SPI Bus Controller (Fast Read Dual I/O) 6.7.3 Initialization of SPI Bus Controller (Fast Read Quad I/O) Function“srom_dual_init” and “srom_quad_init”, added 78 Discription about device-dependence is added at 7. Middleware 78, Table 7.2 Serial FlashROM Driver Function List 85-86 7.3.2 Initialization of Serial FlashROM Controller (Fast Read Dual I/O) 7.3.3 Initialization of Serial FlashROM Controller (Fast Read Quad I/O) Function “sflash_dual_init” and “sflash_quad_init”, added 84-89 Update function and modify description at 7.3 Serial FlashROM Control C- 1 R-IN32M3 Series Programming Manual (Driver edition) REVISION HISTORY [Memo] C- 2 R-IN32M4-CL2 Programming Manual (Driver edition) Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. 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