Transcript
Nicholas Liu
©2006. Renesas Technology Corp., All rights reserved.
Agenda - -SoC -
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©2006. Renesas Technology Corp., All rights reserved.
Agenda -
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SoC
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©2006. Renesas Technology Corp., All rights reserved.
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There is display, there is TV.
1. 2. 3. 4. 5. 6.
USB dongle for PC/Notebook. PMP/DVD player, Digital Frame. STB for car. (12+1 segment) LCD TV for public advertisement. Game player. Ex: NDS, PSP Mobile Phone.
Mobile phone is still the potential market. , 20073,010 2010 1.5 . (source: )
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©2006. Renesas Technology Corp., All rights reserved.
Agenda - -SoC -
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©2006. Renesas Technology Corp., All rights reserved.
PLAN
NEW
SH-Mobile G1
SH-Mobile G2
MP in Q3/’08
Under Mass Production
SHSH-Mobile R2
SH-Mobile R Mobile Multi Media Products SH-
SHSH-Mobile 3A
SH-Mobile G3
SH-Mobile G4 Under Consideration SHSH-Mobile R3
PLAN
SH-Mobile5
SH-Mobile4
SHSH-Mobile 3AS
PLAN
NEW
SHSH-Mobile 3
HD-Engine
Graphic Engine
SH-Mobile L3V2 SHSH-Mobile L3V SHSH-Mobile J3
Under Development SH-Mobile UL2
NEW
PLAN
SH-Mobile UL3
SHSH-Mobile UL SHSH-Mobile L2
Timeframe
7
2004 Strictly confidential
2005
2006 ©2006. Renesas Technology Corp., All rights reserved.
2007
2008
2009
Key Technology of SoC
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©2006. Renesas Technology Corp., All rights reserved.
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01
. 23
)4 5 !6
Now
SH-MobileR2
SH-MobileR/R+
Now
SH-Mobile3AS CPU 216MHz
DSP
Now
CPU 266MHz
- High Performance
VIDEO HW JPEG HW VPU4
ssssoorr e c o r e r P roc MMaassteter P
2DG HW
USB2.0FS func
5M Cam I/F
TSI/F
SDRAM
SH-MobileL3V CCoomp mpaannion ion CPU - Lower power - Lower price
216MHz
DSP
VIDEO HW VPU4
FPU
VIDEO HW HDD I/F VPU5F USB2.0HS Host/func
2DG HW
USB2.0HS func
5M Cam I/F
VIDEO HW JPEG HW VPU4 3DG HW
DSP
CPU 400MHz
5M Cam I/F
TSI/F
Now
Now
SH-MobileUL
cchhip s ip soolul tio utionn
CPU 266MHz
DSP
VIDEO HW VPU5F
5M Cam I/F TSI/F
TV OUT
SDRAM
TSI/F
SDRAM
2005 9
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2006 ©2006. Renesas Technology Corp., All rights reserved.
TSI/F
2007
©2006. Renesas Technology Corp., All rights reserved.
CONCEPT
7 8 9 -/ 2 3 . . 2 0: 1 0 .0
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©2006. Renesas Technology Corp., All rights reserved.
0
Flexible & Higher Performance
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©2006. Renesas Technology Corp., All rights reserved.
Application Processor Block Diagram I2C I2C
SCIF SCIF (UART) (UART)
1ch 1ch
PORT PORT
1ch 1ch
RSRAM RSRAM 2KB 2KB
Host Interface MFI MFI
2-way Cache
VIO5 VIO5 VEU2 VEU2
BEU2 BEU2
Demodulator I/F MSIOF MSIOF (SPI) (SPI) 1ch 1ch
TSIF TSIF
(enhanced (enhanced ver) ver)
BSC BSC (SRAM (SRAM I/F) I/F)
16kB
SPI Boot ROM VPU5F
MPEG4 SP enc/dec ASP/VCASP/VC-1 dec H.264 Baseline dec
DMAC DMAC 6ch 6ch
MMU MMU CPG CPG
PLL/DLL PLL/DLL
INTC INTC TMU TMU
or operation - Storage 66MHz Demod. Interface - VGA size ENCODE/DECODE SDHI SDHI - 30fps 1ch 1ch - MPEG4, H.264, WMV9(VC-1) - CIF30fps x 2ch (PiP) Capable Audio Interface SIU2 SIU2 (I2S) (I2S) 2ch 2ch
Video Output LCDC LCDC
32bitx3ch 32bitx3ch
RWDT RWDT
SBSC SBSC
SDRAM SDRAM I/F I/F
18-bit/ 18 18-bit/ Camera Camera out out func. func.
VOU BT601/656 output for NTSC/PAL
SH-MobileUL (90nm) 13
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©2006. Renesas Technology Corp., All rights reserved.
Video H/W
XYRAM
I:32kB/D:32kB
Video Input
CPU DSP 266MHz 1. High Performance
Application Processor Block Diagram I2C I2C
SCIF SCIF (UART) (UART)
1ch 1ch
PORT PORT
1ch 1ch
RSRAM RSRAM 2KB 2KB
Host Interface MFI 2. Various videoMFI output
2-way Cache
16kB
1ch 1ch
TSIF TSIF
(enhanced (enhanced ver) ver)
BSC BSC (SRAM (SRAM I/F) I/F)
SDHI SDHI 1ch 1ch
VPU5F
RGB/SYS interface for LCD VIO5 MPEG4 SP enc/dec VIO5 ASP/VC-1 dec YUV output for CameraIF ASP/VCVEU2 H.264 Baseline dec VEU2 BEU2 BEU2 BT601/656 output for TV Demodulator I/F MSIOF MSIOF (SPI) (SPI)
Storage or Demod. Interface
SPI Boot ROM
DMAC DMAC 6ch 6ch
MMU MMU CPG CPG
PLL/DLL PLL/DLL
INTC INTC TMU TMU
Audio Interface SIU2 SIU2 (I2S) (I2S) 2ch 2ch
Video Output LCDC LCDC LCDC
32bitx3ch 32bitx3ch
RWDT RWDT
SBSC SBSC
SDRAM SDRAM I/F I/F
1818--bit/ bit/ 18 18 18-bit/ 18-bit/ Camera Camera out out func. Camera Camera out outfunc. func. func.
VOU BT601/656 output for NTSC/PAL
SH-MobileUL (90nm) 14
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©2006. Renesas Technology Corp., All rights reserved.
DSP
XYRAM
I:32kB/D:32kB
Video Input
-
CPU 266MHz
Application Processor Block Diagram I2C I2C
SCIF SCIF (UART) (UART)
1ch 1ch
PORT PORT
1ch 1ch
RSRAM RSRAM 2KB 2KB
Host Interface MFI MFI
2-way Cache
VEU2 VEU2
BEU2 BEU2
Demodulator I/F MSIOF MSIOF (SPI) (SPI) 1ch 1ch
TSIF TSIF
(enhanced (enhanced ver) ver)
BSC BSC (SRAM (SRAM I/F) I/F)
16kB
Storage or Demod. Interface
SPI Boot ROM
SDHI SDHI 1ch 1ch
VPU5F
MPEG4 SP enc/dec ASP/VCASP/VC-1 dec H.264 Baseline dec
Audio Interface SIU2 SIU2 (I2S) (I2S)
2ch 2ch Demodulator I/F DMAC DMAC3. Various INTC
INTC
6ch 6ch
MMU MMU -
Video Output
TMU TMU MSIOF (SPI master LCDC LCDC or slave) 32bitx3ch 32bitx3ch 18-bit/ 18 18-bit/ - TSIF (MPEG2 TS serial) Camera Camera out out func. func. CPG CPG RWDT RWDT SDHI (SDIO interface) PLL/DLL PLL/DLLVOU -SBSC BSC (SRAM interface, BT601/656 output data=8bits) SBSC SDRAM SDRAM I/F I/F
for NTSC/PAL
SH-MobileUL (90nm) 15
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DSP
XYRAM
I:32kB/D:32kB
Video Input VIO5 VIO5
CPU 266MHz
©2006. Renesas Technology Corp., All rights reserved.
Application Processor Block Diagram I2C I2C
SCIF SCIF (UART) (UART)
1ch 1ch
PORT PORT
1ch 1ch
RSRAM RSRAM 2KB 2KB
Host Interface MFI MFI Video Input VIO5 VIO5 VEU2 VEU2
BEU2 BEU2
Demodulator I/F MSIOF MSIOF (SPI) (SPI) 1ch 1ch
TSIF TSIF
(enhanced (enhanced ver) ver)
BSC BSC (SRAM (SRAM I/F) I/F)
CPU 266MHz
4. Video/Graphic H/W process XYRAM
2-way Cache
16kB
I:32kB/D:32kB
Storage or Demod. Interface unnecessary S/W
No need unnecessary S/W process - Blending SDHI SDHI 1ch 1ch Color conversion VPU5F MPEG4 SP-enc/dec Resizing… SPI Boot ROM
ASP/VCASP/VC-1 dec H.264 Baseline dec
DMAC DMAC 6ch 6ch
MMU MMU CPG CPG
PLL/DLL PLL/DLL
INTC INTC TMU TMU
Audio Interface SIU2 SIU2 (I2S) (I2S) 2ch 2ch
Video Output LCDC LCDC
32bitx3ch 32bitx3ch
RWDT RWDT
SBSC SBSC
SDRAM SDRAM I/F I/F
18-bit/ 18 18-bit/ Camera Camera out out func. func.
VOU BT601/656 output for NTSC/PAL
SH-MobileUL (90nm) 16
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DSP
©2006. Renesas Technology Corp., All rights reserved.
Reduce system cost
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©2006. Renesas Technology Corp., All rights reserved.
Cost reduction plan ! " #$ % &' & $ ()( & * % &' $ % &' * " +* ,-. +
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©2006. Renesas Technology Corp., All rights reserved.
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System Example Camera I2C I2C
SD card NAND Flash
Host Processor Async bus
SCIF SCIF (UART) (UART)
1ch 1ch
PORT PORT
1ch 1ch
RSRAM RSRAM 2KB 2KB
Host Interface MFI MFI
2-way Cache
VIO5 VIO5 VEU2 VEU2
BEU2 BEU2
ISDB/DMB tuner DVBDVB-H tuner
16kB
SPI Boot ROM VPU5F
MPEG4 SP enc/dec ASP/VCASP/VC-1 dec H.264 Baseline dec
DMAC DMAC
INTC INTC
1ch 1ch
MMU MMU
TMU TMU
TSIF TSIF
CPG CPG
Demodulator I/F MSIOF MSIOF (SPI) (SPI)
(enhanced ) ver (enhanced ver) ver)
BSC BSC (SRAM (SRAM I/F) I/F)
6ch 6ch
PLL/DLL PLL/DLL
DSP
XYRAM
I:16kB/D:16kB
Video Input
CPU 266MHz
32bitx3ch 32bitx3ch
RWDT RWDT
SBSC SBSC
SDRAM SDRAM I/F I/F
Storage or Demod. Interface SDHI SDHI 1ch 1ch
Audio Interface SIU2 SIU2 (I2S) (I2S) 2ch 2ch
Video Output LCDC LCDC
18-bit/ 18 18-bit/ Camera . func Camera out out func. func.
VOU BT601/656 output for NTSC/PAL
SH-MobileUL (90nm) NTSC/PAL Encoder/DAC
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©2006. Renesas Technology Corp., All rights reserved.
Sound DAC
.2
0/2
CPU 216MHz
Main system 1st Step
VIDEO HW VPU5F
DTV
WiFi
Navi
DSP
5M Cam IF TSI/F SDRAM
0
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CPU 266MHz
Navi
2nd Step
USB2.0HS DTV func
2DG HW
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DSP WiFi
VIDEO HW JPEG HW VPU4
5M Cam I/F
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©2006. Renesas Technology Corp., All rights reserved.
+
TSI/F
+
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1 1
1 1
Agenda - -SoC
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©2006. Renesas Technology Corp., All rights reserved.
Block Diagram of DTV Middleware
SH-Mobile
I2C
Tuner
TS IF
Tuner Control
VPU
TS Buff
Demux
H.264 Dec
VIO VEU BEU Rotate Resize
Tuner Control
BML Browser
DSM-CC
Browser Bitmap for data broadcast
File System Flash ROM 22
Strictly confidential
LCD
SIU
DAC
Subtitle Dec
M FI
Section Data
LCDC
Section Manager Recorder Player
DTV Middleware
AVT sync Play control
Blend
HE AAC Dec PCM Buff Clock Recover y
©2006. Renesas Technology Corp., All rights reserved.
Codec
SDIO
SD
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!" # $ % # & ' !" ( ) *"+ , - . DMB Module API for Application EMB Engine (UDMB)
Codec Manager (UAV)
OS Driver layer Direct Draw Driver Audio Driver/Display Driver
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©2006. Renesas Technology Corp., All rights reserved.
Sample DMB player Application
* " + / * ( / & / + , + 0 .1 )
Realization of 3 layers Overlay Windows + DMB Player + Video In Case DMB Full Screen + Video In Case
Overlay Layer 1 (Video In Player)
Overlay Layer 1 (Video In Player)
Overlay Layer 2 (DMB Player) Windows Main Frame
Overlay Layer 2 (DMB Player)
480
800
800
Case 26
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480
Case2
BEU:Blend Engine Unit (SH-MobileR Overlay Function
©2006. Renesas Technology Corp., All rights reserved.
CMMB ISDB-T ! " # $ % & ' ( # $ ) * % & + , - . / 0 1 2 Tuner Processor 3 4 5 6 7 8 9 Semiconductor vendor : ; 9 < = ) * % & S/W turn-key > ? @ A
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©2006. Renesas Technology Corp., All rights reserved.
