Transcript
Neo_AM8X2 Smart Module Hardware User Guide
Version 1.2
Neo_AM8X2 Android Module Hardware User Guide
Copyright © Neoway Technology Co., Ltd 2015. All rights reserved.
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is the trademark of Neoway Technology Co., Ltd.
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Notice
The information in this document is subject to change without notice due to product version update or other reasons. Every effort has been made in preparation of this document to ensure accuracy of the contents, but all statements, information, and recommendations in this document do not constitute a warranty of any kind, express or implied.
Neoway provides customers complete technical support. If you have any question, please contact your account manager or email to the following email addresses:
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Neo_AM8X2 Android Module Hardware User Guide
Revision Record Issue
Modified By
Contents
Date
V1.0
Tian, Charles
Initial draft
2014-08
V1.1
Tian
Revised
2015-02
V1.2
Tian, Li
Revised
2015-03
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Neo_AM8X2 Android Module Hardware User Guide
Contents About This Document ......................................................................................................... 1 1 Introduction to AM8X2..................................................................................................... 1 1.1 Overview ............................................................................................................................................ 1 1.2 Block Diagram ................................................................................................................................... 1 1.3 Specifications ..................................................................................................................................... 2 1.4 Order Information ............................................................................................................................... 5
2 Pin Description and PCB Foot Print .............................................................................. 6 2.1 Specifications and Encapsulation ....................................................................................................... 6 2.2 Pin Definition ..................................................................................................................................... 8 2.3 PCB Foot Print ................................................................................................................................. 18
3 Power Supply Interfaces ................................................................................................ 20 3.1 Power Supply and Switch Interfaces ................................................................................................ 20 3.2 Power-On.......................................................................................................................................... 23 3.3 Hard Reset ........................................................................................................................................ 24 3.4 Hard Power-off ................................................................................................................................. 25 3.5 VRTC Power Supply ........................................................................................................................ 26 3.6 Battery Management ........................................................................................................................ 26
4 Video I/O Interfaces ........................................................................................................ 28 4.1 LCD Interfaces ................................................................................................................................. 28 4.1.1 WVGA .................................................................................................................................... 28 4.1.2 720P ........................................................................................................................................ 33 4.2 Touchscreen Interfaces ..................................................................................................................... 34 4.3 Camera Interfaces ............................................................................................................................. 35 4.3.1 Main Camera ........................................................................................................................... 35 4.3.2 Sub-Camera ............................................................................................................................. 36 4.3.3 Design Cautions ...................................................................................................................... 38 4.3.4 Camera Power Supply ............................................................................................................. 39 4.4 Design Cautions ............................................................................................................................... 40
5 Audio Interface ................................................................................................................ 41 5.1 Audio Input ....................................................................................................................................... 41 5.2 Audio Output .................................................................................................................................... 41 5.3 Headphone Interfaces ....................................................................................................................... 42 5.4 Audio Design Cautions ..................................................................................................................... 44
6 Peripheral Interfaces ....................................................................................................... 45 6.1 USB Interface ................................................................................................................................... 45 6.2 SIM Card Interface ........................................................................................................................... 46 6.3 SDIO................................................................................................................................................. 48
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Neo_AM8X2 Android Module Hardware User Guide 6.3.1 SD card .................................................................................................................................... 48 6.3.2 SD Peripheral Interface ........................................................................................................... 49 6.4 GPIO................................................................................................................................................. 49 6.4.1 UART ...................................................................................................................................... 49 6.4.2 I2C........................................................................................................................................... 50 6.4.3 SPI ........................................................................................................................................... 50 6.5 ADC .................................................................................................................................................. 51 6.6 Other Interfaces ................................................................................................................................ 51 6.6.1 Motor Driver Interface ............................................................................................................ 51 6.6.2 Key Backlight Driver .............................................................................................................. 52
7 RF Interface....................................................................................................................... 54 7.1 2G/3G RF Design and PCB Layout ................................................................................................. 54 7.2 WIFI/BT RF Design and PCB Layout .............................................................................................. 55 7.3 GPS RF Design and PCB Layout ..................................................................................................... 57 7.3.1 GPS Impedance ....................................................................................................................... 57 7.3.2 Active GPS Antenna Design.................................................................................................... 57 7.3.3 Passive GPS Antenna Design .................................................................................................. 58 7.4 FM RF Design and PCB Layout ....................................................................................................... 59
8 Commissioning Interface ............................................................................................... 60 8.1 Commissioning Log Print Interface ................................................................................................. 60 8.2 FORCE_USB_BOOT Interface........................................................................................................ 60 8.3 ADB Commissioning and Program Download & Update Interface ................................................. 60 8.4 JTAG Interface ................................................................................................................................. 61
9 Electric Features and Reliability ................................................................................... 63 9.1 Electric Feature................................................................................................................................. 63 9.2 Temperature ...................................................................................................................................... 63 9.3 Current .............................................................................................................................................. 63 9.4 ESD Protection ................................................................................................................................. 65
10 RF Features...................................................................................................................... 67 10.1 Work Band ...................................................................................................................................... 67 10.2 TX Power and RX Sensitivity ........................................................................................................ 67
11 Mounting the Module onto the Application Board................................................ 68 12 Package ............................................................................................................................ 68 13 Abbreviations ................................................................................................................. 69
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Table of Figures Figure 1-1 AM8X2 block diagram........................................................................................................... 2 Figure 2-1 TOP view of AM8X2 ............................................................................................................. 7 Figure 2-2 PCB foot print recommended for AM8X2 (unit: mm) ......................................................... 19 Figure 3-1 Current peaks and voltage drops .......................................................................................... 20 Figure 3-2 Capacitors used for the power supply .................................................................................. 21 Figure 3-3 Reference design of power supply control ........................................................................... 21 Figure 3-4 Reference design of power supply controlled by p-MOSFET ............................................. 22 Figure 3-5 Reference designs of separated power supply ...................................................................... 23 Figure 3-6 Push switch controlling ........................................................................................................ 23 Figure 3-7 MCU controlling .................................................................................................................. 24 Figure 3-8 AM8X2 power-on sequence ................................................................................................. 24 Figure 3-9 Reset controlled by button ................................................................................................... 24 Figure 3-10 Reset circuit with triode separating .................................................................................... 25 Figure 3-11 AM8X2 reset sequence....................................................................................................... 25 Figure 3-12 AM8X2 power-off sequence .............................................................................................. 26 Figure 3-13 VRTC design in the module ............................................................................................... 26 Figure 3-14 Battery connections ............................................................................................................ 27 Figure 4-1 Reference MIPI circuits with common mode chokes .......................................................... 29 Figure 4-2 AM8X2 LCD backlight chipset ........................................................................................... 30 Figure 4-3 Power supply of AM8X2 LCD driver .................................................................................. 31 Figure 4-4 Reference design of MOS switch circuit.............................................................................. 32 Figure 4-5 Reference design of LCD interface ...................................................................................... 33 Figure 4-6 Reference design of touchscreen interface ........................................................................... 35 Figure 4-7 Reference design of the main camera interface.................................................................... 36 Figure 4-8 Reference design of sub-camera interface ........................................................................... 37 Figure 4-9 Scan direction of 3264*2448 LCD ...................................................................................... 38 Figure 4-10 Reference design of customized camera ............................................................................ 38 Figure 4-11 Adjustment of camera sensor ............................................................................................. 39 Figure 4-12 Reference design of the camera power supply ................................................................... 39 Figure 4-13 Reference design of the main camera power supply .......................................................... 40 Figure 5-1 Reference design of MIC connection ................................................................................... 41
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Neo_AM8X2 Android Module Hardware User Guide Figure 5-2 Reference design of EAR/SPK connections ........................................................................ 42 Figure 5-3 Reference design of headphone without FM ........................................................................ 43 Figure 5-4 Headphone interface ............................................................................................................ 43 Figure 6-1 USB circuit .......................................................................................................................... 45 Figure 6-2 USB OTG circuit ................................................................................................................. 46 Figure 6-3 Reference design of SIM card interface ............................................................................... 47 Figure 6-4 Reference design of TF card interface ................................................................................. 48 Figure 6-5 Reference design of the UART interface ............................................................................. 50 Figure 6-6 Reference design of I2C ....................................................................................................... 50 Figure 6-7 Reference design of the SPI ................................................................................................. 51 Figure 6-8 Reference design of motor circuit ........................................................................................ 52 Figure 6-9 Reference design of key backlight circuit ............................................................................ 53 Figure 7-1 Reference of antenna matching design ................................................................................ 54 Figure 7-2 Recommended RF PCB design ............................................................................................ 54 Figure 7-3 Encapsulation specifications of Murata RF connector ......................................................... 55 Figure 7-4 RF connections..................................................................................................................... 55 Figure 7-5 Antenna layout ..................................................................................................................... 56 Figure 7-6 Clearance around the antenna .............................................................................................. 56 Figure 7-7 GPS RF structure ................................................................................................................. 57 Figure 7-8 Power supply reference for active antenna .......................................................................... 58 Figure 7-9 Passive GPS Antenna Design ............................................................................................... 58 Figure 7-10 Reference design of the headphone circuit with FM function ........................................... 59 Figure 8-1 Reference design of the fastboot interface ........................................................................... 60 Figure 8-2 Reference design of JTAG commissioning interface ........................................................... 62
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Table of Tables Table 1-1 AM8X2 baseband and specifications ....................................................................................... 2 Table 2-1 AM8X2 dimensions ................................................................................................................. 6 Table 2-2 AM8X2 pin definition .............................................................................................................. 8 Table 3-1 Power supply pins .................................................................................................................. 20 Table 3-2 Battery pin description ........................................................................................................... 27 Table 4-1 WVGA LCD description........................................................................................................ 28 Table 4-2 Backlight driver pin ............................................................................................................... 30 Table 4-3 2.85V LDO pin ...................................................................................................................... 31 Table 4-4 Pin controlled by MOS switch ............................................................................................... 31 Table 4-5 720P LCD pins ....................................................................................................................... 33 Table 4-6 Touchscreen pins .................................................................................................................... 34 Table 4-7 Main camera pins .................................................................................................................. 35 Table 4-8 Sub-camera pins..................................................................................................................... 37 Table 4-9 1.2V LDO pin ........................................................................................................................ 40 Table 5-1 Audio input pins ..................................................................................................................... 41 Table 5-2 Audio output pins ................................................................................................................... 42 Table 5-3 Headphone pins ..................................................................................................................... 42 Table 5-4 Volume pins ........................................................................................................................... 44 Table 6-1 USB Device pins.................................................................................................................... 45 Table 6-2 USB-OTG pins ...................................................................................................................... 46 Table 6-3 SIM1 pins .............................................................................................................................. 47 Table 6-4 SIM2 pins .............................................................................................................................. 47 Table 6-5 TF card pins ........................................................................................................................... 49 Table 6-6 ADC pin ................................................................................................................................. 51 Table 6-7 Motor driver pin ..................................................................................................................... 52 Table 6-8 Key backlight pin ................................................................................................................... 52 Table 8-1 Commissioning UART .......................................................................................................... 60 Table 8-2 Fastboot (Enable) ................................................................................................................... 60 Table 8-3 USB commissioning interface, program download & update interface ................................. 60 Table 8-4 JTAG interface ....................................................................................................................... 61 Table 9-1 Electric feature of AM8X2 .................................................................................................... 63
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Neo_AM8X2 Android Module Hardware User Guide Table 9-2 AM8X2 temperature feature .................................................................................................. 63 Table 9-3 Current feature ....................................................................................................................... 63 Table 9-4 AM8X2 ESD feature .............................................................................................................. 65 Table 10-1 AM8X2 work band .............................................................................................................. 67 Table 10-2 AM8X2 RF power and RX sensitivity ................................................................................. 67
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Neo_AM8X2 Android Module Hardware User Guide
About This Document This document details the features, indicators, and reference standards of the AM8X2 module and provides reference for the hardware design of each interface. This user guide can help you complete wireless communication application easily. For information about the AM8X2 RF band, inquiry our sales engineer.
1 Introduction to AM8X2 1.1 Overview AM8X2 is an industrial smart module that is developed on Qualcomm platform and supports Android OS. Its dimensions are 32 mm x 50 mm x 2.6 mm. It is well applicable to in-vehicle computers, multimedia terminals, smart homes, IoT terminals, etc, with the following features:
Quad-core ARM Cortex-A7 processors, 1.2 GHz main frequency, 1MB L2 cache, 28 nm
4Gb LPDDR2 RAM; 4GB Nand Flash, eMMC interface, supporting at most 32GB
GSM/WCDMA/HSPA+, CDMA2000/EV-DOrA, WiFi 802.11b/g/n, BT4.0, GPS/GLONASS/BEIDOU communications modes; FM radio
Android 4.3 OS
MIPI interface LCD, supporting at most 720P
MIPI interface dual-camera, among which the main camera supports at most 8MP
Multiple-channel audio I/O, supporting stereo headphone
USB2.0 high-speed serial port, SDIO3.0, 15-bit ADC, UART, SPI, I2C, PWM, GPIO, charging management, etc.
1.2 Block Diagram The following figure shows the block diagram of AM8X2.
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Neo_AM8X2 Android Module Hardware User Guide
Figure 1-1 AM8X2 block diagram
Power supply input
RF section
Power Management
Analog interface Audio
Baseband
Digital single interface
1.3 Specifications Table 1-1 AM8X2 baseband and specifications Specifications
Description
Power supply
VBAT 3.5V to 4.2V, typical value 3.9V Flight mode: 1.6 mA
Current Sleeping mode: 4. 0mA Operating temperature
-40℃ to +85℃
Baseband features Quad-core ARM Cortex-A7 processor Processor
Main fr0equency: 1.2 GHz 1MB L2 cache
Multimedia processor
QDSP6 v5 core Operation frequency 700 MHz
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Neo_AM8X2 Android Module Hardware User Guide
256KB L2 cache 4Gb LPDDR2 SDRAM Memory
32bit bus Max. operation frequency 333MHz 4GB NAND Flash
Storage
Embedded EMMC Max. 32GB
RF feature — AM812 Band Sensitivity
Transmit power
Protocol
GSM850/EGSM900/DCS1800/PCS1900 WCDMA 2100 < -107 dBm
GSM850/EGSM900: +33dBm (Power Class 4)
DCS1800/PCS1900: +30dBm (Power Class 1)
EDGE 850M/900MHz: +27dBm (Power Class E2)
EDGE1800MHz/1900MHz: +26dBm (Power Class E2)
WCDMA/HSDPA: +23dBm (Power Class 3)
GSM/GPRS/EGPRS WCDMA R99, Rel5 HSDPA, Rel6 HSUPA, Rel7 HSPA+ (21/5.67 Mbps)
RF feature — AM862 Band Sensitivity
Transmit power
CDMA800/CDMA1900, EV-DO 800/1900 GSM850/EGSM900/DCS1800/PCS1900 < -107 dBm
CDMA 800/EV-DO 800: +24dBm (Power Class III)
CDMA 1900/EV-DO 1900: +24dBm (Power Class II)
GSM850/EGSM900: +33dBm (Power Class 4)
DCS1800/PCS1900: +30dBm (Power Class 1)
EDGE 850M/900MHz: +27dBm (Power Class E2)
EDGE1800MHz/1900MHz: +26dBm (Power Class E2)
CDMA2000 1x, 1x Advanced Protocol
1xEV-DOr0, 1xEV-DOrA GSM/GPRS/EGPRS
Common RF feature Satellite positioning
GPS (default) /GPS+ BEIDOU/GPS+GLONASS
Antenna feature
50Ω impedance
Multimedia Display interface
4 groups of MIPI_DSI, each of which supports 1Gbps
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Neo_AM8X2 Android Module Hardware User Guide
Support WVGA (two groups of MIPI_DSI), at most 720p (4 groups of MIPI_DSI) 24bit color depth MIPI_CSI, each group of which support at most 1 Gbps rate, supporting 2 cameras Camera interface
Rear camera uses two groups of MIPI_CSI, supporting at most 8MP Front camera uses one group of MIPI_CSI, supporting at most 0.3MP Coding
Video processing
30 fps 720p (MPEG-4/H.264 baseline)
30 fps FWVGA (H264/H263/MP4)
Decoding
Graphics processing unit
30 fps 720p (MPEG-4/H.263/H.264 /DivX 4/5/6) 30 fps FWVGA(VP8/VC1)
Adreno 302, at most 400MHz 3D graphics processing API supports OpenGL ES 1.x, 2.0, 3.0(Halti)w/GLSL, C2D, and OpenCL 1.1
Audio Voice encoding/decoding supports G711, Raw PCM, QCELP; EVRC, -B, -WB; AMR-NB, -WB; GSM-EFR, -FR, -HR Encoder/decoder
Audio encoding/decoding supports MP3; AAC, AAC+, eAAC; AMR-NB, -WB, G.711, WMA 9/10 Pro Noise rejection
Audio input
3 groups of analog MIC input, embedding internal bias Class-G headphone amplifier
Audio output
Class-G differential receiver amplifier Class-D speaker amplifier
Connection feature UART
At most 4 Mbps, 6 groups
I2C
Multiple groups of I2C devices
SPI UIM USB SDIO
Host mode At most 52Mbps 2 groups, 1.8V/2.85V dual-voltage adaptive 1 group of USB2.0 high-speed interface Only DEVIECE mode Supporting SD3.0 and SD/MMC cards
Wireless connection 2.4G single band, supporting 802.11b/g/n, at most 72Mbps WLAN
Wake-on-WLAN (WoWLAN) Ad-Hoc mode WAPI supports SMS4 hardware encryption
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AP mode Wi-Fi Direct Bluetooth FM
BT4.0 LE Supporting Rx, 76 to 108MHz, channel spacing of 50 kHz RDS (Europe) RBDS (USA)
Commissioning interfaces JTAG
JTAG interface
Fastboot mode
Forcibly enable USB control
1.4 Order Information Specifications
Description
AM812-1-AAxx
WCDMA 2100+ GSM900/DCS1800
AM862-1-AAxx
CDMA 800/EV-DO 800
AM8X2-1- AAxx
Customized software/hardware versions
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Neo_AM8X2 Android Module Hardware User Guide
2 Pin Description and PCB Foot Print 2.1 Specifications and Encapsulation Table 2-1 AM8X2 dimensions Specification
AM8X2
Dimensions
32mm*50mm*2.6mm (H x W x D)
Weight
5.0g
Encapsulation
240 Pin LGA
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Neo_AM8X2 Android Module Hardware User Guide
Figure 2-1 TOP view of AM8X2
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Neo_AM8X2 Android Module Hardware User Guide
2.2 Pin Definition Table 2-2 AM8X2 pin definition Pin
Name
General Function
Level Feature (V)
1
VBAT
Battery
3.5~4.2
2
VCC_UIM1
UIM 1Power
1.8/2.85
3
UIM1_DATA
UIM1_DATA
1.8/2.85
B-PD:nppukp
4
UIM1_CLK
UIM1_CLK
1.8/2.85
B-PD:nppukp
5
UIM1_RESET
UIM1_RESET
1.8/2.85
B-PD:nppukp
6
UIM1_DETEC
UIM1_DETEC
1.8
B-PD:nppukp
7
VCC_USBIN
USB Power
5
8
NC
NC
9
GND
GND
10
USB_DP
USB_DP
11
USB_DN
USB_DN
12
GND
GND
13
MAINMIC_N
Main MIC
14
GND
GND
15
MIPI_DSI0_LANE3_M
LCD
16
MIPI_DSI0_LANE2_M
LCD
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Interrupt
Pull (default: options)
SPI
UART
I2C
I/O
39
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GND
GND
18
MIPI_DSI0_CLK_M
LCD
19
GND
GND
20
MIPI_DSI0_LANE0_M
LCD
21
MIPI_DSI0_LANE1_M
LCD
22
GND
GND
23
TS_RST_N
Touchscreen
1.8
24
TS_INT_N
Touchscreen
1.8
25
TS_I2C_SDA
Touchscreen
26
TS_I2C_SCL
Touchscreen
27
GND
GND
28
SDC2_CLK
SD Card
29
SDC2_CMD
SD Card
30
SDC2_DATA0
SD Card
31
SDC2_DATA1
SD Card
32
SDC2_DATA2
SD Card
33
SDC2_DATA3
SD Card
34
GND
GND
35
SD_CARD_DET_N
SD Card
36
VIO_SD
SD Card Power
1.8/2.95
37
VCC_SD
SD Card Power
1.8/2.95
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B-PD:nppukp
SPI1_MOSI
BLSP1_UART_TX
0
B-PD:nppukp
SPI1_MISO
BLSP1_UART_RX
1
1.8
B-PD:nppukp
SPI1_CS_N
BLSP1_UART_CTS_N
BLSP1_I2C_SDA_A
2
1.8
B-PD:nppukp
SPI1_CLK
BLSP1_UART_RFR_N
BLSP1_I2C_SCL_A
3
►
►
B-PD:nppukp
42
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BLSP4
SPI4_CS_N
1.8
B-PD:nppukp
SPI4_CS_N
BLSP4_UART_CTS_N
BLSP4_I2C_SDA_A
88
39
BLSP4
SPI4_CLK
1.8
B-PD:nppukp
SPI4_CLK
BLSP4_UART_RFR_N
BLSP4_I2C_SCL_A
89
40
BLSP4
SPI4_MOSI
1.8
B-PD:nppukp
SPI4_MOSI
BLSP4_UART_TX
BLSP3_I2C_SDA_B
86
41
BLSP4
SPI4_MISO
1.8
►
B-PD:nppukp
SPI4_MISO
BLSP4_UART_RX
BLSP3_I2C_SCL_B
87
42
VIO_1P8V
VIO_1P8V
1.8
43
VCC_2P85V
VCC_2P85V
2.85
44
GND
GND
45
MIPI_CSI0_LANE1_P
Camera
46
GND
GND
47
MIPI_CSI0_LANE2_P
Camera
48
MIPI_CSI0_CLK_P
Camera
49
GND
GND
50
NC
NC
51
NC
NC
52
GND
GND
53
MIPI_CSI1_LANE0_M
Camera
54
MIPI_CSI1_CLK_P
Camera
55
GND
GND
56
SUBCAM_RESET
Camera
►
B-PD:nppukp
57
GND
GND
58
RF_ANT_2G_3G
Main ANT
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1.8
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GND
GND
60
GND
GND
61
CDC_HPH_L
Headset
62
CDC_HPH_REF
Headset
63
CDC_HPH_R
Headset
64
HEADSET MIC_P
Headset
65
GND
GND
66
GND
GND
67
FM_HEADSET
Headset
68
GND
GND
69
ANT_WIFI_BT
ANT_WIFI_BT
70
GND
GND
71
SUBMIC_GND
SUB MIC
72
GND
GND
73
NC
NC
74
GND
GND
75
NC
NC
76
GND
GND
77
RF_ANT_GPS
GPS ANT
78
GND
GND
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BLSP2
UART1_TX// Commissioning UART
1.8
B-PD:nppukp
SPI12_MOSI
BLSP2_UART_TX
BLSP1_I2C_SDA_B
4
80
BLSP2
UART1_RX//Commissi oning UART
1.8
B-PD:nppukp
SPI12_MISO
BLSP2_UART_RX
BLSP1_I2C_SCL_B
5
81
BLSP2
GPIO6
1.8
B-PD:nppukp
SPI12_CS_N
BLSP2_UART_CTS_N
BLSP2_I2C_SDA_A
6
82
BLSP2
GPIO7
1.8
B-PD:nppukp
SPI12_CLK
BLSP2_UART_RFR_N
BLSP2_I2C_SCL_A
7
83
SENSORS_I2C_SCL
IIC
1.8
B-PD:nppukp
SPI13_CLK
BLSP3_UART_RFR_N
BLSP3_I2C_SCL_A
11
84
SENSORS_I2C_SDA
IIC
1.8
B-PD:nppukp
SPI13_CS_N
BLSP3_UART_CTS_N
BLSP3_I2C_SDA_A
10
85
BLSP3
UART2_TX
1.8
B-PD:nppukp
SPI13_MOSI
BLSP3_UART_TX
BLSP2_I2C_SDA_B
8
86
BLSP3
UART2_RX
1.8
►
B-PD:nppukp
SPI13_MISO
BLSP3_UART_RX
BLSP2_I2C_SCL_B
9
87
ACCL_INT2
Sensor
1.8
►
B-PD:nppukp
SPI1_CS2_N
82
88
MAG_INT
Sensor
1.8
►
B-PD:nppukp
SPI12_CS2_N
83
89
ACCL_INT1
Sensor
1.8
►
B-PD:nppukp
SPI4_CS1_N
81
90
ALSP_INT_N
Sensor
1.8
►
B-PD:nppukp
SPI13_CS1_N
80
91
VCC_2P85V
VCC_2P85V
2.85
92
VIO_1P8V
VIO_1P8V
1.8
93
NC
NC
94
NC
NC
95
BLSP5
UART3_TX
1.8
►
B-PD:nppukp
BLSP5_UART_TX
BLSP4_I2C_SDA_B
90
96
BLSP5
UART3_RX
1.8
►
B-PD:nppukp
BLSP5_UART_RX
BLSP4_I2C_SCL_B
91
97
NC
NC
98
NC
NC
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Neo_AM8X2 Android Module Hardware User Guide 99
GPIO/CLK1
N/A
100
GND
GND
101
GND
GND
102
GPIO/CLK2
GPIO97
103
NC
NC
104
VOL_DOWN
VOL +
1.8
►
B-PD:nppukp
105
VOL_UP
VOL -
1.8
►
B-PD:nppukp
106
RESIN_N
Reset
107
PWR_N
Power on
108
BAT_THERM
Battery
109
BAT_ID
Battery
110
VBAT_SNS
Battery
111
GND
GND
112
GND
GND
113
VCC_UIM2
VCC_UIM2
1.8/2.85
114
UIM2_DATA
UIM2_DATA
1.8/2.85
►
B-PD:nppukp
115
UIM2_CLK
UIM2_CLK
1.8/2.85
►
B-PD:nppukp
116
UIM2_RESET
UIM2_RESET
1.8/2.85
►
B-PD:nppukp
117
UIM2_DETECT
UIM2_DETECT
1.8
►
B-PD:nppukp
118
VCC_USBIN
USB Power
5
119
GPIO
N/A
Copyright © Neoway Technology Co., Ltd
94
97
35
95
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Neo_AM8X2 Android Module Hardware User Guide 120
GPIO
N/A
96
121
GND
GND
122
GND
GND
123
GND
GND
124
MAINMIC_P
Main MIC
125
GND
GND
126
MIPI_DSI0_LANE3_P
LCD
127
MIPI_DSI0_LANE2_P
LCD
128
GND
GND
129
MIPI_DSI0_CLK_P
LCD
130
GND
GND
131
MIPI_DSI0_LANE0_P
LCD
132
MIPI_DSI0_LANE1_P
LCD
133
DSI_LCD_TE0
LCD
1.8
134
LCD_ID
LCD
1.8
135
LCD_DIF
LCD
1.8
136
WLED_PWM
LCD
137
GND
GND
143
DSI_RST_N
LCD
1.8
144
CCI_I2C_SCL
CAM
1.8
B-PD:nppukp ►
12
B-PD:nppukp B-PD:nppukp
~ 144
Copyright © Neoway Technology Co., Ltd
►
B-PD:nppukp B-PD:nppukp
BLSP6_I2C_SCL
14
Neo_AM8X2 Android Module Hardware User Guide 145
CCI_I2C_SDA
CAM
1.8
B-PD:nppukp
146
STROBE_EN
LED flash
1.8
B-PD:nppukp
147
FLASH_EN
LED flash
1.8
B-PD:nppukp
148
MAINCAM_MCLK0
CAM
1.8
B-PD:nppukp
149
MAINCAM_RST_N
CAM
1.8
B-PD:nppukp
150
EXT_CAM_1P2V_EN
CAM
1.8
►
B-PD:nppukp
151
EXT_2P85V_EN
CAM
1.8
►
B-PD:nppukp
152
SUBCAM_MCLK1
CAM
1.8
►
B-PD:nppukp
153
GND
GND
154
MIPI_CSI0_LANE1_M
CAM
155
GND
GND
156
MIPI_CSI0_LANE2_M
CAM
157
MIPI_CSI0_CLK_M
CAM
158
GND
GND
159
NC
NC
160
NC
NC
161
GND
GND
162
MIPI_CSI1_LANE0_P
CAM
163
MIPI_CSI1_CLK_M
CAM
164
GND
GND
165
GND
GND
Copyright © Neoway Technology Co., Ltd
BLSP6_I2C_SDA
BLSP6_UART_RX SPI4_CS2_N 14
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Neo_AM8X2 Android Module Hardware User Guide 166
GND
GND
167
CDC_HS_DET
Headset
168
GND
GND
169
GND
GND
170
GND
GND
171
GND
GND
172
CDC_EAR_P
Headphone
173
CDC_EAR_M
Headphone
174
GND
GND
175
GND
GND
176
GND
GND
177
GND
GND
178
SUBMIC_P
SUB MIC
179
GND
GND
180
GND
GND
181
GND
GND
182
NC
NC
183
GND
GND
184
GND
GND
185
NC
NC
186
GPIO/EINT
GPIO/EINT
Copyright © Neoway Technology Co., Ltd
1.8
►
B-PD:nppukp
75
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Neo_AM8X2 Android Module Hardware User Guide 187
GPIO/EINT
GPIO/EINT
1.8
►
B-PD:nppukp
188
GPIO/EINT
GPIO/EINT
1.8
►
B-PD:nppukp
189
GPIO/EINT
GPIO/EINT
1.8
►
B-PD:nppukp
190
GPIO/EINT
GPIO/EINT
1.8
►
B-PD:nppukp
191
VDEBUG_1P8V
Power for USB Boot
1.8
192
JTAG_TDO
JTAG
193
JTAG_TDI
JTAG
194
JTAG_TMS
JTAG
195
JTAG_TCK
JTAG
196
JTAG_TRST_N
JTAG
197
JTAG_SRST_N
JTAG
198
JTAG_PS_HOLD
JTAG
199
FORCE_USB_BOOT
USB Boot
►
B-PD:nppukp
200
GPIO
USB_ID
►
B-PD:nppukp
201
NC
NC
202
NC
NC
203
NC
NC
204
GND
GND
205
SPKR_DRV_M
Speaker
206
SPKR_DRV_P
Speaker
207
GND
GND
Copyright © Neoway Technology Co., Ltd
1.8
SPI1_CS1_N
78 77
SPI13_CS2_N
84 74
SPI13_CS3_N BLSP6_UART_TX
92
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Neo_AM8X2 Android Module Hardware User Guide 208
VIB_DRV_N
Motor
209
LED_SINK
Current for LED
210
ADC_IN
N/A
211
LED
Indication LED
212
PM_GPIO
N/A
213
GPIO_101
OTG_PWR_EN
214
GPIO_PWR_FET
MOSFET control
215
GND
GND
1.8
►
B-PD:nppukp
SPI12_CS1_N
79
101 1.8
►
B-PD:nppukp
SPI12_CS3_N
99
~ 240
You can select the closer power supply pins based on your peripherals design layout because the 43/91 (VCC_2P85V) pins and 42/92 (VIO_1P8V) are connected internally. If you use only the general function of each pin, the commissioning workload will be the least. If you need to use custom functions of the pins, please contact our technical support engineers. Please refer to Neo_AM8X2 Smart Module Using Cautions and Manufacturing Recommendations when you perform PCB design, make stencils, and inspect the incoming materials. Please reserve commissioning interfaces when you design your product using our AM8X2 module. For details, see Chapter 8 Commissioning Interface.
2.3 PCB Foot Print LGA packaging is adopted to package the pins of AM8X2. Figure 2-2 shows the recommended PCB foot print.
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Neo_AM8X2 Android Module Hardware User Guide
Figure 2-2 PCB foot print recommended for AM8X2 (unit: mm)
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Neo_AM8X2 Smart Module Hardware User Guide
3 Power Supply Interfaces Table 3-1 Power supply pins I/O
Function
RESIN_N
I
Reset
PWR_N
I
Power on
Pin
Signal
1
VBAT
106 107
Remarks
3.1 Power Supply and Switch Interfaces VBAT is the main power supply of the module. Its input voltage ranges from 3.5 V to 4.3 V and the preferable value is 3.9V. It supplies power for baseband controller and RF power amplifier. The performance of the VBAT power supply is a critical path to module's performance and stability. The peak input current at the VBAT pin can be up to 3 A when the signal is weak and the module works at the maximum transmitting power. The voltage will encounter a drop in such a situation. The module might restart if the voltage drops lower than 3.5 V. Ensure that the trace between the VBAT pin and the power supply on PCB board is wide enough to ease the voltage drop in a burst. Figure 3-1 Current peaks and voltage drops
3A
Current
3.9 V Voltage
3.5 V Keep above 3.5 V 0 ms
3.7 ms
7.4 ms
10.7 ms
T
Figure 3-2 shows a recommended power supply design for the module.
Copyright © Neoway Technology Co., Ltd
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 3-2 Capacitors used for the power supply
Test point VBAT I_max
Power supply
AM8X2 D1 C1 C2 C3
C4 C5
Close to the module
In the circuit, you can use TVS at D1 to enhance the performance of the module during a burst. SMF5.0AG (Vrwm=5V&Pppm=200W) is recommended. A large bypass tantalum capacitor (220 μF or 100 μF) or aluminum capacitor (470 μF or 1000 μF) is expected at C1 to reduce voltage drops during bursts together with C2 (10 μF capacitor). In addition, you need to add 0.1 μF, 100 pF, and 33 pF filter capacitors to enhance the stability of the power supply. A controllable power supply is preferable if used in harsh conditions. The module might fail to reset in remote or unattended applications, or in an environment with great electromagnetic interference (EMI). You can use the EN pin on the LDO or DC/DC chipset to control the switch of the power supply as shown in Figure 3-3. MIC29302WU in the following figure is an LDO and outputs 3 A current to ensure the performance of the module. Figure 3-3 Reference design of power supply control
VBAT
PWR_EN EN
VOUT
MIC29302WU
10K
VCC_IN_5V VIN
ADJ 4.75K
100 uF TAN
TVS 5V
470uF 10 uF 0.1 uF 100pF 33pF TAN
0.1 uF
The alternative way is to use a p-MOSFET to control the module's power, as shown in Figure 3-4. When the external MCU detects the exceptions such as no response from the module or disconnection, power off/on can rectify the module exceptions. In Figure 3-4, the module is powered on when PWR_EN is set to high level.
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 3-4 Reference design of power supply controlled by p-MOSFET Q1
VCC_IN_3.9V
S
VBAT
D
C3 C1
C2
10 uF 0.1 uF
R4
G R3
PWR_EN
TVS 5V
100K
C4
C5
C6
470 uF 10 uF 0.1 uF 100pF
C7 33 pF
10K
R1 Q2 2K R2
10K
Q2 is added to eliminate the need for a high enough voltage level of the host GPIO. In case that the GPIO can output a high voltage greater than VCC_IN_3.9V - |VGS(th)|, where VGS(th) is the Gate Threshold Voltage, Q2 is not needed. Reference components:
Q1 can be IRML6401 or Rds(on) p-MOSFET which has higher withstand voltage and drain current.
Q2: a common NPN transistor, e.g. MMBT3904; or a digital NPN transistor, e.g. DTC123. If digital transistor is used, delete R1 and R2.
C3: 470 μF tantalum capacitor rated at 6.3V; or 1000 μF aluminum capacitor. If lithium battery is used to supply power, C3 can be 220 μF tantalum capacitor.
Protection Place a TVS diode (VRWM=5 V) on the VBAT power supply to ground, especially in automobile applications. For some stable power supplies, zener diodes can decrease the power supply overshoot. MMSZ5231B1T1G from ONSEMI and PZ3D4V2 from Prisemi are options.
Trace The trace width of primary loop lines for VBAT on PCB must be able to support the safe transmission of 2A current and ensure no obvious loop voltage decrease. Therefore, the trace width of VBAT loop line is required 2 mm and the ground should be as complete as possible.
Separation The module works in burst mode that generates voltage drops on power supply. And furthermore this results in a 217 Hz TDD noise through power (One of the way generating noise. Another way is through RF radiation). Analog parts, especially the audio circuits, are subjected to this noise, known as a "buzz noise" in GSM systems. To prevent other parts from being affected, it's better to use separated power supplies. The module shall be supplied by an independent power, like a DC/DC or LDO. See Figure 3-5.
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Neo_AM8X2 Smart Module Hardware User Guide
DC/DC or LDO should output rated peak current larger than 2 A. The inductor used in Reference Design (b), should be a power inductor and have a very low resistance. 10 μH with average current ability greater than 1.2A and low DC resistance is recommended. Figure 3-5 Reference designs of separated power supply DC-DC/LDO
Other circuit
Power Input
DC-DC/LDO Power Input
DC-DC/LDO
Other circuit
10 uF
AM8x2
AM8X2
Reference design (a)
Reference design (b)
Never use a diode to make the drop voltage between a higher input and module power. Otherwise, Neoway will not provide warranty for product issues caused by this. In this situation, the diode will obviously decrease the module performances, or result in unexpected restarts, due to the forward voltage of diode will vary greatly in different temperature and current.
EMC Considerations Place transient overvoltage protection components like TVS diode on power supply, to absorb the power surges. SMAJ5.0A/C could be a choice.
3.2 Power-On After powering on the VBAT pin, you can use PWR_N to start the module by inputting low-level pulse for 3 seconds. This pin is pulled up internally. Its typical high-level voltage is 1.8 V. Do not leave this pin disconnected. The following circuit is recommended to control PWR_N. Figure 3-6 Push switch controlling
S1
Copyright © Neoway Technology Co., Ltd
R1
PWR_N
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 3-7 MCU controlling
PWR_N
User_on R3
R2
If the module is powered on but the power-on sequence has not been completed, the states of each pin are uncertain. The power-on sequence of the module is shown as the following figure. Figure 3-8 AM8X2 power-on sequence
VBAT
30s 3s
PWR_N
OTHERS
Not defined
3.3 Hard Reset The RESIN_N pin is used to reset the module. It triggers module reset when you input low-level pulse for 3 seconds. This pin is pulled up internally. Its typical high-level voltage is 1.8 V. Leave this pin disconnected if you do not use it. If you use a 2.8V/3.3V IO system, it is recommended that you add a triode to separate it. Refer to the following design. Figure 3-9 Reset controlled by button S1
Copyright © Neoway Technology Co., Ltd
R1
RESIN_N
24
Neo_AM8X2 Smart Module Hardware User Guide
Figure 3-10 Reset circuit with triode separating
VDD_EXT
R2
2V8/3V3 R3
Q1
0V RESIN_N
In a circuit shown above, VDD_EXT=2.8V/3.3V/3.0V, R2=4.7K, R3=47K. Figure 3-11 shows the reset sequence. Figure 3-11 AM8X2 reset sequence
VBAT 3s RESIN_IN
40s OTHERS
Not defined
3.4 Hard Power-off The PWR_N input pin can be used to hard power off the module. Low-level pulse input for 13 seconds can trigger the power-off of the module. This pin is pulled up internally. Its typical high-level voltage is 1.8 V. Leave this pin disconnected if you do not use it. If you use a 2.8V/3.3V IO system, it is recommended that you add a triode to separate it. Refer to 3.3 Hard Reset. Figure 3-12 shows the hard power-off sequence.
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 3-12 AM8X2 power-off sequence
VBAT 13s PWR_N
OTHERS
Not defined
3.5 VRTC Power Supply VRTC is the pin that supplies power for the internal RTC. A 22 μF capacitor is connected to VRTC internally to make it invalid when you replace the power supply (battery) of the module. The module will update the RTC clock after it is powered on and connected to the network. Figure 3-13 shows the internal design of the VRTC pin. Figure 3-13 VRTC design in the module
AM8X2
RTC +
22uF
3.6 Battery Management Our AM8X2 module supports battery charging. For information about how to select proper battery, refer to GB /T18287-2000 Chinese National Standard for Lithium Ion batteries for mobile phones. Available voltages range between 3.5V to 4.2V. AM8X2 supports at most 1A charging current. Therefore, it is recommended that you connect ESD and capacitors to VBAT and BAT_THERM in parallel in case that abnormal electrical signals might damage the module.
Copyright © Neoway Technology Co., Ltd
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Neo_AM8X2 Smart Module Hardware User Guide
PDA, mobile POS and other mobile devices all use battery as power supply. For different batteries, you need to modify the charging/discharging curve in the software. AMX2 provides 4 pins for battery. Table 3-2 Battery pin description Pin
Signal
1
I/O
Function
Remarks
VBAT
Power supply input
3.5V~4.2V
108
BAT_THERM
Battery temperature check
Default NTC=10K
109
BAT_ID
Battery ID
Pulled down to ground by 47K
110
BAT_SNS
Battery SNS
Battery voltage check, battery
Ensure that the BAT_THERM pin is connected. Otherwise, the battery might fail to charge or the remaining power is displayed incorrectly. Figure 3-14 shows the connection of the battery pins. Figure 3-14 Battery connections
VBAT_SNS VBAT
TVS
C1 C2 VREF_BAT_THM
R1
R3
R_TH
VBAT_THERM R2
R_ID
BAT_ID GND
PMIC Battery Module
AM8X2
Ensure that the power consumption/current is lower than 8 mA (the value the software read) in standby mode if you use li-Ion battery for power supply and use module power supply pins (43/91 and 42/92) in your design. Otherwise, the remaining power might not be displayed accurately. Add DCDC/LDO compatible power supply design if you use external 1.8V and 2.85V power supply.
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Neo_AM8X2 Smart Module Hardware User Guide
4 Video I/O Interfaces AM8X2 video I/O interfaces are developed based on Mobile Industry Processor Interface (MIPI) standard to transmit high-speed digital signals. This standard is widely supported by main device manufacturers. So it is easy to get video devices that support this standard. For information about the peripherals that AM8X2 supports, contact our technical engineers.
4.1 LCD Interfaces LCD interfaces are the video output interfaces of the AM8X2 module, developed based on the MIPI_DSI standard. They support 4 groups of high-speed differential data transmission, each of which can achieve a rate of at most 1Gbps. You can configure different quantity of MIPI_DSI as required. The following sections will describe the hardware configuration of WVGA and 720P display.
4.1.1 WVGA The resolution of WVGA display is 800 x 480, which requires two groups of MIPI_DSI. LCD design is generally to connect FPC to the connector. Table 4-1 shows describes the LCD pin. Table 4-1 WVGA LCD description Pin
Signal
I/O
Function
135
LCD_DIF
DI
ID
134
LCD_ID
DI
ID
133
DSI_LCD_TE0
DO
143
DSI_RST_N
DO
129
MIPI_DSI0_CLK_P
DO
MIPI
18
MIPI_DSI0_CLK_M
DO
MIPI
132
MIPI_DSI0_LANE1_P
DO
MIPI
21
MIPI_DSI0_LANE1_M
DO
MIPI
127
MIPI_DSI0_LANE2_P
DO
MIPI
16
MIPI_DSI0_LANE2_M
DO
MIPI
43
VREG_L19_2P85V
AO
AO
42
VREG_L14_1P8V
AO
AO
/
LED_K
AI
Anode of backlight boost converter
/
LED_A
AO
Cathode of backlight boost converter
/
VEXT_2P85V
AO
LDO output
23
TS_RST_N
DO
Reset touchscreen
Copyright © Neoway Technology Co., Ltd
Remarks
Touchscreen interface
28
Neo_AM8X2 Smart Module Hardware User Guide
26
TS_I2C_SCL
DO
I2C clock of the touchscreen
Touchscreen interface
25
TS_I2C_SDA
DIO
I2C data of the touchscreen
Touchscreen interface
24
TS_INT_N
DI
Touchscreen interrupt
Touchscreen interface
In your design, add common mode chokes to the MIPI circuit to reduce the electromagnetic interference. Figure 4-1 shows the reference circuits with common mode choked. Please refer to 4.4 Design Cautions. Figure 4-1 Reference MIPI circuits with common mode chokes
FL1 MIPI_DSI0_LANE1_M
MIPI_DSI0_D1_M_LCD
MIPI_DSI0_LANE1_P
MIPI_DSI0_D1_P_LCD
FL1 MIPI_DSI0_CLK_M
MIPI_DSI0_CLK_M_LCD
MIPI_DSI0_CLK_P_LCD
MIPI_DSI0_CLK_P
FL1 MIPI_DSI0_LANE2_M
MIPI_DSI0_D2_M_LCD
MIPI_DSI0_LANE2_P
MIPI_DSI0_D2_P_LCD
Copyright © Neoway Technology Co., Ltd
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 4-2 shows the backlight driver circuit. Figure 4-2 AM8X2 LCD backlight chipset 22uH
VBATT_FET
6
2
WLED_PWM_MPP_3
4
10uF
VIN
GND
EN
120Ω±25%(@100MHz) LED_A
LX
OVP
FB
1
1 uF
5
120Ω±25%(@100MHz)
3
APW7209
LED_K
12Ω
100K
Table 4-2 lists the pin used in the backlight driver circuit. Table 4-2 Backlight driver pin Pin
Signal
I/O
Function
136
WLED_PWM
DI
Use PWM to control the LCD backlight
Remarks
DCDC is used to drive LCD backlight and powered by external power supply. The brightness is controlled by the PWM wave that the module outputs. It is recommended that you use independent LDO to supply power for the backlight to get the complete control of the power supply and reduce the standby power consumption. 2.85V LDO circuit is recommended to drive IC inside LCD.
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 4-3 Power supply of AM8X2 LCD driver DNI-0Ω
VREG_L19_2P85V
RP100K281D-TR
VBATT_FET
4
VOUT
VDD
VEXT_2P85V
1
2.2uF
EXT_2P85V_EN 3
CE
GND GND
2
5
100K
1 uF
Table 4-3 shows the 2.85V LDO control pin. Table 4-3 2.85V LDO pin Pin
Signal
I/O
Function
Remarks
151
EXT_2P85V_EN
DI
Control the switch of the external 2.85V LDO Control the switch of the external 1.8V LDO
In Figure 4-4, an MOS is used to turn off the power supply forcibly to prevent leakage current from some peripherals. If there is no concern of leakage current in your design, you can delete this MOS switch circuit. Table 4-4 lists the pin controlled by MOS control. Table 4-4 Pin controlled by MOS switch Pin
Signal
214
GPIO_PWR_FET
I/O
Copyright © Neoway Technology Co., Ltd
Function
Remarks
Pin controlled by MOS switch
31
Neo_AM8X2 Smart Module Hardware User Guide
Figure 4-4 Reference design of MOS switch circuit Q1 VBAT
S
VBATT_FET
D
C4 C1
C2
10 uF 0.1 uF
R4
G R3
GPIO_PWR_FET
TVS 5V
100K
C5
10 uF 0.1 uF
10K
R1 Q2 2K R2
10K
Figure 4-5 shows the reference design of the customized 4.5' LCD interface.
4.5' QHD
NT35516 driver IC
540*960
240 dpi
Capacitive multi-touch
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 4-5 Reference design of LCD interface
LCD connector
DSI_LCD_TE0 220Ω±25%(@100MHz)
LED_K
TS_RST_N
MIPI_DSI0_D1_P_LCD
VREG_L19_2P85
LED_A VEXT_2P85V TS_I2C_SCL TS_INT_N
V
1uF
MIPI_DSI0_CLK_M_LCD
1uF
0.1uF
1uF
0.1uF
AVL-5.5V-100PF
V
0.1uF
9
3
2
1
FV1
AVL-5.5V-100PF
5
4
TS_I2C_SDA
MIPI_DSI0_D2_P_LCD
26
MIPI_DSIO_D1_M_LCD
LCD_DIF DSI_RST_N
11 13 15 17 19 21 23 25
27
MIPI_DSIO_D2_M_LCD MIPI_DSIO_CLK_M_LCD
VREG_L14_1P8V
1 3 5 7
2 4 6 8 10 12 14 16 18 20 22 24
LCD_ID
4.1.2 720P The 720p format requires 4 groups of MIPI_DSI. You can refer to the WVGA design. Table 4-5 shows the LCD pins required in the 720p design. Table 4-5 720P LCD pins Pin
Signal
I/O
Function
135
LCD_DIF
DI
ID
134
LCD_ID
DI
ID
133
DSI_RST_N
DO
129
MIPI_DSI0_CLK_P
DO
MIPI
18
MIPI_DSI0_CLK_M
DO
MIPI
131
MIPI_DSI0_LANE0_P
DO
MIPI
20
MIPI_DSI0_LANE0_M
DO
MIPI
132
MIPI_DSI0_LANE1_P
DO
MIPI
21
MIPI_DSI0_LANE1_M
DO
MIPI
Copyright © Neoway Technology Co., Ltd
Remarks
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Neo_AM8X2 Smart Module Hardware User Guide
127
MIPI_DSI0_LANE2_P
DO
MIPI
16
MIPI_DSI0_LANE2_M
DO
MIPI
126
MIPI_DSI0_LANE3_P
DO
MIPI
15
MIPI_DSI0_LANE3_M
DO
MIPI
43
VREG_L19_2P85V
AO
AO
42
VREG_L14_1P8V
AO
AO
/
LED_K
AI
Anode of backlight boost converter
/
LED_A
AO
Cathode of backlight boost converter
/
VEXT_2P85V
AO
LDO output
23
TS_RST_N
DO
Reset touchscreen
26
TS_I2C_SCL
DO
25
TS_I2C_SDA
DIO
I2C data of the touchscreen
24
TS_INT_N
DI
Touchscreen interrupt
I2C clock of the touchscreen
4.2 Touchscreen Interfaces Touchscreen and LCD cannot be the FPC interface. Table 4-6 lists the touchscreen pins. Figure 4-6 shows the reference design of customized 4.5' touchscreen interfaces, in which ESD protection array is added. The recommended ESD models include NZQA5V6AXV5T1G, CESDLC3V0L4, PESD3V3V4UW, etc. Table 4-6 Touchscreen pins Pin
Signal
I/O
Function
/
CAM_1P8V
AO
Power output
/
VEXT_2P85V
AO
LDO output
23
TS_RST_N
DO
Reset touchscreen
26
TS_I2C_SCL
DO
I2C clock
25
TS_I2C_SDA
DIO
I2C data
24
TS_INT_N
DI
Touchscreen interrupt
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Figure 4-6 Reference design of touchscreen interface VEXT_2P85V
V
V
AVL-5.5V-100PF
1uF
0.1uF
1uF
0.1uF
CAM_1P8V
47KΩ
DNI-47KΩ TS_RST_N TS_I2C_SCL TS_I2C_SDA TS_INT_N
5
10
9
1 2 3 4 5 6 7 8
4
TP连接座
AVL-5.5V-100PF
CAM_1P8V
3
2
1
FV1
4.3 Camera Interfaces The video input interfaces of the module is developed based on the MIPI_CSI standard, and support two cameras, among which the pixel can be at most 8MP. The quality of video and photo is dependent on the camera sensor, the camera specifications, and other factors. You can select cameras compliant with your application scenarios based on the list of camera specifications that we have commissioned.
4.3.1 Main Camera The main camera transmits data and is controlled through FPC and connector. It uses two groups of MIPI_CSI differential data interfaces, and support at most 8MP. Table 4-7 lists pins of the main camera. Table 4-7 Main camera pins Pin
Signal
I/O
45
MIPI_CSI0_LANE1_P
MIPI
154
MIPI_CSI0_LANE1_M
MIPI
47
MIPI_CSI0_LANE2_P
MIPI
156
MIPI_CSI0_LANE2_M
MIPI
48
MIPI_CSI0_CLK_P
MIPI
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Function
Remarks
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Neo_AM8X2 Smart Module Hardware User Guide
157
MIPI_CSI0_CLK_M
MIPI
149
MAINCAM_RST_N
Reset
148
MAINCAM_MCLK0
Clock
145
CCI_I2C_SDA
I2C data
144
CCI_I2C_SCL
I2C clock
/
VEXT_2P85
LDO output
/
VEXT_CAM_1P2V
LDO output
/
VEXT_CAM_1P8V
LDO output
LDO supplies power for VEXT_2P85, VEXT_CAM_1P2V, and VEXT_CAM_1P8V. The recommended LDO models are respectively: RP100K281B5-TR, RP100K281D5-TR, RP100K281D-TR, XC6221A282GR, XC6221B282GR; RP100K121B-TR, TK68112AMFG0L-C, XC6221A122GR, XC6221B122GR; RP100K181D-TR, TK64118AMFGOL-C, XC6221A182GR, RP100K181B-TR, XC6221B182GR. Figure 4-7 shows the reference design of the 8MP main camera. Figure 4-7 Reference design of the main camera interface 220Ω±25%(@100MHz)
VEXT_2P85V
Main camera connector 0.1uF
STROBE CAM_MCLK0 MIPI_CSI0_LANE2_P
MIPI_CSI0_CLK_M MIPI_CSI0_LANE1_P
0.1uF
1uF
CCI_I2C_SDA
SDA
VEXT_CAM_1P8V
AGND
VPP
1uF
17 15 RESET DGND 13 DGND 11 9 AVDD
DVDD SIRPBE MCLK
MDP1
CAM1_RST_N
MIPI_CSI0_LANE2_M
MDN1
DGND
MCP
MCN
DGND
MDP0
MDN0
DGND
DGND
7 5 3 1
MIPI_CSI0_CLK_P
MIPI_CSI0_LANE1_P
1uF
0.1uF
26
220Ω±25%(@100MHz) VEXT_CAM_1P2V
25 23 AF_VCC 21 DOVDD SCL 19 DGND
AF_GND
27
CCI_I2C_SCL
24 22 20 18 16 14 12 10 8 6 4 2
4.3.2 Sub-Camera Sub-camera uses one group of MIPI_CSI differential signal, and supports 0.3MP and 5MP cameras. Table 4-8 lists sub-camera pins.
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Table 4-8 Sub-camera pins Pin
Signal
I/O
Function
162
MIPI_CSI1_LANE0_P
DO
MIPI
53
MIPI_CSI1_LANE0_M
DO
MIPI
54
MIPI_CSI1_CLK_P
DO
MIPI
163
MIPI_CSI1_CLK_M
DO
MIPI
56
SUBCAM_RESET
DO
Reset
144
CCI_I2C_SCL
O
I2C clock
145
CCI_I2C_SDA
IO
I2C data
152
SUBCAM_MCLK1
O
Clock
/
VEXT_2P85V
O
LDO output
/
VEXT_CAM_1P8V
O
LDO output
Remarks
VEXT_2P85V and VEXT_CAM_1P8V are powered by LDO. For information about how to select the proper model, see 4.3.1 Main Camera. Figure 4-8 shows the reference design of 0.3MP and 5MP cameras. Figure 4-8 Reference design of sub-camera interface
0.1uF
1uF
0.1uF
1uF
220Ω±25%(@100MHz) VEXT_2P85V CAM_1P8V SUBCAM_RESET CCI_I2C_SDA CCI_I2C_SCL SUBCAM_MCLK1
MIPI_CSI1_LANE0_M MIPI_CSI1_LANE0_P
MIPI_CSI1_CLK_M MIPI_CSI1_CLK_P
13 12 11 10 9 8 7 6 5 4 3 2 1
14 15
Sub-camera connector
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4.3.3 Design Cautions Please note the scanning direction of the camera, the aiming direction and angle of the camera lens, the scanning method of the LCD when it reads data. LCD is generally designed in two ways: vertical scan and horizontal scan. Figure 4-9 Scan direction of 3264*2448 LCD
Generally, our customized LCD supports horizontal scan. Figure 4-10 shows the reference design of our customized camera. Figure 4-10 Reference design of customized camera
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Images from the camera to the LCD can be adjusted in only four ways: Figure 4-11 Adjustment of camera sensor
Images can be displayed correctly only when the camera sensor and the LCD scan in the same direction. If the camera sensor and LCD scan in different directions, the image will be mirrored.
4.3.4 Camera Power Supply LDO supply power for cameras separately. For the recommended models, see 4.3.1 Main Camera. The 1.8V LDO circuit is used for the reference IC level inside the camera, and use the same pin as the 2.85V LDO.Figure 4-12 shows the reference design of the camera power supply. Figure 4-12 Reference design of the camera power supply
RP100K181D-TR
VBATT_FET 4
VOUT
VDD
1
VEXT_CAM_1P8V
2.2uF
EXT_2P85V_EN 3
CE
GND GND
2
5
DNI-100K
1 uF
1.2V level input is required for main camera. Figure 4-13 shows the reference design.
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Figure 4-13 Reference design of the main camera power supply
RP100K121B-TR
VIO_1P8V 4
VOUT
VDD
1
VEXT_CAM_1P2V
2.2uF
EXT_CAM_1P2V_EN 3
CE
GND GND
2
5
DNI-100K
1 uF
Table 4-9 lists the 1.2V LDO pin. Table 4-9 1.2V LDO pin Pin
Signal
I/O
Function
150
EXT_CAM_1P2V_EN
DI
1.2V LDO enable pin
Remarks
AM8X2 has specific enable control pins for each LDO circuit. The voltage varies with the cameras. For details, see the reference design.
4.4 Design Cautions Please note the definition of the video interfaces and ensure the correct connection between the connector and components. The MIPI transmission rate can reach 1Gbps (500MHz). Use 50Ω design rules to achieve a differential impedance of 100 Ω for the differential pair of traces, which must be routed on the inner layer to isolate from other signal traces. Keep length matching for the MIPI traces of one video component. Reserve 1.5 times of trace width between MIPI traces. It is recommended that you lay all MIPI traces on the same layer.
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5 Audio Interface AM8X2 provides a few groups of audio input/output interfaces to meet your requirements in different applications.
5.1 Audio Input Table 5-1 list the three groups of audio input pins. Table 5-1 Audio input pins Pin
Signal
I/O
Function
Remarks
13
MAINMIC_N
AI
Negative electrode of MIC1 output
Main MIC
124
MAINMIC_P
AI
Positive electrode of MIC1 output
Main MIC
71
SUBMIC_GND
AI
Negative electrode of MIC3 output
Supplement MIC
178
SUBMIC_P
AI
Positive electrode of MIC3 output
Supplement MIC
Figure 5-1 shows the differential connection of the peripheral. A bias circuit is embedded for the audio input pins. TVS in the following figure can be replaced by AVLC5S02100 and SDV1005E5R5C800NPTF. Figure 5-1 Reference design of MIC connection
33 pF 1800Ω±25%(@100MHz)
MICP 33 pF
AM8X2 1800Ω±25%(@100MHz)
MIC
MICN 33 pF TVS
TVS
5.2 Audio Output AM8X2 provides a few groups of audio output interfaces, including speaker, receiver, and headphone. Table 5-2 lists the audio output pins.
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Table 5-2 Audio output pins Pin
Signal
I/O
Function
Remarks
172
CDC_EAR_P
AO
Positive electrode of receiver output
173
CDC_EAR_M
AO
Negative electrode of receiver output
205
SPKR_DRV_M
AO
Negative electrode of speaker output
206
SPKR_DRV_P
AO
Positive electrode of speaker output
The receiver pins support Class G amplifier and differential output. The speaker pins support Class D amplifier and differential output. The typical speaker output power is 1.4W/0.9W@8Ωwhen the battery supplier 5V/4.2V. Figure 5-2 shows the reference design of the audio output pins. Figure 5-2 Reference design of EAR/SPK connections
33 pF
1800Ω±25%(@100MHz)
EAR/SPK+
33 pF
EAR/SPK
EAR/SPK-
AM8X2
1800Ω±25%(@100MHz)
33 pF TVS
TVS
5.3 Headphone Interfaces The module provides fixed pins to achieve the headphone function. AM8X2 supports class G headphone amplifier and three headphone control buttons. Table 5-3 lists the headphone pins. Table 5-3 Headphone pins Pin
Signal
I/O
Function
61
CDC_HPH_L
AO
Left sound channel of the earphone output
62
CDC_HPH_REF
63
CDC_HPH_R
AO
Right sound channel of the earphone output
64
HEADSET MIC_P
AI
Audio input of MIC2, used for single-end headphone input
167
CDC_HS_DET
DI
Headphone detection
Remarks
Headphone output level
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Figure 5-3 shows the reference design of the headphone circuit. Figure 5-3 Reference design of headphone without FM 1000Ω±25%(@100MHz)
PESD5V0S1BL
HEADSETMIC_P
33pF
Headphone connector
1 3 4
1000Ω±25%(@100MHz)
CDC_HPH_R CDC_HPH_L
V
AVL-5.5V-100PF
5 2
V
AVL-5.5V-100PF
1000Ω±25%(@100MHz)
10K
10K
470pF 470pF
1000Ω±25%(@100MHz)
CDC_HS_DET 1000Ω±25%(@100MHz)
V
1000Ω±25%(@100MHz)
DNI-33pF
AVL-5.5V-100PF
CDC_HPH_REF
Figure 5-4 shows the circuits of headphone out of position and in position. Figure 5-4 Headphone interface
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Please note if headphone you select is CTIA or OMTP. The connections of ①and ② are reverse for the two type of headphones. The CDC_HS_DET pin (⑤ in the above figure) is left disconnected (pulled up internally) if the headphone is not plugged. After the headphone is plugged, this pin is connected to GND through the left channel (8/16/32 Ω) loudspeaker of the headphone. The volume buttons of the AM8X2 module are used in the similar way to the power and reset buttons. Table 5-4 lists the volume pins. Table 5-4 Volume pins Pin
Signal
I/O
Function
104
VOL_DOWN
I
Volume-
105
VOL_UP
I
Volume+
Remarks
5.4 Audio Design Cautions The audio signal traces should be wide enough on the PCB to bear large current when the module output audios at the highest volume. The traces should be isolated from digital signals and clock as well as other analog signal traces. No signal trace crossing is allowed. Reserve enough grounding holes and ground protection. Do not connect the audio output pins to GND.
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6 Peripheral Interfaces AM8X2 also supports USB, SIM, SDIO, GPIO and other peripheral interfaces.
6.1 USB Interface You can download programs for AM8X2 and establish data connections through the USB interface. If the module is used only as USB Device, the recommended USB circuit is shown in Figure 6-1.
PESD5V0S1BL
Figure 6-1 USB circuit
DNI-22PF
VBUS_USBIN
Micro USB
0Ω
USB_DM
0Ω
USB_DP
ESD9X5VU
ESD9X5VU
DNI-18PF
GND
Parallel a 1μF and 22pF filter capacitors to the VBUS_USBIN pin as close to the pin as possible. TVS components are required for the VBUS power line. The junction capacitance of the TVS protection diodes for USB_DP and USB_DM should be lower than 12pF as possible. USB data lines adopt differential trace design, in which the differential impedance is limited to 90 Ω characteristics impedance. Isolate the traces from other signal traces. Table 6-1 lists the pins used in the above circuit. Table 6-1 USB Device pins Pin
Signal
I/O
Function
7
VCC_USBIN
PWR
USB Power
188
VCC_USBIN
PWR
USB Power
10
USB_DP
USB data
11
USB_DM
USB data
Remarks
GND
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Neo_AM8X2 Smart Module Hardware User Guide
The recommended voltage of VCC_USBIN is 5V (cannot exceed 6V). Otherwise the internal protection components for the power supply will be damaged. AM8X2 supports USB OTG. You can refer to the following circuit if you need the USB OTG function. Figure 6-2 USB OTG circuit
10UF
10UF
GND
Battery
PESD5V0S1BL
DCDC DNI-22PF
VIN
VBAT
EN
GPIO
VOUT
V_USB 0Ω Micro USB OTG
USB_DM
DNI-18PF
AM8X2 USB_DP USB_ID(EINT)
ESD9X5VU
ESD9X5VU
0Ω
GND
Table 6-2 lists pins used for the USB-OTG function in addition to the USB pins. Table 6-2 USB-OTG pins Pin
Signal
I/O
Function
200
USB_ID
I
USB_ID, Device detection, external interrupt
213
OTG_PWR_EN
O
DCDC pin,
Remarks
The DCDC is enabled after device is plugged into the AM8X2 USB interface
You can select the DCDC model based on your requirements.
6.2 SIM Card Interface AM8X2 supports 1.8V/3.0V SIM cards. AM812 allows dual SIM cards and only one works for 3G communications while the other one is recognized as 2G automatically among the two SIM card connectors. For example, you put two 3G SIM cards at the same time, SIM1 will be identified as 3G and SIM2 will be 2G.AM862 allows only one SIM card. VSIM is the SIM card power supply pin and its maximum load is 30 mA.An internal pull-up resistor is embedded for the SIM_DATA pin. You do not need to add any external pull-up resistor. SIM_CLK is the clock signal pin, supporting 3.25 GHz of clock frequency. Figure 6-3 shows the reference design of the SIM card interface.
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 6-3 Reference design of SIM card interface SIM_DATA
SIM_CLK
CLK
DATA
SIM_RST
RST
VPP
VSIM
VCC
GND
SIM-Det
GND
SIM-Det
SIM card
AM8X2 1 uF
Table 6-3 and Table 6-4 list SIM pins. Table 6-3 SIM1 pins Pin
Signal
I/O
Function
2
VCC_UIM1
PWR
SIM1 power supply
3
UIM1_DATA
IO
SIM1 data
4
UIM1_CLK
O
SIM1 clock
5
UIM1_RESET
O
SIM1 reset
6
UIM1_DETEC
I
SIM1 detection
Remarks
Table 6-4 SIM2 pins Pin
Signal
I/O
Function
113
VCC_UIM2
PWR
SIM2 power supply
114
UIM2_DATA
IO
SIM2 data
115
UIM2_CLK
O
SIM2 clock
116
UIM2_RESET
O
SIM2 reset
117
UIM2_DETECT
I
SIM2 detection
Remarks
ESD protectors, such as ESD diodes or ESD varistors (with a junction capacitance of less than 33 pF), are recommended on the SIM signals, especially in automotive electronics or other applications with badly ESD. Replace the ESD diodes with 27 pF to 33 pF capacitors connecting to GND in common applications. The ESD diodes or small capacitors should be close to SIM card. AM8X2 supports SIM card detection. UIM1_DETECT/ UIM2_DETECT are 1.8V interrupt pins. Low level means SIM card detected while high level mean no SIM card detected. Copyright © Neoway Technology Co., Ltd
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Neo_AM8X2 Smart Module Hardware User Guide
SIM card is sensitive to GSM TDD noise and RF interference. So, the PCB design should meet the following requirements: The antenna should be installed far away from the SIM card and SIM card traces, especially to the build-in antenna. The SIM traces on the PCB should be as short as possible and shielded with GND copper. The ESD protection diodes or small capacitors should be closed to SIM card on the PCB.
6.3 SDIO AM8X2 supports SD/MMC cards of 4-bit mode, or devices based on the SDIO protocol and the latest SDIO 3.0 protocol.
6.3.1 SD card Figure 6-4 shows the reference design of the SD card circuit. You can SD/TF card detection function and hot swapping functions. The module supports TF/SD card of at most 32 GB. Figure 6-4 Reference design of TF card interface
GND GND SW1B SW1A
4.7uF
0.1uF
DNI-47K
DNI-47K
DAT2 CD/DAT3 CMD VDD CLK VSS DAT0 DAT1
DNI-47K
DNI-47K
DNI-47K
VREG_L21_2P95V
SDC2_DATA2 SDC2_DATA3 SDC2_CMD VREG_L18_2P95V SCD2_CLK SCD2_DATA0 SCD2_DATA1
3
1
3
2
1
2
FV2
FV1
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4
5
4
TF connector
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Neo_AM8X2 Smart Module Hardware User Guide
Table 6-5 lists TF card pins. Table 6-5 TF card pins Pin
Signal
I/O
Function
Remarks
36
VIO_SD
PWR
I/O power supply (pull-up reserved)
37
VCC_SD
PWR
SDIO driver power supply, supporting dual voltage of 1.8V and 2.95V, maximum current 500 mA
VDD
29
SDC2_CMD
O
Command line, impedance line recommended
CMD
28
SDC2_CLK
O
High-speed digital clock
CLK
30
SDC2_DATA0
IO
High-speed data line
DATA0
31
SDC2_DATA1
IO
High-speed data line
DATA1
32
SDC2_DATA2
IO
High-speed data line
DATA2
33
SDC2_DATA3
IO
High-speed data line
DATA3
35
SD_CARD_DET_N
I
SD card detection, low-level interrupt
/
VCC_SD is the power supply pin of the SD card. It supports a maximum current of 500mA and dual-voltage of 1.8V/2.95V. The recommended trace width is 0.5 mm. Parallel 0.1 uF and 4.7 uF capacitors to the SD card. Reserve pull-up resistors that will be connected to VIO_SD in you SD card design. CMD, CLK, DATA0, DATA1, DATA2 and DATA3 are high-speed signal line. Limit their characteristics impedance to 50Ω and do not let them cross any other traces. Keep length matching for CMD, DATA0, DATA1, DATA2 and DATA3 traces. CLK trace should be ground separately.
6.3.2 SD Peripheral Interface SDIO interface can connect other peripherals. Refer to the SD card connection design, and connect the module pin to the peripheral pin directly. PCB layout is similar to the SD card design.
6.4 GPIO In addition to the default pin functions descript in previous sections, AM8X2 supports various configurations of the BLSP and other pins to meet customer requirement for UART, IIC, SPI, GPIO, and EINT. For the configurable information, see the pin definition section. For the open and usage of multi-function GPIO interface, please inquiry our technical support engineers.
6.4.1 UART AM8X2 provides three groups of UART interfaces, which support 4Mbps at most. The reference high level is 1.8V. Figure 6-5 shows the reference design of the UART interface.
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Neo_AM8X2 Smart Module Hardware User Guide
Figure 6-5 Reference design of the UART interface
Client
AM8X2 URXD
UTXD
UTXD
URXD
6.4.2 I2C AM8X2 provides one group of I2C interfaces (Version 2.1), which support the host mode only. The I2C interfaces are open-drain driven (pull-up resistor is mandatory for the external circuit). They support a maximum rate of 3.4 Mbps and their reference high level is 1.8V. Figure 6-6 shows the reference design of the I2C interfaces. Figure 6-6 Reference design of I2C
1.8V 2.2K
2.2K
I2C-SCL
I2C-SCL
I2C-SDA
I2C-SDA
6.4.3 SPI AM8X2 provides a group of SPI interfaces, which support the host mode only. The maximum rate is 52MHz, and the reference high level is 1.8V. Figure 6-7 shows the reference design of SPI interfaces.
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Figure 6-7 Reference design of the SPI AM8X2
SCLK
SCLK
MOSI
MOSI
MISO
MISO
SS
SS
GND
GND slave
master
Do not connect interfaces of different level standards directly. Otherwise, the module might be damaged. TXS0104E or NLSX4373MUTAG is recommended if you need level shifter to shift the level of the UART, IIC, SPI, etc.
6.5 ADC AM8X2 provides only ADC pins for battery level check and BAT_ID, but also one channel of open ADC. Table 6-6 lists the ADC pin. Table 6-6 ADC pin Pin
Signal
I/O
Function
Remarks
210
ADC_IN_MPP_04
AI
ADC pin
Open for customized requirements
ADC pin supports highest precision of 15-bit and its maximum input voltage is 2.85V.
6.6 Other Interfaces AM8X2 also provides motor driver interface and key backlight driver interface to meet the requirements for mobile device applications.
6.6.1 Motor Driver Interface Motor is driven by specific circuit. Figure 6-8 shows the reference design of the motor circuit.
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Figure 6-8 Reference design of motor circuit 2.2pF
VBATT_FET
0Ω
33pF
0.1uF
0Ω
VIB_DRV_N
+ 33pF
Motor interface
Table 6-7 lists the motor driven pin that AM8X2 opens for the motor. Table 6-7 Motor driver pin Pin
Signal
208
VIB_DRV_N
I/O
Function
Remarks
Negative electrode of the motor driver
The diode loop can release the electricity on the motor to protect the component when the VIB_DRV_N stops driving.
6.6.2 Key Backlight Driver AM8X2 provides a constant current driver interface to connect an LED, which supplies backlight for three keys at the bottom of the touchscreen. Figure 6-9 shows the reference design of the key backlight circuit. Table 6-8 Key backlight pin Pin
Signal
211
LED
I/O
Function
Remarks
Negative electrode of the key backlight driver
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Figure 6-9 Reference design of key backlight circuit
33pF 33pF 33pF
VBATT-FET
LED_SINK
33pF
33pF
33pF
LED_SINK provides constant current, which is to be adjusted together with the key backlight.
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7 RF Interface 7.1 2G/3G RF Design and PCB Layout RF_ANT_TRX is the antenna pin of AM8X2. A 50 Ω antenna is required. VSWR ranges from 1.1 to 1.5. The antenna should be well matched to achieve best performance. It should be installed far away from high speed logic circuits, DC/DC power, or any other strong disturbing sources. For multiple-layer PCB, the trace between the antenna pad of module and the antenna connector, should have a 50 Ω characteristic impedance, and be as short as possible. The trace should be surrounded by ground copper. Place plenty of via holes to connect this ground copper to main ground plane, at the copper edge. If the trace between the module and connector has to be longer, or built-in antenna is used, a π-type matching circuit is needed, as shown in Figure 7-1. Figure 7-1 Reference of antenna matching design
Big RF solder pad can result in great parasitic capacitance, which will affect the antenna performance. Remove the copper on the first and second layers under the RF solder pad. Figure 7-2 Recommended RF PCB design
If you adopts RF antenna connections, the GSC RF connector MM9329-2700RA1 from Murata is recommended. Figure 7-3 shows the encapsulation specifications.
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Figure 7-3 Encapsulation specifications of Murata RF connector
RF antenna can also be connected to the module by soldering. In this manner, you must ensure proper soldering in case of damage that lowers RF performance. Figure 7-4 shows the pictures of these two connections. Figure 7-4 RF connections
7.2 WIFI/BT RF Design and PCB Layout On AM8X2, WiFi and BT share the same antenna interface, which requires an antenna with 50Ω impedance. The antenna can be 2.4GHz PCB trace antenna, ceramic chip antennas, or Magnetic Antenna. It should be installed far away from high speed logic circuits, DC/DC power, or any other strong disturbing sources if you use RF cable to connect. It is recommended that you add an ESD protection diode to the antenna interface in an environment with great electromagnetic interference and other applications with badly ESD.The ESD protection diode must have ultra-low capacitance (lower than 0.5 pF). Otherwise, it will affect the impedance of the RF loop or result in attenuation of RF signals. RCLAMP0521P from Semtech or ESD5V3U1U from Infineon is recommended. In PCB design, the RF trace between the antenna pad of module and the antenna connector, should have a 50 Ω characteristic impedance, and be as short as possible. The trace should be surrounded by ground copper. The distance between the RF traces and ground copper should be twice of the RF trace width. Dig as many ground holes as possible on the copper to ensure lowest grounding impedance. It is recommended that you set the matching circuit before installing the antenna. You can select any type of circuits shown in Figure 7-1. T1 is an ESD protection diode, which is optional. You can use PCB trace antenna or ceramic chip antennas for the WiFi/BT RF. For the detailed design of the 2.4G antenna, refer to TI's Antenna Selection Quick Guide. For how to use 2.4G ceramic chip antenna, refer to Application Note AN048 Bluetooth, 802.11b/g WLAN Chip Antenna. You can also select SLDA52-2R540G-S1TF from Sunlord.
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Figure 7-5 shows the layout of the 2.4G ceramic chip antenna. SLDA52-2R540G-S1TF is used as an example. Figure 7-5 Antenna layout
If your PCB is large enough, you can adopt the layout shown in Figure 7-5 (a). 4 50Ω transmission line (calculated using Si9000 or APPCAD
1 Chip antenna 2 Feeder 3 Pad of the matching circuit
Number 5 in Figure 7-5shows the area between the antenna and the ground. Figure 7-6 shows the clearance if this area. Figure 7-6 Clearance around the antenna
For more details, refer to the antenna manufacturers’ product documents.
On the PCB, keep the RF signals and RF components away from high-speed circuits, power supplies, transformers, great inductors, the clock circuit of single-chip host, etc.
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7.3 GPS RF Design and PCB Layout 7.3.1 GPS Impedance The 77th pin is the GPS interface of the module, which also requires a 50 Ω¸.The PCB layout for GPS is similar to that for GPRS. For details, refer to the previous section. Figure 7-7 shows the internal structure of the GPS RF. Figure 7-7 GPS RF structure
In addition to the basic rules, the GPS routing has higher requirements because the air wireless GPS signal has lower strength, which results in weaker electrical signal after the antenna receives. Weaker signals are more susceptible to interference. Therefore, active antenna are commonly used for GPS. The active GPS antenna amplifies the weak signals received to stronger signals through the low-noise amplifier (LNA) and then transmits the signals through the feeder. If the antenna and layout are not designed reasonably, the GPS will be insensitive, resulting in long time on positioning or inaccurate position. Keep the GPRS and GPS far away from each other in layout and antenna layout.
7.3.2 Active GPS Antenna Design Ceramic GPS chip antenna are commonly used. In general, it is recommended that you use the active ceramic antenna. After the antenna receives GPS satellite signals, the LNA amplifies them first and then they are transmitted to the 74th pin (ANT_GPS) through the feeder and PCB traces. 50Ω¸resistance is required for both the feeder and PCB traces and the traces should be as short as possible. The power supply of the active antenna is fed by the 100 nH inductance through the signal traces. Common active antenna requires 3.3V to 5V power supply. Though the active antenna has a low power consumption, it requires stable and clean power supply. You are advised to use high-performance LDO to supply power for the antenna through a 100 nH inductance, as shown in Power supply reference for active antenna Figure 7-8.
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Figure 7-8 Power supply reference for active antenna
50Ω impedance line
33pF
AM8X2
LNA Active Antenna PWR_input
100nH
LDO 22uF
33pF
You need to add coupling capacitors if you use the active antenna because no coupling capacitor is designed for 77th pin (GPS_ANT) inside the module.
7.3.3 Passive GPS Antenna Design If you use a multiple-layer PCB and are experienced in RF design, use a passive ceramic ship antenna or other types of GPS antenna design. This method might reduce the BOM cost but require high skills to produce a reliable working board. Figure 7-9 shows a reference design of the passive GPS circuit (the 33 pF capacitor can be omitted). Figure 7-9 Passive GPS Antenna Design
LNA
50Ω impedance line
33pF
AM8X2
Passive Antenna
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It is recommended that you add an ESD protection diode to the antenna interface in an environment with great electromagnetic interference and other applications with badly ESD. The ESD protection diode must have ultra-low capacitance (lower than 0.5 pF). Otherwise, it will affect the impedance of the RF loop or result in attenuation of RF signals. RCLAMP0521P from Semtech or ESD5V3U1U from Infineon is recommended. On the PCB, keep the RF signals and RF components away from high-speed circuits, power supplies, transformers, great inductors, the clock circuit of single-chip host, etc.
7.4 FM RF Design and PCB Layout FM antenna has been matched inside the module. Connect the FM antenna pin to the FM antenna through a 50Ω RF impedance line. For the antenna layout, refer to the design manual of the component. FM signal can be received through the headphone cable, which is used as the FM antenna. Connect the FM antenna to the headphone GND pin. Figure 7-10 shows the reference design of the headphone circuit that supports FM function. Figure 7-10 Reference design of the headphone circuit with FM function 1000Ω±25%(@100MHz)
PESD5V0S1B L
HEADSETMIC_P
33pF
Headphone connector
1 3 4
1000Ω±25%(@100MHz)
CDC_HPH_R CDC_HPH_L
V
AVL-5.5V-100PF
5 2
V
AVL-5.5V-100PF
1000Ω±25%(@100MHz)
10K
10K
470pF 470pF
1000Ω±25%(@100MHz)
CDC_HS_DET FM_HEADSET
4700pF CDC_HPH_REF V
1000Ω±25%(@100MHz)
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DNI-33pF
AVL-5.5V-100PF
1000Ω±25%(@100MHz)
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8 Commissioning Interface Commissioning interface is reserved to facilitate design commissioning and software update. The following commissioning interfaces are mandatory for using the AM8X2.
8.1 Commissioning Log Print Interface UART port is usually used to print commissioning log and is a common interface in commissioning. After connecting the following UART pins to a level shifter, you can print the commissioning log through the COM port on a computer. Table 8-1 Commissioning UART Pin
Signal
I/O
Function
Remarks
79
BLSP
O
UART1_TX//Commissioning UART
80
BLSP
I
UART1_RX//Commissioning UART
8.2 FORCE_USB_BOOT Interface You can make the module enter the fastboot mode by short connecting the FORCE_USB_BOOT pin and VREG_L6_1P8V during the startup. Then you can download and update the module software through the USB port. This is the last method to troubleshoot the abnormality that the module cannot start or operation properly. Table 8-2 Fastboot (Enable) Pin
Signal
I/O
Function
Remarks
191
VDEBUG_1P8V
PWR
Power supply
199
FORCE_USB_BOOT
I
Fastboot interface (enable)
Figure 8-1 Reference design of the fastboot interface S1 VREG_L16_1P8V
FORCE_USB_BOOT
8.3 ADB Commissioning and Program Download & Update Interface USB interface is the most common commissioning interface, which is used for ADB commissioning, program download & update, etc. Table 8-3 USB commissioning interface, program download & update interface Pin
Signal
I/O
Function
7
VCC_USBIN
PWR
USB Power
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Remarks
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188
VCC_USBIN
PWR
USB Power
10
USB_DP
I/O
USB data
11
USB_DM
I/O
USB data
200
USB_ID
I
USB_ID, Device detection, external interrupt
GND
8.4 JTAG Interface JTAG interface is used to erase the program if the program encounter abnormalities during software commissioning, update, and download and FORCE_USB_BOOT cannot be used to enter the emergency download mode. Table 8-4 JTAG interface Pin
Signal
Function
191
VDEBUG_1P8V
Reference voltage
192
JTAG_TDO
Testing data output
193
JTAG_TDI
Testing data input
194
JTAG_TMS
Test mode selection
195
JTAG_TCK
Test clock input
196
JTAG_TRST_N
Test reset
197
JTAG_SRST_N
System reset
198
JTAG_PS_HOLD
Hold
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Figure 8-2 Reference design of JTAG commissioning interface
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9 Electric Features and Reliability 9.1 Electric Feature Table 9-1 Electric feature of AM8X2 Parameter
Minimum Value
Typical Value
Maximum Value
VBAT
Vin
3.5V
3.9V
4.2V
Iin
/
/
4A
If the voltage is too low, the module might fail to start. If the voltage is too high or there is a voltage burst during the startup, the module might be damaged permanently. If you use LDO or DC-DC to supply power for the module, ensure that it output at least 2 A current.
9.2 Temperature Table 9-2 AM8X2 temperature feature Module Status
Minimum Value
Typical Value
Maximum Value
Working
-40℃
25℃
85℃
Storage
-45℃
90℃
If the module works in temperature exceeding the thresholds, its RF performance (e.g. frequency deviation or phase deviation) might be worse but it can still work properly.
9.3 Current Table 9-3 Current feature Parameter
Testing Conditions
Testing Result (Average Current)
Testing voltage
3.9 V Agilent power supply
/
Idle mode
Set the instrument and power on the module.
4.6
Off leakage
Power on the module or use AT command to shut the
0.036
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current
Voice service
module down.
Maximum power level in full rate mode
GSM850
167.00
EGSM900
150.00
DCS1800
144.00
PCS1900
152.00
WCDMA2100
359.00
The results were obtained in a three-minute test after the screen turned off
1.6
Current in typical mode Flight mode
Single SIM card Dual-SIM card
FM play
Camera
Data service
Bluetooth
WiFi
WIFI hotspot
2.2
Played through the headphone
57.0
Played through the speaker
61.7
Preview mode of the rear camera
Brightest, the rear camera entering the preview mode
514.0
Rear camera taking photo
Brightest, flash on, fixed
649.0
Rear camera taking photo
Brightest, flash off, fixed
625.0
Preview mode of the rear camera
Brightest, the rear camera entering the preview mode
537.0
2G download
Use EGPRS to download
127.0
3G download
Use HSDPA to download
167.0
Enable the Bluetooth
Enable the Bluetooth
9.7
Connecting to another phone
Connecting to another phone through the Bluetooth
12.7
Data transferring through the Bluetooth with the screen off
Connecting to another phone and transferring data
118.0
Call through the Bluetooth
Use the Bluetooth to make a call
91.2
Enable the WIFI
Enable the WiFi
8.7
Connecting to WiFi, sleep mode
Connecting to the WiFi, set the WiFi, screen off, sleep mode
17.6
Download data when the screen off
Use the WiFi to download data
147.5
Enable
Enable the WiFi hotspot
76.0
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Another phone connecting to the hotspot and downloading data
Another phone connecting to the hotspot and downloading data
175.0
Played through the speaker
Playing pink noise through the speaker, maximum volume
54.0
Played through the headphone
Playing pink noise through the headphone
50.0
Played through the speaker
Brightest, maximum volume, through the speaker
393.0
Played through the headphone
Brightest, maximum volume, through the headphone
331.0
Record
Recording
Brightest, recording
300.0
Flashlight
VBAT=3.6V
3.6V, flashlight on
72.0
VBAT=4.2V
4.2V, flashlight on
81.0
Alarm clock
Alarm clock working
Brightest, alarm clock on
476.0
GPS
Enable GPS
Enable GPS
8.9
Motor vibration
Brightest, vibrating for 1 second, stop for one second
298
Touchscreen wor king
Brightest, standby screen, continuously tapping the screen
340
Music
Video
The data in the above table is typical values obtained during tests in lab. It might be a little bit different in manufacturing. Also, the test results might be various due to different settings or testing methods.
9.4 ESD Protection Electronics need to pass sever ESD tests. The following table shows the ESD capability of key pins of our module. It is recommended that you add ESD protection to those pins in accordance to the application to ensure your product quality when designing your products. Humility: 45% Temperature: 25℃ Table 9-4 AM8X2 ESD feature Testing Point
Contact Discharge
Air Discharge
VBAT
±8KV
±15KV
GND
±8KV
±15KV
ANT
±8KV
±15KV
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Cover
±8KV
±15KV
USB
±4KV
±8KV
MIC/SPK/REC/RAR
±4KV
±8KV
Others
±4KV
±8KV
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10 RF Features 10.1 Work Band Table 10-1 AM8X2 work band Work Band
Uplink
Downlink
GSM850
824~849MHz
869~894MHz
EGSM900
880~915MHz
925~960MHz
DCS1800
1710~1785MHz
1805~1880MHz
PCS1900
1850~1910MHz
1930~1990MHz
WCDMA2100
1920~1980MHz
2110~2170MHz
10.2 TX Power and RX Sensitivity Table 10-2 AM8X2 RF power and RX sensitivity Band
TX Power
RX Sensitivity
GSM850
32.5dBm ±2dBm
<-107dBm
EGSM900
30.2dBm ±2dBm
<-107dBm
DCS1800
32.5dBm ±2dBm
<-107dBm
PCS1900
30.2dBm ±2dBm
<-107dBm
WCDMA2100
22.6dBm ±1dBm
<-107dBm
The data in the above tables is obtained by connecting the module to RF test instrument (e.g. CMU200, CWM500, or Agilent8960) in lab tests. It is for reference only.
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11 Mounting the Module onto the Application Board AM8X2 is compatible with industrial standard reflow profile for lead-free SMT process. The reflow profile is process dependent, so the following recommendation is just a start point guideline:
Only one flow is supported.
Quality of the solder joint depends on the solder volume. Minimum of 0.15mm stencil thickness is recommended.
Use bigger aperture size of the stencil than actual pad size.
Use a low-residue, no-clean type solder paste.
AM8X2 is big and use multi-layer HDI board so that it is difficult to solder. For information about cautions in AM8X2 storage and mounting, refer to Neo_AM8X2 Smart Module Usage Cautions and Manufacturing Recommendations. When you maintain and manually solder it, use two heat guns with great opening, adjust the temperature to 250 degrees (depending on the type of the solder paste), and heat the module till the solder paste is melt. The remove the module using tweezers. Do not shake the module in high temperature when you remove it. Otherwise, the components inside the module might be misplaced.
12 Package AM8X2 modules are packaged in sealed bags on delivery to guarantee a long shelf life. Package the modules again in case of opening for any reasons. If exposed in air for more than 48 hours at conditions not worse than 30°C/60% RH, a baking procedure should be done before SMT. Or, if the indication card shows humidity greater than 20%, the baking procedure is also required. The baking should last for at least 12 hours at 90℃. Do not bake modules with the package tray directly.
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13 Abbreviations ADC
Analog-Digital Converter
AFC
Automatic Frequency Control
AGC
Automatic Gain Control
AMR
Acknowledged multirate (speech coder)
CSD
Circuit Switched Data
CPU
Central Processing Unit
DAI
Digital Audio interface
DAC
Digital-to-Analog Converter
DCE
Data Communication Equipment
DSP
Digital Signal Processor
DTE
Data Terminal Equipment
DTMF
Dual Tone Multi-Frequency
DTR
Data Terminal Ready
EFR
Enhanced Full Rate
EGSM
Enhanced GSM
EMC
Electromagnetic Compatibility
EMI
Electro Magnetic Interference
ESD
Electronic Static Discharge
ETS
European Telecommunication Standard
FDMA
Frequency Division Multiple Access
FR
Full Rate
GPRS
General Packet Radio Service
GSM
Global Standard for Mobile Communications
HR
Half Rate
IC
Integrated Circuit
IMEI
International Mobile Equipment Identity
LCD
Liquid Crystal Display
LED
Light Emitting Diode
MS
Mobile Station
PCB
Printed Circuit Board
PCS
Personal Communication System
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RAM
Random Access Memory
RF
Radio Frequency
ROM
Read-only Memory
RMS
Root Mean Square
RTC
Real Time Clock
SIM
Subscriber Identification Module
SMS
Short Message Service
SRAM
Static Random Access Memory
TA
Terminal adapter
TDMA
Time Division Multiple Access
UART
Universal asynchronous receiver-transmitter
USSD
Unstructured Supplementary Service Data
VSWR
Voltage Standing Wave Ratio
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