Transcript
10/26/2009 16:20
PD2-MF
PowerDAQ II PCI Multifunction Boards
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• 16/64 single-ended or 8/32 differential A/D channels • 150 kS/s − 2.2 MS/s sampling rate • 12-, 14-, 16-bit resolution • Gains 1,10,100,1000 or 1,2,4,8 • Two 12-bit analog outputs; 32 digital I/O lines; three 16-bit counter/timers • Simultaneous operation of all subsystems • Stream-to-disk capability • Multiple boards operate in one PC • Full PCI-bus implementation
(PD2-MF-64-2M/14H Shown) Supports UEIDaq Framework Data Acquisition Software Library for Windows. Linux and QNX drivers available. Visit our website for more details.
General Description: When you know you’ll be setting up a stimulus/response test, when you know you’ll be implementing a closed-loop system or if you just want to be ready for any kind of testing situation, a multifunction board is the logical choice. Our PD2-MF Series boards pack everything you’ll likely need: as many as 64 single-ended/32 differential analog inputs running at speeds to 2.2 MS/s, dual analog outputs, 32 digital I/O lines plus three counter/timers available to users. To allow all these I/O subsystems to run simultaneously without loading down the host CPU, MF Series cards run under control of a Motorola DSP. Thus you can collect analog samples while generating waveforms yet have the resources to perform digital I/O and run the counter/ timers – all at the same time. Operating in this fashion presents no constraints on setup parameters, either: a custom PGIA (programmable-gain instrumentation amplifier) design runs any or all channels at different gains without the need to trade off peak throughput rate or accuracy.
Block Diagram: We supply a complete set of drivers for all popular programming languages and third-party applications including LabVIEW and Agilent VEE -- and at no additional charge! The support package also comes with example programs, complete with source code, that are so extensive that some of them might be enough to solve your problem straight out of the box. To achieve optimum performance under Windows, we wrote the boards’ 32-bit driver from scratch without relying on any legacy code. This advanced protocol-based driver works with shareable buffers in system RAM and makes obsolete traditional registerbased drivers and double-buffering schemes. MF Series boards can stream data to disk continuously, gapfree, at the hardware?s peak acquisition rates!
United Electronic Industries, Inc. Tel: (781) 821-2890
1
http://www.ueidaq.com Fax: (781) 821-2891
PowerDAQ II Multifunction Boards
Technical Specifications: Model: PD2-MFS-xxResolution
2M/14H
1M/12x
500/16x
400/16x
333/16x
150/16x
14 bits
12 bits
16 bits
14 bits
16 bits
16 bits
Number of Channels SingleEnded Differential Maximum Sampling Rate
16 or 64 8 or 32 2.2 MS/s
1 MS/s
16 8
800 kS/s
500 kS/s
500 kS/s
300 kS/s
(multiple channels)
Onboard FIFO Size
4k samples
2k samples
1k samples
(upgradeable to 16k, 32k, 64k)
Input Ranges
0-5 V, ±5 V, 0-8 V, ±8 V @ 10 V ranges
0-5 V, 0-10 V ±5 V, ±10 V (software selectable)
Channel-Gain List Programmable Gains
256 entries H=1, 2, 4, 8
L=1,10,100,1000 H=1, 2, 4, 8
(by channel)
Drift
±30 µV/°C ±30 ppm/°C
Zero Gain
Input Impedance
10 MΩ
Input Bias Current
±20 nA
Input Overvoltage
±20V,2000V ESD 10 mA max
±35V cont.
A/D Conversion Time
0.45 µs
0.8 µs
2 µs
2.5 µs
2.0 µs
6 µs
A/D Settling Time
0.37 µs
0.6 µs
1.2 µs
2.0 µs
1.2 µs
5 µs
Nonlinearity
±2 LSB
±0.5 LSB
±1 LSB
±0.5 LSB
±1 LSB
±1 LSB
System Noise
1.2 LSB
0.3 LSB
1.3 LSB
0.8 LSB
1.3 LSB
1.2 LSB
DC Accuracy (no missing codes)
AC Accuracy Effective Number of Bits
12.2
11.63
14.5
13.1
14.5
14.8
Total Harmonic Distortion + Nonliearity + Noise
76 dB
71.8 dB
88 dB
81 dB
89 dB
91 dB
Channel Crosstalk
-80 dB @ 1 kS/s
Clocking and Trigger Input Maximum A/D Pacer Clock
2200 kS/s @ 1 ch, 1800 kS/s @ all
1250 kS/s
500 kS/s
400 kS/s
333 kS/s
150 kS/s
External A/D Sample Clock Maximum Frequency
2200 kS/s @ 1 ch, 1800 kS/s @ all
1250 kS/s
500 kS/s
400 kS/s
333 kS/s
150 kS/s
Minimum Pulse Width
20 ns
External Digital (TTL)Trigger
2.0V min 0.8V min 20 ns
High-level Input Voltage Low-level Input Voltage Minimum Pulse Width
United Electronic Industries, Inc. Tel: (781) 821-2890
2
http://www.ueidaq.com Fax: (781) 821-2891
PowerDAQ II Multifunction Boards
Pinout Diagrams: J1
J1 AIN1 Return AGND AIN4 Return AIN6 Return AIN16 Return AIN17 Return AIN19 Return AIN21 Return AGND AIN32 Return AIN34 Return AIN36 Return AGND AIN39 Return AIN49 Return AIN51 Return AIN52 Return AIN54 Return ADC Channel List Start Input / Burst Clock AGND N/C ADC Conversion Start Out/ Pacer Clock Out DSP Trigger Input/AO External Clock AGND AIN1 AIN3 AIN5 AIN6 AIN16 AIN18 AGND AIN21 AIN23 AIN33 AIN34 AIN36 AIN38 AGND AIN49 AIN51 AIN53 AIN55 AGND DGND AGND AGND AGND AGND
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AIN0 Return AIN2 Return AIN3 Return AIN5 Return AIN7 Return AGND AIN18 Return AIN20 Return AIN22 Return AIN23 Return AIN33 Return AIN35 Return AIN37 Return AIN38 Return AIN48 Return AIN50 Return AGND AIN53 Return AIN55 Return N/C AGND ADC Conversion Start Input / Pacer Clock +5V (100 mA max) AGND AIN0 AIN2 AIN4 AGND AIN7 AIN17 AIN19 AIN20 AIN22 AIN32 AGND AIN35 AIN37 AIN39 AIN48 AIN50 AIN52 AIN54 AGND AGND AOUT1 AGND AOUT0 AGND
AIN9 AGND AIN12 AIN14 AIN24 AIN25 AIN27 AIN29 AGND AIN40 AIN42 AIN44 AGND AIN47 AIN57 AIN59 AIN60 AIN62 ADC Channel List Start Input / Burst Clock AGND N/C ADC Conversion Start Out/ Pacer Clock Out DSP Trigger Input/AO External Clock AGND AIN1 AIN3 AIN5 AIN6 AIN16 AIN18 AGND AIN21 AIN23 AIN33 AIN34 AIN36 AIN38 AGND AIN49 AIN51 AIN53 AIN55 AGND DGND AGND AGND AGND AGND
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AIN8 AIN10 AIN11 AIN13 AIN15 AGND AGND AIN26 AIN28 AIN30 AIN31 AIN41 AIN45 AIN46 AIN56 AIN58 AGND AIN61 AIN63 N/C AGND ADC Conversion Start Input / Pacer Clock +5V (100 mA max) AGND AIN0 AIN2 AIN4 AGND AIN7 AIN17 AIN19 AIN20 AIN22 AIN32 AGND AIN35 AIN37 AIN48 AIN50 AIN50 AIN52 AIN54 AGND AGND AOUT1 AGND AOUT0 AGND
J4
DGND DGND DGND DGND
J6
2
4
6
8
1
3
5
7
CV_START_OUT Cl_START_OUT CV_START_IN CL_START_IN
Analog Connector (male | differential mode)
Analog Connector (male | single-ended mode)
Synchronization (male)
DGND DGND DGND DGND DGND DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DGND DGND DGND DGND DGND
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
J2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
CTR0-IN DGND CTR0-OUT DGND CTR0-GATE DGND CTR1-IN DGND CTR1-OUT +5 V (100 mA max) DIN0 DGND DIN1 DOUT8 DIN2 DOUT9 DIN3 DOUT10 DIN4 DOUT11 DIN5 DOUT12 DIN6 DOUT13 DIN7 DOUT14 Burst Clock /ADC Channel List Start Input DOUT15 DSP Trigger Input/AO External Clock DGND Pacer Clock / ADC Conversion Start Input DGND DGND DGND Burst Clock / ADC Channel List Start Output DGND
Digital Connector (male)
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
CTR2-IN CTR2-OUT CTR2-GATE CTR1-GATE +5 V (100 mA max) DGND DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DGND ADC Conversion Start Output / Pacer Clock DGND Channel List Done Output
Digital Connector (male)
Connection Schemes: Connector On The Board J1 J2 J1 J2 J2 J1 J1
Cable Required PD-CBL-96 PD-CBL-37 PD-CBL-96 PD-CBL-37 PD-CBL-3650-8/8 PD-CBL-96 PD-CBL-96
Target Panel PD2-AO-STP-16 PD2-AO-STP-16 PD-BNC-64* PD-BNC-64 PD2-DIO-BPLANE16 PD-AO-AMP-100 PD-AO-AMP-115
Description Carries analog output lines to 16-channel terminal panel Carries 8 digital input and 8 digital output lines to 16-channel terminal panel Carries analog output lines to 64-channel BNC terminal panel Carries 8 digital input and 8 digital output lines to 64-channel BNC terminal panel Carries digital lines to digital isolation panel for adding relays to the DIO lines Amplifies analog outputs to ±100V per channel Amplifies analog outputs to ±115V per channel
* PD-BNC-64 was initially designed for analog input subsytem of UEI’s multifunction boards. Thus the analog output signals transfered via PD-CBL-96 will not match the signal designations on PD-BNC-64’s J1 connector. See PowerDAQ Analog Output Manual for more details and remapping diagram.
United Electronic Industries, Inc. Tel: (781) 821-2890
3
http://www.ueidaq.com Fax: (781) 821-2891
PowerDAQ II Multifunction Boards
Specifications: (PD2-MF-all models) Digital I/O Input Bits (8 can generate IRQ) Output Bits Inputs High-level Input Voltage Low-level Input Voltage High-level Input Current Low-level Input Current Outputs Output Driver High Voltage Output Driver Low voltage: Current Sink Pulse Width
Power-on Voltage
Analog Outputs 16
Number of channels Resolution Update Rate Onboard FIFO Size Analog Output Range Error Gain Zero Current Output Output Impedance Capacitive Drive Capability Nonlinearity Protection Power-on Voltage Setting Time to 0.01% of FSR
16 2.0 V (min) 0.8 V (max) 20 µA -20 µA 2.5 V min, 3.0 V typ (IOH = -32 mA) 0.55V max (IOL = 64 mA) -32/64 mA max, 250 mA per port 20 ns min, interrupt bit latched on rising, falling or either edge Logic Zero
Slew Rate
Resolution Clock Inputs Software configurable High-level Input voltage Low-level Input voltage High-level Input current Low-level Input current
Gate Inputs Maximum Pulse Width Counter Outputs Output Driver High Voltage Output Driver Low Voltage
±1 LSB Calibrated to 0 ±20 mA max 0.3Ω typ 1000 pF ±1 LSB Short circuit to analog ground 0 V ±10 mV 10 µs, 20 V step 1 µs, 100 mV step 30 V/µs
General Specifications
Counter/Timer Number of channels
2 12 bits 200 kS/s each 2k samples (on DSP) ±10 V
Power Requirements Physical Dimensions
3 available to user (Intel 82C54) 16 bits on each counter
Environmental
Operating Temperature Range Storage Temperature Range Relative Humidity
Internal 1 MS/s, External ≤ 10 MS/s 2.0V min 0.8V max 20 µA -20 µA
Connector J1 Connector J2
100 ns (High) 100 ns (Low) Inverted 2.5V min (IOH = 24 mA) 0.55V max (IOH = 48 mA)
Connector J4 Connector J6
+5V or +3.3V 10.5 x 3.8"
(262 x 98 mm)
0 to 70 °C -25 to 85 °C to 95%, noncondensing
96-pin high-density Fujitsu connector (male) (Fujitsu PN#FCN-245P096-G/U) 36-pin header connector (male) (Thomas and Betts PN#609-3627) 36-pin header connector (male) (Thomas and Betts PN#609-3627) 8-pin male connector (Adam-Tech PN#PH2-SMT-8-SGA
Ordering Guide: Part Number PD2-MF-16-2M/14H PD2-MF-64-2M/14H PD2-MF-16-1M/12L PD2-MF-16-1M/12H PD2-MF-64-1M/12L PD2-MF-64-1M/12H PD2-MF-16-500/16L PD2-MF-16-500/16H PD2-MF-64-500/16L PD2-MF-64-500/16H PD2-MF-16-400/14L PD2-MF-16-400/14H PD2-MF-64-400/14L PD2-MF-64-400/14H PD2-MF-16-333/16L PD2-MF-16-333/16H PD2-MF-64-333/16L PD2-MF-64-333/16H PD2-MF-16-150/16L PD2-MF-16-50/16H Upgrade FIFO PD-16KFIFO
Description 2.2 MS/s, 14-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 2.2 MS/s, 14-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 1.25 MS/s, 12-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 1.25 MS/s, 12-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 Digital I/O 1.25 MS/s, 12-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 1.25 MS/s, 12-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 500 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 500 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 500 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 500 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 400 kS/s, 14-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 400 kS/s, 14-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 400 kS/s, 14-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 400 kS/s, 14-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 333 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 333 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 333 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 333 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O 150 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O 150 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O
PD-32KFIFO PD-64KFIFO
Upgrade 1K FIFO to 32K FIFO Upgrade 1K FIFO to 64K FIFO
United Electronic Industries, Inc. Tel: (781) 821-2890
Upgrade 1K FIFO to 16K FIFO
4
http://www.ueidaq.com Fax: (781) 821-2891
