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Smartphone-Controlled Hearing Aid Project Proposal TA: MS. Cara Yang ECE 445 Project Team Members: Jiang Li (lijiang2) Jui-Ting Hsu (jhsu10) Tu-hsiang Ting (tting3) Februrary 10th. 2016 ECE 445 Project Proposal Table of Contents 1. Introduction ............................................................................................................................. 2 A. Objectives ........................................................................................................................ 2 B. Functionalities .................................................................................................................. 2 C. Existing Product ............................................................................................................... 2 2. Design Decisions and Analysis ............................................................................................... 3 A. Complete Block diagram ................................................................................................. 3 B. Smartphone Application .................................................................................................. 3 C. CC2640 Bluetooth module .............................................................................................. 3 D. Home-made Low-pass Filter............................................................................................ 4 E. AD1938 Codec................................................................................................................. 4 F. ADSP-21479 Digital Signal Processor ............................................................................ 4 G. TOM-1545P Microphone................................................................................................. 4 H. Home-made Audio Driver ............................................................................................... 4 3. Requirement & Verification .................................................................................................... 5 4. Tolerance Analysis .................................................................................................................. 6 5. Cost Analysis ........................................................................................................................... 7 6. A. Parts.................................................................................................................................. 7 B. Labor ................................................................................................................................ 7 C. Combined Cost................................................................................................................. 7 Schedule................................................................................................................................... 8 -1- ECE 445 1. Project Proposal Introduction With modern programmable chips, hearing aids have become much more versatile with functionalities such as noise cancelling and frequency-shifting. Currently, hearing-impaired users would go through professional examinations to analyze their ear function and have a customized configuration for their devices. We noticed how inconvenient this would be for the users to make adjustments, especially when only minor modifications are needed. Therefore, we came up with the idea of making our own hearing aid module with a smartphone interface that enables the users to fine tune the equalizer settings according to their own interest. A. Objectives - B. Functionalities - C. Provide user with the ability to easily adjust hearing aid settings Sound quality should not be compromised Module should have a reasonable size for convenience Smartphone Application to allow easy-adjusting of equalizer settings Volume Control Existing Product MiniTek from Siemens is the closest resemblance of the current conception; however, it does not provide the crucial fine tuning capabilities. In addition, many complaints had been made regarding to the delay and quality in transmission. Our product serves the purpose of resolving these deficiencies. -2- ECE 445 Project Proposal 2. Design Decisions and Analysis A. Complete Block diagram The diagram below shows the complete block diagram of the project. The functionality of each block will be detailed in the following sections. B. Smartphone Application The smartphone application will act as the interface between the end user and our project. The interface will consist of 6-8 sliders, each corresponding to the amplitude of a designated frequency band. This block will also compute the filter parameters for the DSP Core. An iOS application will be developed as a prototype. C. CC2640 Bluetooth module This module will receive filter parameters from the smartphone and pass them to the DSP chip through UART. Bluetooth was chosen because of its lower power characteristics. Since parameters are literally just a few floats, latency in transmission will not be the bottleneck comparing to the computation of filter coefficients. Given that Bluetooth transmission is around 2.1 Mbps and there are about 50(coefficients per filter) *8 (filters) * 32 (bit per coefficient), the estimated time of transmission is about 6*10^-3 seconds. -3- ECE 445 Project Proposal Though Wi-Fi has a higher transmission rate, it consumes much more power than Bluetooth. Considering both latency and power, Bluetooth is the better choice. D. Home-made Low-pass Filter The sampling rate of the Codec is 48 kHz; hence, the hard cut-off frequency of the filter should be at 24 kHz. Considering the uncertainty in the sampling rate and cut-off frequency, actual cutoff frequency is set at 21kHz. Since the human ear only captures frequencies peaking around 20 kHz, this is a fairly reasonable decision. E. AD1938 Codec The codec module consists of an ADC (Analog-to-Digital Converter) to convert our analog sound input to digital signal for the DSP core to process and a DAC (Digital-to-Analog Converter) to convert the processed digital signal back to analog signal as sound output. It also consists of a pre-amplifier for the amplification of the input microphone signal. We are using Analog Devices’ AD1938YSTZ as our audio codec module. It has 4 ADCs, 8 DACs, and it utilizes a SPI interface which suits our needs. The operating supply voltage is 3.3V to 5V. It has an input sampling rate of 48kHZ. F. ADSP-21479 Digital Signal Processor The DSP core will apply digital filters to the input signal in order to achieve the equalizing effects. Specifically, there will be around 6-8 sets of coefficients to define each band filters. The parameters of the filters will be received from the micro controller. The module we selected has an operating supply voltage of 1.2V and a maximum clock frequency of 266MHz. DSP was chosen instead of FPGA for faster development time and common built-in functions such as FFT. G. TOM-1545P Microphone The microphone is to receive audio input from the environment. It captures a range of frequency from 100 Hz to 10000 Hz, which is more than enough for music and human communication and a minimum of 60db signal to noise ratio, which is fairly inaudible for the human ear. H. Home-made Audio Driver This module will receive the audio signal processed by the DSP core. Since the audio EQ is already enhanced by the DSP core, this module’s main function will be volume control and driving the signal to the speaker. -4- ECE 445 3. Project Proposal Requirement & Verification Requirement Verification Points Microphone Vout =140 ±20mV at 200mA 1. Measure voltage with multimeter parallel to microphone. Expect to see 140±20mV 2. Measure current with multimeter in series to microphone. Expect to see 200±20mA 5 Correct Audio Output The output waveform should reflect the user settings. To verify correct computation has been done, one can compare the output signal to a modeled signal in MATLAB; it has many built in functions to measure frequency domain differences. 15 All parameters can be measured through an Low-Pass Filter 1. Cut-off Frequency at 20 oscilloscope. kHz 2. Passband ripple at ±3dB 3. Stopband attenuation is at -80dB 10 Bluetooth Module 1. Vin = 3.8±0.5V 2. Transmission Rate: 2.1 Mbps 1.Measure voltage across input source. Ensure input source is around 3.8±0.5V 2. Send packet and receive ACK on smartphones multiple times to compute average RTT (round trip time). Then compute average transmission rate from average RTT. 5 Power Supply 5V ± 0.25V DC Use multimeter to test DC voltage. Ensure voltage is around 5V ± 0.25V 5 Overall Latency 5-15ms Audio latency perception is different for each 5 individual. However, it is agreed that it should not be more than 10ms. Since the main delay happens in the DSP core, one can simply measure the time for a chunk to get from the input port to the output port from the DSP chip. DSP Vin = 2.0 ±0.6V Measure voltage across input source. Ensure input source is around 1.4V~2.6V -5- 5 ECE 445 4. Project Proposal Tolerance Analysis This section will discuss the tolerance analysis of our low-pass filter. The tolerance limit of passband ripple is ±1dB, since most people are not sensitive to sound intensity variation that is lower than 1dB. Reduction in the ripple of pass-band results in the reduction in the sidelobe level and width of transition region at filter band edges. Since human ear’s audible frequency is between 20 Hz and 20 kHz the cutoff frequency of the filter should be > 20 kHz. And the stopband attenuation is between -80 dB and -90dB. In this range of intensity, the filter slope is not too steep, which is good for a natural listen, and aliasing can be mostly avoided. Stopband ripple should be around 0.011dB (passband ripple / stopband attenuation = 1/90 dB). Resistors and capacitors have 0.18% ~ 0.5% error tolerance. Frequency resolution of human ear is 3.6 Hz within the octave of 1000 – 2000 Hz. According to the equation fcutoff = 1/2πRC, 0.18% ~ 0.5% error tolerance of R or C value will guarantee the cutoff frequency error within 3.6Hz. -6- ECE 445 Project Proposal 5. Cost Analysis A. Parts Item Quantity Total Cost AD1938 Codec 1 $14.13 ADSP-21479 DSP chip 1 $21.13 TOM-1545P Microphone 1 $3.71 Apple Earpods 1 $29.00 CC2640 Bluetooth Module 1 $5.94 iPhone 6 16GB 1 $549.00 Total B. $622.91 Labor Name Hourly Wage Hours Total Wage = Hourly Wage * Hours * 2.5 Jui-Ting Hsu $35/hour 160 hours $14,000 Li Jiang $35/hour 160 hours $14,000 Tu-hsiang Ting $35/hour 160 hours $14,000 Total C. $42,000 Combined Cost Section Cost Parts $622.91 Labor $42,000.00 Total $42,622.91 -7- ECE 445 6. Project Proposal Schedule Week Objective Team Member Responsible For 2/8 Project proposal write up Hsu Project proposal write up Ting Project proposal write up Jiang Finalize design decisions Hsu Research relevant mathematical foundations for DSP Ting Purchase components Jiang Design Review Write-up Hsu Design Review Edit Ting Examine audio input Jiang Smartphone application development Hsu Networking between smartphone and Bluetooth module Ting Design and build low-pass filter Jiang Application integration with network Hsu Configure Codec to integrate with other modules Ting Implement DSP algorithm Jiang R&V Table Hsu Test mobile application Ting 2/15 2/22 2/29 3/7 3/14 -8- ECE 445 3/21 Project Proposal Test DSP algorithm Jiang Spring Break Hsu Ting Jiang 3/28 4/4 4/11 4/18 4/25 PCB board layout design Hsu Implement power supply Ting Build audio driver and connect with speaker Jiang Integrate whole system Hsu Integrate whole system Ting Prepare for mock-demo Jiang Test and debug system Hsu Test and debug system Ting Test and debug system Jiang Prepare for demo and presentation Hsu Prepare for demo and presentation Ting Prepare for demo and presentation Jiang Final paper write up Hsu Final paper write up Ting Final paper write up Jiang -9-